Patents by Inventor Sang-Su Kim

Sang-Su Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128554
    Abstract: A button type secondary battery includes a wound electrode assembly; a lower can with the electrode assembly and an electrolyte in the lower can; a top plate to close the lower can; a positive electrode terminal coupled to the top plate through a gasket to be electrically insulated from the top plate with a portion of the positive electrode terminal passing through a hole in the top plate to be bonded to a positive electrode tab; a top insulator covering a top surface of the electrode assembly; and a bottom insulator covering a bottom surface of the electrode assembly. The top insulator and the bottom insulator are each configured to expand in volume by absorbing the electrolyte. Surfaces of at least one or more of the top insulator and the bottom insulator are coated with a protective layer configured to prevent thermal shrinkage from occurring.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Yeong Hun JUNG, Young Ji TAE, Joo Hwan SUNG, Min Su CHO, Geun Young PARK, Min Gyu KIM, Min Seon KIM, Sang Hak CHAE, Min Young JU
  • Patent number: 11963273
    Abstract: The present embodiment relates to a communication protocol between an MCU and an LED driving circuit for LED driving. The MCU may define and use an SPI protocol including ID setting, a command, configuration data, etc.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: April 16, 2024
    Assignee: LX SEMICON CO., LTD.
    Inventors: Sang Suk Kim, Jang Su Kim, Jong Min Lee
  • Publication number: 20240120276
    Abstract: A three-dimensional semiconductor integrated circuit device including an inter-die interface is provided. The device includes a top die including a plurality of micro cells provided on a top surface of the top die, a plurality of micro bumps provided on a bottom surface of the top die, and wiring patterns connecting the plurality of micro cells to the plurality of micro bumps; and a bottom die including a plurality of macro cells provided on a top surface thereof, wherein the plurality of macro cells are electrically connected to the plurality of micro bumps, respectively, wherein a size of a region in which the plurality of micro cells are provided is smaller than a size of a region in which the plurality of micro bumps are provided.
    Type: Application
    Filed: July 27, 2023
    Publication date: April 11, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Seung CHOI, Byung-Su KIM, Bong Il PARK, Chang Seok KWAK, Sun Hee PARK, Sang Joon CHEON
  • Patent number: 11955755
    Abstract: Provided are an electric appliance and a method of manufacturing the same, the electric appliance having a smaller size and a reduced overall weight by preventing a fluid from flowing into a space unrelated to a heating component in a state where the fluid fills its case. The electric appliance includes: a case including a first space and a second space communicated to each other; a first component disposed in the first space; a second component disposed in the second space; a connection portion electrically connecting the first component and the second component to each other; and a potting pattern including a resin material and formed in the first space.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 9, 2024
    Assignee: SOLUM CO., LTD.
    Inventors: Young Jun Jang, Hyun Su Kim, Jun Kyu Lee, Pill Ju Kim, Sang Keun Ji, Dong Kyun Ryu
  • Publication number: 20240113305
    Abstract: The present disclosure relates to an anode current collector and a metal battery, and more specifically, to an anode current collector and a metal battery including the same, the collector including: a two-dimensional material layer which is formed on at least a portion of at least one surface of a current collector substrate, and which has an atomic thickness; and a metal layer formed on at least a portion of the two-dimensional material layer. In addition, the present disclosure may further provide a method of manufacturing the anode current collector.
    Type: Application
    Filed: October 8, 2021
    Publication date: April 4, 2024
    Applicant: NEXTERIALS CO., LTD.
    Inventors: Hyeon Suk Shin, Sang Young Lee, Seung Hyeok Kim, Min Su Kim
  • Patent number: 11944661
    Abstract: The present invention provides a pharmaceutical composition for prevention or treatment of a stress disease and depression, the pharmaceutical composition be safely useable without toxicity and side effects by using an extract of leaves of Vaccinium bracteatum Thunb., which is natural resource of Korea, so that the reduction of manufacturing and production costs and the import substitution and export effects can be expected through the replacement of a raw material for preparation with a plant inhabiting in nature.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: April 2, 2024
    Assignee: JEONNAM BIOINDUSTRY FOUNDATION
    Inventors: Chul Yung Choi, Dool Ri Oh, Yu Jin Kim, Eun Jin Choi, Hyun Mi Lee, Dong Hyuck Bae, Kyo Nyeo Oh, Myung-A Jung, Ji Ae Hong, Kwang Su Kim, Hu Won Kang, Jae Yong Kim, Sang O Pan, Sung Yoon Park, Rack Seon Seong
  • Patent number: 11945864
    Abstract: A monoclonal antibody or an antigen-binding fragment thereof according to an embodiment of the present invention can bind to lymphocyte-activation gene 3 (LAG-3) including a heavy chain variable region and a light chain variable region and inhibit the activity thereof. Thus it is expected to be useful for the development of immunotherapeutic agents for various disorders that are associated with LAG-3.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 2, 2024
    Assignee: Y-BIOLOGICS INC.
    Inventors: Sang Pil Lee, Ji-Young Shin, Sunha Yoon, Yunseon Choi, Jae Eun Park, Ji Su Lee, Youngja Song, Gisun Baek, Seok Ho Yoo, Yeung-chul Kim, Dong Jung Lee, Bum-Chan Park, Young Woo Park
  • Patent number: 11948487
    Abstract: The present disclosure provides a current mirror circuit including a first transistor configured to be supplied with a data current from a data driving circuit; a second transistor configured to drive a light emitting diode by mirroring the data current transferred to the first transistor; a capacitor disposed between the first transistor and the second transistor and configured to store a voltage of a gate terminal of the second transistor therein; and a first switch disposed between the first transistor and the second transistor and configured to adjust an input current of the gate terminal of the second transistor.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: April 2, 2024
    Assignee: LX SEMICON CO., LTD.
    Inventors: Ji Hwan Kim, Sang Suk Kim, Jang Su Kim
  • Patent number: 11939698
    Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: March 26, 2024
    Assignee: SENIC INC.
    Inventors: Jong Hwi Park, Jung-Gyu Kim, Eun Su Yang, Byung Kyu Jang, Jung Woo Choi, Yeon Sik Lee, Sang Ki Ko, Kap-Ryeol Ku
  • Publication number: 20240097535
    Abstract: An electric compressor capable of reducing a size and lightening weight of a package of an inverter unit, as a common mode choke (CM choke) is disposed radially outside of a circuit board of the inverter unit, and a high voltage connector, a CM choke, and a low voltage connector are integrated into a support body.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 21, 2024
    Inventors: Hyun Woo Lee, Min Gyu Kim, Sang Woo Bae, Hye Rim An, Sung Taeg Oh, Je Su Yun
  • Patent number: 11932097
    Abstract: A battery unit for a vehicle is provided. The battery unit includes a lower case having two battery compartments arranged in a direction toward opposite sides of the vehicle, respectively, and a connecting portion bent to be convex upwardly between the two battery compartments. A reinforcing structure is disposed on the connecting portion. Two battery modules are installed in the two battery compartments, respectively and a power wire is electrically connected to at least one of the two battery modules and extends from one of the two battery compartments to the other one of the two battery compartments through the connecting portion.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 19, 2024
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Sang Wan Kim, Kyung Ho Kim, Hyeon Su Jin
  • Publication number: 20240083018
    Abstract: An embodiment device includes an input module including a motor configured to generate a rotational force, an output module configured to receive power from the input module to be rotatable, and a connection module having a first side coupled to the input module and a second side, opposite the first side, coupled to the output module, wherein the connection module is configured to transmit the power from the input module to the output module.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 14, 2024
    Inventors: Hyo-Joong Kim, Sang In Park, Ki Hyeon Bae, Ju Young Yoon, Beom Su Kim, Min Woong Jeung, Seong Taek Hwang, Ho Jun Kim, Hyun Seop Lim, Kyu Jung Kim
  • Publication number: 20240076799
    Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.
    Type: Application
    Filed: November 1, 2023
    Publication date: March 7, 2024
    Applicant: SENIC INC.
    Inventors: Jong Hwi PARK, Jung-Gyu KIM, Eun Su YANG, Byung Kyu JANG, Jung Woo CHOI, Yeon Sik LEE, Sang Ki KO, Kap-Ryeol KU
  • Publication number: 20240081104
    Abstract: A display device includes a base substrate, a pixel defining layer disposed on the base substrate and including a first opening, a light emitting structure disposed in the first opening of the pixel defining layer, a thin film encapsulation layer disposed on the light emitting structure, a touch electrode disposed on the thin film encapsulation layer, an insulating pattern disposed on the touch electrode and including a second opening which overlaps the first opening, and a high refractive layer disposed on the insulating pattern, the high refractive layer including a plurality of grid patterns disposed on a top surface of the high refractive layer, and a refractive index higher than a refractive index of the insulating pattern.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Jin-Su BYUN, Sang Hyun LEE, Sae Hee HAN, Ji-Hyun KIM
  • Patent number: 11922880
    Abstract: A current supply circuit according to the present disclosure may include a voltage/current converter configured to convert, into a data current, a data voltage received from a data driving circuit and a first current mirror circuit configured to mirror the data current so that a light-emitting diode (LED) current flows into an LED array. The data current may be adjusted based on a greyscale value of the LED array.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: March 5, 2024
    Assignee: LX SEMICON CO., LTD.
    Inventors: Jong Min Lee, Kyeong Rok Lee, Sang Suk Kim, Jang Su Kim
  • Patent number: 11917958
    Abstract: A light source includes a controller configured to turn on or off a plurality of light sources depending on a light period. The controller can be configured to turn on the light sources during each of a plurality of light periods such that the light sources emit a light having a spectrum with a plurality of peaks toward the plant. At least one light period can include a first period and a second period and the first period preceding or following the second period. The controller can adjust the spectrum of the light between the first period and the second period and/or during different light periods.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: March 5, 2024
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Se Ryung Kim, Sang Min Ko, Jin Won Kim, Hyun Su Song
  • Patent number: 11610966
    Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: March 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Han Lee, Jae-Hwan Lee, Sang-Su Kim, Hwan-Wook Choi, Tae-Jong Lee, Seung-Mo Ha
  • Patent number: 11515390
    Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: November 29, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Han Lee, Jae-Hwan Lee, Sang-Su Kim, Hwan-Wook Choi, Tae-Jong Lee, Seung-Mo Ha
  • Patent number: 10896955
    Abstract: A semiconductor device includes a substrate, an active region disposed on the substrate and extending in a first direction, a device isolation layer adjacent to the active region, a gate structure disposed in the active region, the gate structure extending in a second direction crossing the first direction, and covering a portion of the device isolation layer, a gate separation pattern contacting an end of the gate structure, and an impurity region disposed below the gate separation pattern and on the device isolation layer.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: January 19, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kangmook Lim, Sang Su Kim, Woo Seok Park, Sung Gi Hur
  • Patent number: D1021834
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang-Ho Kim, Seung-Ho Lee, Ji-Gwang Kim, Sang-Young Lee, Jin-Su Park