Patents by Inventor Sanjeev N. Trika

Sanjeev N. Trika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11861219
    Abstract: Examples herein relate to a storage system that separately handles portions of a write operation that are aligned and misaligned with respect to retrievable segments from a storage device. For misaligned portions, a buffer can be used to store misaligned retrievable segments and update the segments with content provided with the write operation. Aligned portions of content associated with a write request can be written directly to the storage medium or overwrite corresponding retrievable segments present in the buffer. A table or array can track logical block addresses that correspond to content in the buffer or in the storage. Content in the buffer can be kept in the buffer without being backed-up or persisted to the storage until a triggering event occurs such as power loss or low space in the buffer.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: January 2, 2024
    Assignee: Intel Corporation
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Patent number: 11687498
    Abstract: Examples may include a storage appliance having a mass storage device and a compute engine communicating peer-to-peer with each other, with the compute engine including a programmable logic component to execute a function to read data from the at least one storage device, process the data; and write data to the at least one storage device.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: June 27, 2023
    Assignee: Intel Corporation
    Inventors: Sanjeev N. Trika, Jawad B. Khan, Piotr Wysocki
  • Patent number: 11681463
    Abstract: A host-managed storage device includes an offload capability that enables the host to offload all or a portion of a defrag operation to the storage device. Rather than issuing read, write or copy operations and commands to relocate data to the host's DRAM, the host assembles a defrag operation command descriptor for the storage device controller. The command descriptor includes a defrag bitmap that can be directly accessed by the storage device controller to conduct the defrag operation entirely on the storage device at band granularity, without consuming host CPU cycles or host memory. The reduction in host operations/commands achieved by offloading defragmentation to the storage device is on the order of at least a thousand-fold reduction.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: June 20, 2023
    Assignee: Intel Corporation
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Patent number: 11573895
    Abstract: An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: February 7, 2023
    Assignee: Intel Corporation
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Patent number: 11334253
    Abstract: An apparatus is described. The apparatus includes a storage system management unit to manage a storage system having physical storage resources divided into different reliability zones. A data item to be stored in the storage system is to be assigned a particular reliability level by the management unit and is to be stored by the management unit in one of the reliability zones that is to provide a level of protection against data loss that is at least as protective as the particular reliability level.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: May 17, 2022
    Inventor: Sanjeev N. Trika
  • Patent number: 11231873
    Abstract: An apparatus is described. The apparatus includes velocity assignment logic to assign a velocity to data that is to be written to a non volatile storage medium. The velocity assignment logic is to accept input information pertaining to an identity of an application that is writing the data, the data type of the data and the state of the application in order to determine the velocity.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: January 25, 2022
    Assignee: Intel Corporation
    Inventor: Sanjeev N. Trika
  • Patent number: 11210130
    Abstract: Examples include techniques for managing high priority (HP) and low priority (LP) write transaction requests by a storage device. An embodiment includes receiving, at a storage controller for a storage device, a write transaction request from a requestor to write data to one or more memory devices in the storage device. When the write transaction request is for a high priority (HP) write, coalescing the write data into a transaction buffer in a memory of the storage device, sending an acknowledgment for the write transaction request to the requestor, and writing the write data into the one or more memory devices. When the write transaction request is for a low priority (LP) write, writing the write data into the one or more memory devices, and then sending an acknowledgment for the write transaction request to the requestor.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: December 28, 2021
    Assignee: INTEL CORPORATION
    Inventors: Bishwajit Dutta, Sanjeev N. Trika, Anand S. Ramalingam, Pallav H. Gala
  • Publication number: 20210326254
    Abstract: An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: April 1, 2021
    Publication date: October 21, 2021
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Publication number: 20210311659
    Abstract: A host-managed storage device includes an offload capability that enables the host to offload all or a portion of a defrag operation to the storage device. Rather than issuing read, write or copy operations and commands to relocate data to the host's DRAM, the host assembles a defrag operation command descriptor for the storage device controller. The command descriptor includes a defrag bitmap that can be directly accessed by the storage device controller to conduct the defrag operation entirely on the storage device at band granularity, without consuming host CPU cycles or host memory. The reduction in host operations/commands achieved by offloading defragmentation to the storage device is on the order of at least a thousand-fold reduction.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Peng LI, Jawad B. KHAN, Sanjeev N. TRIKA
  • Publication number: 20210263895
    Abstract: Examples may include a storage appliance having a mass storage device and a compute engine communicating peer-to-peer with each other, with the compute engine including a programmable logic component to execute a function to read data from the at least one storage device, process the data; and write data to the at least one storage device.
    Type: Application
    Filed: May 13, 2021
    Publication date: August 26, 2021
    Applicant: Intel Corporation
    Inventors: Sanjeev N. TRIKA, Jawad B. KHAN, Piotr WYSOCKI
  • Publication number: 20210223998
    Abstract: Quality of Service of a multi-stream solid state drive is improved by storing data to be written to a NAND die in the solid state drive in a byte-addressable write-in-place non-volatile memory in the solid state drive in the event of a NAND die collision preventing a write to the NAND die. The data stored in the a byte-addressable write-in-place non-volatile memory is written to the NAND die when the NAND die is not busy.
    Type: Application
    Filed: April 5, 2021
    Publication date: July 22, 2021
    Inventors: Peng LI, Sanjeev N. TRIKA
  • Publication number: 20210223979
    Abstract: On-SSD-copy using Copy-On-Write (COW) techniques track indirection updates to the copied data without duplicating the data. In one example, a method involves receiving a copy command to copy data from a source LBA to a destination LBA. An entry in a logical-to-physical (L2P) table corresponding to the destination LBA is updated to refer to the same physical address as the source LBA's entry in the L2P table. Flags in the L2P table are updated to indicate that more than one LBA refers to the same physical address. After updating the L2P table and before copying the data, a token is stored to the storage device. After storing the token, but before copying the data, an acknowledgement can be sent to the host to indicate the copy command is complete. A subsequent write to either the source or destination LBAs trigger a copy of the data.
    Type: Application
    Filed: March 16, 2021
    Publication date: July 22, 2021
    Inventors: Peng LI, Sanjeev N. TRIKA, David C. ESTRADA
  • Publication number: 20210216239
    Abstract: Read Quality of Service in a solid state drive is improved by allowing a host system communicatively coupled to the solid state drive to control garbage collection in the solid state drive. Through the use of controlled garbage collection, the host system can control when to start and stop garbage collection in the solid state drive and the number of NAND dies engaged in garbage-collection operations.
    Type: Application
    Filed: March 27, 2021
    Publication date: July 15, 2021
    Inventors: Bishwajit DUTTA, Anand S. RAMALINGAM, Sanjeev N. TRIKA, Pallav H. GALA
  • Patent number: 11054993
    Abstract: An apparatus is described. The apparatus includes peer-to-peer intelligence to be integrated into a mass storage system having a cache and a backing store. The peer-to-peer intelligence is to move data between the cache and backing store without the data passing through main memory.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Knut S. Grimsrud, Sanjeev N. Trika
  • Patent number: 11042323
    Abstract: A host-managed storage device includes an offload capability that enables the host to offload all or a portion of a defrag operation to the storage device. Rather than issuing read, write or copy operations and commands to relocate data to the host's DRAM, the host assembles a defrag operation command descriptor for the storage device controller. The command descriptor includes a defrag bitmap that can be directly accessed by the storage device controller to conduct the defrag operation entirely on the storage device at band granularity, without consuming host CPU cycles or host memory. The reduction in host operations/commands achieved by offloading defragmentation to the storage device is on the order of at least a thousand-fold reduction.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: June 22, 2021
    Assignee: Intel Corporation
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Patent number: 11010350
    Abstract: Examples may include a storage appliance having a mass storage device and a compute engine communicating peer-to-peer with each other, with the compute engine including a programmable logic component to execute a function to read data from the at least one storage device, process the data; and write data to the at least one storage device.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: May 18, 2021
    Assignee: INTEL CORPORATION
    Inventors: Sanjeev N. Trika, Jawad B. Khan, Piotr Wysocki
  • Patent number: 10970207
    Abstract: An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Peng Li, Jawad B. Khan, Sanjeev N. Trika
  • Patent number: 10915267
    Abstract: Examples include techniques for implementing a write transaction to two or more memory devices in a storage device. In some examples, the write transaction includes an atomic write transaction from an application or operating system executing on a computing platform to a storage device coupled with the computing platform. For these examples, the storage device includes a storage controller to receive an atomic multimedia write transaction request to write first data and second data; cause the first data to be stored in a first memory device, and cause the second data to be stored in a second memory device, simultaneously and atomically.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: February 9, 2021
    Assignee: INTEL CORPORATION
    Inventors: Sanjeev N. Trika, Peng Li, Jawad B. Khan, Myron Loewen
  • Patent number: 10877668
    Abstract: Techniques for offloading operations to access data that is compressed and distributed to multiple storage nodes are disclosed. A storage node includes one or more storage devices to store a portion of compressed data. Other portions of the compressed data are stored on other storage nodes. A storage node receives a request to perform an operation on the data, decompresses at least part of the portion of the locally stored compressed data, and performs the operation on the decompressed part, returning the operation result to a compute node. Any part that could not be decompressed can be sent with the request to the next storage node. The process continues until all the storage nodes storing the compressed data receive the request, decompress the locally stored data, and perform the operation on the decompressed data.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: Sanjeev N. Trika, Jawad B. Khan
  • Patent number: 10872041
    Abstract: An intelligent journal-aware caching manager for journaled data is provided. The caching manager ensures that data is not duplicated in a write-ahead-log (“journal”) and volatile cache memory (“cache”). The caching manager maintains first-in-first-out (“FIFO”) policy for the journal as needed and includes an alternate caching policy for non-journaled data.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: December 22, 2020
    Assignee: Intel Corporation
    Inventors: Madhurima Ray, Sanjeev N. Trika