Patents by Inventor Saravuth Sirinorakul

Saravuth Sirinorakul has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8575732
    Abstract: A semiconductor package comprises a die attach pad and a support member at least partially circumscribing it. Several sets of contact pads are attached to the support member. The support member is able to be etched away thereby electrically isolating the contact pads. A method for making a leadframe and subsequently a semiconductor package comprises partially etching desired features into a copper substrate, and then through etching the substrate to form the support member and several sets of contact pads. Die attach, wirebonding and molding follow. The support member is etched away, electrically isolating the contact pads and leaving a groove in the bottom of the package. The groove is able to be filled with epoxy or mold compound.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: November 5, 2013
    Assignee: UTAC Thai Limited
    Inventor: Saravuth Sirinorakul
  • Patent number: 8575762
    Abstract: A package and method of making thereof. The package includes a first plated area, a second plated area, a die, a bond, and a molding. The die is attached to the first plated area, and the bond couples the die to the first and/or the second plated areas. The molding encapsulates the die, the bonding wire, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: November 5, 2013
    Assignee: UTAC Thai Limited
    Inventors: Somchai Nondhasitthichai, Saravuth Sirinorakul
  • Publication number: 20130280866
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Application
    Filed: May 29, 2013
    Publication date: October 24, 2013
    Inventors: Somchai Nondhasitthichai, Saravuth Sirinorakul, Kasemsan Kongthaworn, Vorajit Suwannaset
  • Publication number: 20130243893
    Abstract: A process for forming land grid array semiconductor packages includes a leadframe that is supported by a substrate comprising mold compound. In some embodiments, at least one die is electrically coupled to the leadframe by bondwires. The package comprises a second mold compound to act as an encapsulant. An apparatus for forming a land grid array semiconductor package includes means for molding a leadframe, assembling thereon at least one semiconductor device, applying a second mold, and singulating to form individual devices. A land grid array package comprises a leadframe, a substrate for supporting the leadframe, at least one semiconductor device and a mold compound.
    Type: Application
    Filed: May 3, 2013
    Publication date: September 19, 2013
    Applicant: UTAC Thai Limited
    Inventors: Somchai Nondhasitthichai, Saravuth Sirinorakul
  • Publication number: 20130234307
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Application
    Filed: September 4, 2012
    Publication date: September 12, 2013
    Applicant: UTAC THAI LIMITED
    Inventors: Somchai Nondhasittichai, Saravuth Sirinorakul
  • Patent number: 8492906
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: July 23, 2013
    Assignee: UTAC Thai Limited
    Inventors: Somchai Nondhasitthichai, Saravuth Sirinorakul, Kasemsan Kongthaworn, Vorajit Suwannaset
  • Patent number: 8487451
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: July 16, 2013
    Assignee: UTAC Thai Limited
    Inventors: Somchai Nondhasitthichai, Saravuth Sirinorakul, Kasemsan Kongthaworn, Vorajit Suwannaset
  • Patent number: 8461694
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: June 11, 2013
    Assignee: UTAC Thai Limited
    Inventor: Saravuth Sirinorakul
  • Patent number: 8460970
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: June 11, 2013
    Assignee: UTAC Thai Limited
    Inventor: Saravuth Sirinorakul
  • Patent number: 8368189
    Abstract: A semiconductor package comprises a die attach pad and an auxiliary support member at least partially circumscribing the die attach pad. A set of contact leads is formed extending outward from the die attach pad. A first set of contact pads is formed on the bottom surface of the distal ends of the contact leads. An optional second set of contact pads is formed at the bottom surface of the proximal end. The auxiliary support member prevents damage to the contact leads and prevents the leads from bending during the manufacturing process.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 5, 2013
    Assignee: UTAC Thai Limited
    Inventor: Saravuth Sirinorakul
  • Patent number: 8338922
    Abstract: A process for forming semiconductor packages includes partially etching a leadframe matrix, encapsulating it with mold compound, placing a semiconductor die in a leadframe unit and singulating the leadframe matrix. A system for forming semiconductor packages includes means for partially etching a leadframe matrix, means for encapsulating it with mold compound, means for placing a semiconductor die in a leadframe unit and means for singulating the leadframe matrix.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: December 25, 2012
    Assignee: UTAC Thai Limited
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 8310060
    Abstract: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: November 13, 2012
    Assignee: Utac Thai Limited
    Inventors: Somchai Nondhasittichai, Saravuth Sirinorakul
  • Publication number: 20120094438
    Abstract: A frame includes heat slug pads coupled together in a N×M matrix such that singulation of the heat slug pads consists of one or more parallel passes across the frame. Each heat slug pad has a top exposed surface and a bottom interfacing surface. The bottom interfacing surface typically interfaces with a package. In some embodiments, the top exposed surface is modified. Alternatively, the bottom interfacing surface is modified. Alternatively, both surfaces are modified. A modified top exposed surface can include a pattern to increase the top exposed surface area. A modified bottom interfacing surface can include a pattern to increase the bottom interfacing surface area, provide reference points, or both. Alternatively or in addition to, the modified bottom interfacing surface can be plated to increase the bottom interfacing surface area. A patterned surface can be obtained via a stamping process or an etching process.
    Type: Application
    Filed: December 21, 2011
    Publication date: April 19, 2012
    Applicant: UTAC THAI LIMITED
    Inventor: Saravuth Sirinorakul
  • Publication number: 20120066899
    Abstract: A process for assembling semiconductor devices comprises encapsulating a leadframe matrix having semiconductor die mounted thereon in a mold compound. The leadframe matrix is partially singulated to electrically isolate each individual leadframe unit. A plurality of leadframe units is tested simultaneously. The leadframe matrix is completely singulated. Non compliant units are discarded.
    Type: Application
    Filed: November 25, 2011
    Publication date: March 22, 2012
    Applicant: UTAC THAI LIMITED
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 8129229
    Abstract: A metal leadframe to be used in manufacturing a “flip-chip” type semiconductor package is treated to form a metal plated layer in an area to be contacted by a solder ball or bump on the chip. The leadframe is then process further to form an oxide or organometallic layer around the metal plated layer. Pretreating the leadframe in this manner prevents the solder from spreading out during reflow and maintains a good standoff distance between the chip and leadframe. During the molding process, the standoff between the chip and leadframe allows the molding compound to flow freely, preventing voids in the finished package.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: March 6, 2012
    Assignee: UTAC Thai Limited
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Publication number: 20120049335
    Abstract: A method of singulating semiconductor packages, the method comprising: providing a plurality of semiconductor dies coupled to a single common leadframe, wherein a molding compound at least partially encases the semiconductor dies and the leadframe; singulating the plurality of semiconductor dies, wherein the leadframe is at least partially cut between adjacent semiconductor dies, thereby forming exposed side surfaces on leads of the leadframe; and plating the exposed side surfaces of the leads with a plating material, wherein the plating material is a different material than the leads. In some embodiments, singulating the plurality of semiconductor dies comprises performing a full cut of the leadframe. In some embodiments, singulating the plurality of semiconductor dies comprises performing separate partial cuts of the leadframe.
    Type: Application
    Filed: August 19, 2011
    Publication date: March 1, 2012
    Applicant: UTAC THAI LIMITED
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 8125077
    Abstract: A semiconductor package includes an encapsulant, a semiconductor device within the encapsulant, and one or more terminals for electrically coupling the semiconductor device to a node exterior to the package. The package further includes bonding means coupling the semiconductor device to the one or more terminals. The semiconductor package is configured to dissipate heat through a top surface of the package. To directly dissipate heat via the top surface of the package, a thermally conductive layer is coupled to the semiconductor device, and the layer is exposed at a surface of the package.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: February 28, 2012
    Assignee: Utac Thai Limited
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 8071426
    Abstract: A leadframe for use in fabricating a no lead semiconductor package contains connecting bars between individual electrical contact pads. For embodiments having a die pad, the leadframe further includes connecting bars between the contact pads and the die pad. The lower surfaces of the connecting bars are coplanar with the lower surfaces of the contact pads and/or the die pad, and the upper surfaces of the connecting bars are recessed with respect to the upper surfaces of the contact pads and/or the die pad. The semiconductor package is fabricated by encapsulating the die and the leadframe in a molding compound and then removing the connecting bars. The leadframe is typically formed by half etching a metal sheet to form the connecting bars. The connecting bars are removed from the encapsulated package by a selected cutting, sawing, or etching means, based on a predetermined pattern.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: December 6, 2011
    Assignee: Utac Thai Limited
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 8063470
    Abstract: A leadframe for use in fabricating a no lead semiconductor package contains connecting bars between individual electrical contact pads. For embodiments having a die pad, the leadframe further includes connecting bars between the contact pads and the die pad. The lower surfaces of the connecting bars are coplanar with the lower surfaces of the contact pads and/or the die pad, and the upper surfaces of the connecting bars are recessed with respect to the upper surfaces of the contact pads and/or the die pad. The semiconductor package is fabricated by encapsulating the die and the leadframe in a molding compound and then removing the connecting bars. The leadframe is typically formed by half etching a metal sheet to form the connecting bars. The connecting bars are removed from the encapsulated package by a selected cutting, sawing, or etching means, based on a predetermined pattern.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: November 22, 2011
    Assignee: Utac Thai Limited
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Publication number: 20110241189
    Abstract: A frame includes heat slug pads coupled together in a N×M matrix such that singulation of the heat slug pads consists of one or more passes across the frame, wherein the one or more passes are parallel. A method of attaching heat slug pads to packages includes gathering a plurality of packages, preparing a heat slug frame including a N×M matrix of heat slug pads, dispensing thermally conductive material onto surfaces of the heat slug pads, attaching the plurality of packages onto the heat slug pads, and singulating the heat slug pads, wherein the singulating step consists of one or more parallel passes across the N×M matrix. A method of attaching heat slug foil to packages includes preparing a plurality of packages, laminating the heat slug foil to one side of the plurality of packages using thermally conductive material, and singulating the plurality of packages.
    Type: Application
    Filed: February 1, 2011
    Publication date: October 6, 2011
    Applicant: UTAC THAI LIMITED
    Inventor: Saravuth Sirinorakul