Abstract: A means suitable for producing and supplying exhaust gas for evaluation to be supplied to an exhaust gas purifying apparatus in a safe and stable manner and a means for correctly and accurately evaluating performance and durability of the exhaust gas purifying apparatus are provided. The PM generating apparatus 10 which can generate PM in a gas by combusting a liquid and/or gaseous fuel in the combustion chamber 2. The PM generating apparatus 10 is provided with a combustion chamber 1, a combustion air supply means 4 supplying combustion air to the combustion chamber 1, and an intermittent fuel injection means 3 which can intermittently inject the fuel to the combustion air supplied to the combustion chamber 1.

Abstract: A plate member includes a frame portion (51) provided in a state of coupling both one end portion and other end portion and mounting terminal portions (44) protruding from the one end portion and the other end portion of said frame portion (51) to approach each other, from which a PCB joint portions (46) to be a mounting portion to a PCB are formed by cutting and bending when manufacturing a magnetic element. Further, a winding number adjustment means (41), which is capable of selecting joint portions with ends of a coil and adjusting the winding number of the coil in accordance with the selection, protrudes from the one end portion and the other end portion to approach each other farther as compared to the mounting terminal portions (44).

Abstract: A means capable of supplying exhaust gas sufficiently imitating exhaust gas from actual diesel engines is provided. A PM generating apparatus has a constitution in which combustion air supplied to the space between a chassis and an outer casing via an air inlet is introduced into the space between the outer casing and an inner casing via through-holes of the outer casing, and a fuel injected by an fuel-injection means into the space between the chassis and the outer casing is introduced into the space between the outer casing and the inner casing via the through-holes of the outer casing, wherein the fuel is combusted to generate PM.

Abstract: A method for forming a semiconductor device having a polymetal gate electrode includes the steps of forming a gate oxide film on a silicon substrate, forming a polysilicon film and a tungsten film on the gate oxide film, patterning the polysilicon film and tungsten film, and thermally oxidizing the polysilicon film in an oxidizing atmosphere including water and hydrogen at a substrate-surface temperature of 850 degrees C. and a water content of 7% to 20%.

Abstract: A optical recording composition is provided that comprises a matrix and a monomer, wherein the matrix comprises a polyfunctional isocyanate, a radical-polymerizable compound and a polyfunctional alcohol, and the radical-polymerizable compound contains at least one of an amino group, a carboxyl group, an acid anhydride and an isocyanate group; and also an optical recording is provided that is formed from the optical recording composition.

Abstract: An optical module which can achieve miniaturization, high performance and cost reduction is, provided. The optical module includes a photoelectric component, a high-speed signal processing part which processes a high-speed signal photoelectrically converted by the photoelectric component, and a low-speed signal processing part which processes a low-speed signal. The high-speed signal processing part and the low-speed signal processing part are overlapped with each other in a vertical direction and electrically connected to each other.

Abstract: A magnetic element in a flat-plate shape includes a linearly-extending first flat plate being made of one of a magnetic material and a conductive material and a helical second flat plate being made of the other of the magnetic material and the conductive material, and the first flat plate is inserted into the helical structure of the second flat plate so as to alternatively weave front and back surfaces of the second flat plate.

Abstract: An azo compound and tautomer thereof represented by the following formula (1) or the formula (2): wherein R1, R2, R5, R7, R8, R10, R11, R14, R16, R17, R18, and R19 each independently represents a hydrogen atom, alkyl group, aryl group, alkoxy group, aryloxy group, alkylsulfonyl group, arylsulfonyl group, alkylthio group, arylthio group, cyano group, acyl group, carbamoyl group, amino group, nitro group, or halogen atom; R3, R4, R6, R9, R12, R13, R15, and R20 each independently represents a hydrogen atom, alkyl group, or aryl group; R1 and R2, R2 and R3, R3 and R4, R6 and R7, R7 and R8, R8 and R9, R10 and R11, R11 and R12, R12 and R13, R15 and R16, R16 and R17, R17 and R18, R18 and R19, and R19 and R20 may join to each other to form a ring structure, and A? represents a counter anion.

Abstract: A cooling structure of an electronic equipment includes substrate housing parts, an upstream side duct, a downstream side duct, an exhaust device and an air adjusting part. The substrate housing parts detachably house therein one or plurality of substrate units, and the downstream side duct allows the cooling air, which passed from the upstream side duct though the substrate housing part, to flow. The exhaust device is provided at an exhaust part to forcibly discharge air to the outside, thereby allowing the cooling air to flow to the substrate housing parts. The air adjusting part adjusts the volume for cooling air which flows to the downstream side duct.

Abstract: In a peripheral circuit region of a DRAM, two connection holes, for connecting a first layer line and a second layer line electrically are opened separately in two processes. After forming the connection holes, plugs are formed in the respective connection holes.

Abstract: A sidewall insulating film (11) made of a silicon oxide film is formed on the sidewall of a gate electrode (7) (word line) with an aim to reduce the capacitance to the word line serving as the major component of the bit line capacitance. Also, when openings for connecting the bit lines are formed above the spaces of the gate electrodes (7) (word lines) by the dry etching of a silicon oxide film (31) above contact holes (12), a silicon nitride film (19) to be an etching stopper is provided below the silicon oxide film (31) so as to reduce the amount of the bottom surface of the opening receded below the upper surface of a cap insulating film (9).

Abstract: The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

Abstract: There are disclosed a method and a apparatus for applying a strippable paint to a large-sized product finished with a sprayed coating, such as an automobile, to form a protective film on the surface of the coating. The product is conventionally kept in stock for a period of time before it is shipped. Contaminations such as dust are washed away from the surface of the product. Then, the strippable paint is applied, preliminarily dried, and non-preliminarily dried to form the protective film out of the strippable paint on the surface of the coating. This protective film is formed easily, appropriately, and reliably. The obtained protective film has a uniform and sufficient thickness. Even if the surface contains unapplied regions to which the paint should not be applied, the paint can be applied to the whole surface of the coating while avoiding the unapplied regions according to the invention. The application can be performed easily and reliably without leaving unapplied portions around the unapplied regions.

Abstract: A CMOS device includes a silicon substrate, a gate insulating film, and a gate electrode including a silicon layer doped with boron and phosphorous, a tungsten nitride layer and a tungsten layer. A ratio of a maximum boron concentration to a minimum boron concentration in a boron concentration profile across the thickness of the silicon layer is not higher than 100. The CMOS device has a lower NBTI (Negative Bias Temperature Instability) degradation.

Abstract: In a semiconductor device of a polysilicon gate electrode structure having three or more different Fermi levels, a P type polysilicon having a lowest Fermi level is disposed on a first N type surface channel MOS transistor. A first N type polysilicon having a highest Fermi level is disposed on a second N type surface channel MOS transistor. A second N type polysilicon having an intermediate Fermi level between the highest and the lowest Fermi levels and doped with both an N type impurity and a P type impurity is disposed on a P channel MOS transistor.

Abstract: A plate member includes a frame portion (51) provided in a state of coupling both one end portion and other end portion and mounting terminal portions (44) protruding from the one end portion and the other end portion of said frame portion (51) to approach each other, from which a PCB joint portions (46) to be a mounting portion to a PCB are formed by cutting and bending when manufacturing a magnetic element. Further, a winding number adjustment means (41), which is capable of selecting joint portions with ends of a coil and adjusting the winding number of the coil in accordance with the selection, protrudes from the one end portion and the other end portion to approach each other farther as compared to the mounting terminal portions (44).

Abstract: A microcapsule in which a capsule wall of the microcapsule comprises a first polymer component. A surface of the capsule wall is modified with a second polymer component that is formed from a monomer having an ethylenic unsaturated bond.

Abstract: A method for manufacturing a DRAM device on a silicon substrate includes: forming cell transistors in a memory cell area and other transistors in a peripheral circuit area; forming polysilicon plugs connected to diffused regions of the cell transistors and metallic plugs connected to diffused regions of the other transistors; heat treating at a temperature of 980 to 1,020 degrees C.; heat treating at a temperature of 700 to 850 degrees C.; implanting fluorine or boron fluoride into the diffused regions of the other transistors; and heat treating at a temperature of 500 to 850 degrees C.

Abstract: A method includes the steps of: implanting boron into a surface region of a silicon substrate to form a p+ diffused region; implanting indium into the surface of the p+ diffused region, to form an indium-implanted layer; forming a contact metal layer on the indium-implanted layer; and reacting silicon in the silicon substrate including the indium-implanted layer with metal in the contact metal layer to form a titanium silicide layer.

Abstract: A refresh characteristic of a DRAM memory cell is improved and the performance of a MISFET formed in the periphery thereof and constituting a logic circuit is improved. Each gate electrode in a memory cell area is formed of p type polycrystalline silicon, and a cap insulating film on each gate electrode and a sidewall film on the sidewall thereof are formed of a silicon oxide film. A polycrystalline silicon film formed on the gate electrodes and between the gate electrodes is polished by a CMP method, and thereby contact electrodes are formed. Also, sidewall films each composed of a laminated film of the silicon oxide film and the polycrystalline silicon film are formed on the sidewall of the gate electrodes in the logic circuit area, and these films are used as a mask to form semiconductor areas. As a result, it is possible to reduce the boron penetration and form contact electrodes in a self-alignment manner. In addition, the performance of the MISFET constituting the logic circuit can be improved.