Abstract: A solar cell module comprising a substrate, a filler, a photovoltaic element and a protective layer, wherein at least one of the substrate, the filler, the photovoltaic element and the protective layer is separable from other constituent members. Constituent members having been separated and still serviceable can be reused.

Abstract: In a zinc oxide film having a plurality of texture constituents comprised of hills each having structure wherein a first surface borders on a second surface along one curved line, texture constituents in which first surfaces the hills of the texture constituents have have an average angle of inclination in a size within the range of from 30 degrees or more to 60 degrees or less and second surfaces have an average angle of inclination in a size within the range of from 10 degrees or more to 35 degrees or less account for at least a half of the plurality of texture constituents. This enables improvement in characteristics and durability of zinc oxide films used as optical confinement layers in photovoltaic devices, and also enables formation thereof at a low cost.

Abstract: A method for forming a deposition film from an aqueous solution by electrochemical reaction includes the steps of: forming the targeted deposition film under primary deposition conditions; replacing at least part of members in contact with the solution or removing deposit on surfaces of the members; and depositing a film under secondary deposition conditions. These steps are performed in that order. Then, the deposition film is formed again under the primary deposition conditions. In the method, the resulting deposition film exhibits desired characteristics even after maintenance of the deposition apparatus.

Abstract: A refresh characteristic of a DRAM memory cell is improved and the performance of a MISFET formed in the periphery thereof and constituting a logic circuit is improved. Each gate electrode in a memory cell area is formed of p type polycrystalline silicon, and a cap insulating film on each gate electrode and a sidewall film on the sidewall thereof are formed of a silicon oxide film. A polycrystalline silicon film formed on the gate electrodes and between the gate electrodes is polished by a CMP method, and thereby contact electrodes are formed. Also, sidewall films each composed of a laminated film of the silicon oxide film and the polycrystalline silicon film are formed on the sidewall of the gate electrodes in the logic circuit area, and these films are used as a mask to form semiconductor areas. As a result, it is possible to reduce the boron penetration and form contact electrodes in a self-alignment manner. In addition, the performance of the MISFET constituting the logic circuit can be improved.

Abstract: A thermal recording material comprising, on a substrate, a thermal recording layer which includes an electron-donating dye precursor and an electron-accepting compound, wherein at least one kind of the electron-donating dye precursor is an indolylphthalide compound represented by general formula (1): wherein R1 and R2 each independently represent a hydrogen atom, an alkyl group or the like, provided that R1 and R2 do not represent a hydrogen atom at the same time, and R1 and R2 may form a bond therebetween to collectively represent a single cycloamino structure; R3 represents an alkyl group or the like; R4 and R5 each independently represent a hydrogen atom, an alkyl group or an aryl group; X1, X2, X3 and X4 each independently represent N or CH; and Y represents an oxygen atom or a sulfur atom.

Abstract: An optical module which can achieve miniaturization, high performance and cost reduction is, provided. The optical module includes a photoelectric component, a high-speed signal processing part which processes a high-speed signal photoelectrically converted by the photoelectric component, and a low-speed signal processing part which processes a low-speed signal. The high-speed signal processing part and the low-speed signal processing part are overlapped with each other in a vertical direction and electrically connected to each other.

Abstract: The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

Abstract: A semiconductor integrated circuit device is provided, in which variation in the threshold voltage of a MISFET, for example, a MISFET pair that constitute a sense amplifier, can be reduced. In a logic circuit area over which a logic circuit such as a sense amplifier circuit required to drive a memory cell is formed, n-type active areas having no gate electrode are arranged at both edges of active areas over which a p-channel MISFET pair for constituting a sense amplifier are formed. Assuming that the width between active areas nwp1 and nw1 is L4, the width between active areas nwp2 and nw2 is L6, and the width between active areas nwp1 and nwp2 is L5, (L4-L5), (L6-L5), and (L4-L6) are set equal to almost zero or smaller than twice the minimum processing dimension, so that the variation in shape of the device isolation trenches with the widths L4, L5, and L6 can be reduced, and the threshold voltage difference in the MISFET pair can be reduced.

Abstract: The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.

Abstract: A solar cell module comprising a substrate, a filler, a photovoltaic element and a protective layer, wherein at least one of the substrate, the filler, the photovoltaic element and the protective layer is separable from other constituent members. Constituent members having been separated and still serviceable can be reused.

Abstract: A microcapsule in which a capsule wall of the microcapsule comprises a first polymer component. A surface of the capsule wall is modified with a second polymer component that is formed from a monomer having an ethylenic unsaturated bond.

Abstract: An optical module which can achieve miniaturization, high performance and cost reduction is provided. The optical module includes a photoelectric component, a high-speed signal processing part which processes a high-speed signal photoelectrically converted by the photoelectric component, and a low-speed signal processing part which processes a low-speed signal. The high-speed signal processing part and the low-speed signal processing part are overlapped with each other in a vertical direction and electrically connected to each other.

Abstract: Provided is an encapsulant resin for a semiconductor that effectively functions even with a relatively small amount of an additive.

Abstract: A reduction of the junction electric field intensity is accomplished in the semiconductor regions for the sources and drains of field effects transistors. For this purpose, a structure is provided where the gate electrodes 9 of the MIS·FETQs for memory cell selection of a DRAM are buried within the trenches 7a and 7b created in the semiconductor substrate 1. The bottom corners within the trench 7b are rounded so as to have a radius of curvature in accordance with the sub-threshold coefficient of the MIS·FETQs for memory cell selection. In addition, the gate insulating film 8 within the trench 7b is made to have a laminated structure of a thermal oxide film and a CVD film.

Abstract: The present invention provides a recording material including a support having disposed thereon a recording layer that contains a diazo compound and a compound represented by formula (1): 1

Abstract: A semiconductor integrated circuit device is provided, in which variation in the threshold voltage of a MISFET, for example, a MISFET pair that constitute a sense amplifier, can be reduced. In a logic circuit area over which a logic circuit such as a sense amplifier circuit required to drive a memory cell is formed, n-type active areas having no gate electrode are arranged at both edges of active areas over which a p-channel MISFET pair for constituting a sense amplifier are formed. Assuming that the width between active areas nwp1 and nw1 is L4, the width between active areas nwp2 and nw2 is L6, and the width between active areas nwp1 and nwp2 is L5, (L4−L5), (L6−L5), and (L4−L6) are set equal to almost zero or smaller than twice the minimum processing dimension, so that the variation in shape of the device isolation trenches with the widths L4, L5, and L6 can be reduced, and the threshold voltage difference in the MISFET pair can be reduced.

Abstract: A polyethylene composition prepared by polymerizing ethylene and an optional olefin with ≧3 carbon atoms in the presence of a macromonomer, is provided. The macromonomer is a vinyl-terminated ethylene polymer prepared by polymerizing ethylene and an optional olefin with ≧3 carbon atoms, and the macromonomer has (A) Mn≧5,000, and Mw/Mn=2-5. The polyethylene composition comprises (C) branched polyethylene prepared by copolymerizing ethylene, the macromonomer and an optional olefin with ≧3 carbon atoms, and the macromonomer. The polyethylene composition has (D) a density of 0.890-0.980 g/cm3, (E) Mw=30,000-10,000,000, (F) Mw/Mn=2-30, (G) a long chain branch frequency of 0.01-3 per 1,000 C atoms, and (H) a shrinking factor (g′ value) of 0.1-0.9 as measured by GPC/intrinsic-viscosity. The polyethylene composition can be finely divided particles having (P) a powder bulk density of 0.15-0.50 g/cm3.

Abstract: A DRAM of an open bit line structure has a cell area smaller than that of a DRAM of a folded bit line structure and is susceptible to noise. A conventional DRAM of an open bit line structure has a large bit line capacitance and is susceptible to noise or has a large cell area. There has been no DRAM of an open bit line structure having a small bit line capacitance, unsusceptible to noise and having a small cell area. The present invention forms capacitor lower electrode plug holes not aligned with bit lines to reduce bit line capacitance. Bit lines are formed in a small width, capacitor lower electrode plugs are dislocated from positions corresponding to the centers of the bit lines in directions away from the bit lines and the contacts are formed in a reduced diameter to avoid increasing the cell area. Thus a semiconductor storage device of an open bit line structure resistant to noise and having a small cell area is provided.

Abstract: A film of zinc oxide electrochemically deposited from an aqueous solution is subjected to heat treatment at a temperature equal to or higher than 150° C. and equal to or lower than 400° C. in a nitrogen or inert gas atmosphere that contains oxygen, thereby obtaining a zinc oxide film that is low in electric resistance without impairing the light transmittance of the zinc oxide film.

Abstract: The invention relates to a cooling structure of an electronic equipment needing forced-air-cooling by fans and so force and has an object to enhance a cooling capacity and enhance a mounting efficiency of the substrate units. The cooling structure of an electronic equipment needing forced-air-cooling comprises, to achieve the above object, substrate housing parts, an upstream side duct, a downstream side duct, exhaust means and air adjusting means. The substrate housing parts detachably house therein one or plurality of substrate units, and the downstream side duct allows the air for cooling which passed from the upstream side duct through the substrate housing part to flow. The exhaust means is provided at the exhaust part to forcibly discharge air to the outside air, thereby allowing the air for cooling to flow to the substrate housing parts, and the air adjusting means adjusts the air for cooling which flows to the downstream side duct.