Patents by Inventor Satoru Yamada

Satoru Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120153404
    Abstract: An anti-fuse device includes a gate electrode on a semiconductor substrate, a gate insulating layer between the semiconductor substrate and the gate electrode, junction regions in the semiconductor substrate adjacent the gate electrode, and at least one anti-breakdown material layer between the junction regions, the gate insulating layer being between the gate electrode and the anti-breakdown material layer.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 21, 2012
    Inventors: Woo-song AHN, Satoru YAMADA, Young-Jin Choi
  • Publication number: 20120142160
    Abstract: A method of fabricating a semiconductor device is disclosed, the method generally including the steps of: forming a gate dielectric layer on a semiconductor substrate;forming a gate electrode on the gate dielectric layer;forming an etch stop layer on the gate electrode;forming a capacitor on the semiconductor substrate adjacent to the gate electrode;after forming the capacitor, forming a contact hole passing through the etch stop layer on the gate electrode;and, diffusing deuterium into the gate dielectric layer through the contact hole.
    Type: Application
    Filed: August 24, 2011
    Publication date: June 7, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Uk Han, Nam-Ho Jeon, Satoru Yamada, Young-Jin Choi
  • Publication number: 20120070188
    Abstract: An electroconductive member excellent in durability even when applying direct current voltage over a long period of time is provided.
    Type: Application
    Filed: November 28, 2011
    Publication date: March 22, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yuka Hirakoso, Satoru Yamada, Seiji Tsuru, Kazuhiro Yamauchi, Norifumi Muranaka
  • Publication number: 20120049256
    Abstract: A semiconductor device includes a buried well, first and second active regions, an isolation layer, and a low resistance region. The buried well is disposed on a substrate and has impurity ions of a first conductivity type. The first and second active regions are disposed on the buried well and each have impurity ions of a second conductivity type, which is different from the first conductivity type. The isolation layer is disposed between the first and second active regions. The low resistance region is disposed between the isolation layer and the substrate and has impurity ions of the second conductivity type. The concentration of impurity ions in the low resistance region is greater than the concentration of the impurity ions in each of the first and second active regions.
    Type: Application
    Filed: July 12, 2011
    Publication date: March 1, 2012
    Inventors: Jun-Hee Lim, Satoru Yamada, Sung-Duk Hong
  • Publication number: 20120027456
    Abstract: Provided is the following electro-conductive member for electrophotography. The electrical resistance of the member hardly increases even by long-term energization, and hence the member is conducive to stable formation of high-quality electrophotographic images. The electro-conductive member for electrophotography, comprises: an electro-conductive mandrel and an electro-conductive layer, wherein said electro-conductive layer contains an A-B-A type triblock copolymer in which an A-block is a polystyrene having a cation exchange group, and a B-block is a polyolefin, and wherein said A-B-A type triblock copolymer forms a microphase-separated structure comprising a matrix phase formed of said B-block, and one phase formed of the A-block and having a structure selected from the group consisting of a cylindrical structure, a bicontinuous structure and a lamellar structure.
    Type: Application
    Filed: October 7, 2011
    Publication date: February 2, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Norifumi Muranaka, Satoru Yamada, Seiji Tsuru, Kazuhiro Yamauchi, Yuka Hirakoso
  • Publication number: 20120020700
    Abstract: Provided is an electroconductive member that can demonstrate stable performance for a long period of time with an electric resistance value being hardly changed even by electrical conduction for a long period of time. An electroconductive member has a conductive mandrel, and a conductive layer provided on the outer periphery of the conductive mandrel. The conductive layer includes an organic polymeric compound as a binder, and a conductive particle dispersed in the organic polymeric compound, and the particle includes an organic-inorganic hybrid polymer having a specific structure.
    Type: Application
    Filed: September 27, 2011
    Publication date: January 26, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Satoru Yamada, Seiji Tsuru, Kazuhiro Yamauchi, Norifumi Muranaka, Yuka Hirakoso
  • Publication number: 20120019938
    Abstract: A curable resin composition for a cemented lens capable of manufacturing a cemented lens excellent in heat resistance in reflowing treatment at a temperature of 260° C. or higher and adhesion between lenses, and capable of reducing manufacturing costs of lenses and capable of lightening lenses, is provided. The curable resin composition for a cemented lens includes: (a) a compound represented by the following formula (I); and (b) a radical polymerization initiator. wherein R1 represents a hydrogen atom or an alkyl group; and Z1 represents a cyclic structure together with two carbon atoms and a sulfur atom.
    Type: Application
    Filed: March 9, 2010
    Publication date: January 26, 2012
    Applicant: Fujifilm Corporation
    Inventor: Satoru Yamada
  • Publication number: 20120001271
    Abstract: A four transistor layout can include an isolation region that defines an active region, the active region extending along first and second different directions. A common source region of the four transistors extends from a center of the active region along both the first and second directions to define four quadrants of the active region that are outside the common source region. Four drain regions are provided, a respective one of which is in a respective one of the four quadrants and spaced apart from the common source region. Finally, four gate electrodes are provided, a respective one of which is in a respective one of the four quadrants between the common source region and a respective one of the four drain regions. A respective gate electrode includes a vertex and first and second extending portions, the first extending portions extending from the vertex along the first direction and the second extending portions extending from the vertex along the second direction.
    Type: Application
    Filed: January 5, 2011
    Publication date: January 5, 2012
    Inventors: Kyo-Suk Chae, Satoru Yamada, Sang-Yeon Han, Young-Jin Choi, Wook-Je Kim
  • Publication number: 20110284422
    Abstract: In a mounting device for disk drive, two HDDs are retained in an outer case that forms the mounting device, and an inner case with guiding grooves each including an oblique groove and a parallel groove formed thereon is provided. When the inner case is extracted, the HDD on the front side is caused to ascend in the vertical direction to a position where the HDD on the front side does not obstruct the extraction of the HDD on the back side.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 24, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Satoru Yamada
  • Publication number: 20110260821
    Abstract: A coil component includes a core formed by a magnetic material, a coil embedded in the core, a part of a terminal portion of the coil protruded from a side surface of the core, and a tabular terminal, a part thereof protruded from the side surface of the core and partly connected with the protruded part of the terminal portion of the coil. The protruded part of the terminal portion of the coil and the protruded part of the tabular terminal are respectively bent toward the bottom surface side of the core along the side surface of the core, and the protruded and bent part of the terminal portion of the coil is arranged between the protruded and bent part of the tabular terminal and the core.
    Type: Application
    Filed: April 25, 2011
    Publication date: October 27, 2011
    Applicant: SUMIDA CORPORATION
    Inventors: Satoru YAMADA, Yoshiyuki Hatayama
  • Publication number: 20110241099
    Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate, a first node impurity region, a second node impurity region, a third node impurity region, and an insulating layer. The first through third node impurity regions are disposed in the semiconductor substrate. Each of the first through third node impurity regions has a longitudinal length, a transverse length and a thickness respectively corresponding to first through third directions, which are perpendicular with respect to each other. The first node impurity region is parallel to the second and third node impurity regions, which are disposed in the substantially same line. The insulating layer is located between the first through third node impurity regions in the semiconductor substrate.
    Type: Application
    Filed: March 1, 2011
    Publication date: October 6, 2011
    Inventors: Woo-Song Ahn, Satoru Yamada, Young-Jin Choi, Seung-Uk Han, Kyo-Suk Chae
  • Publication number: 20110228656
    Abstract: In order to record an interference fringe pattern in a recording layer of a medium, a plurality of laser beams are caused to interfere so as to form interference fringes in the recording layer; and during a time period over which the plurality of laser beams are caused to interfere, the following steps are continuously performed: (1) producing a signal varying according to a shift of a specific position in the recording layer; and (2) shifting a fringe-forming position in the recording layer by changing a phase of at least one of the laser beams or moving the recording layer based upon the signal produced in the step (1).
    Type: Application
    Filed: June 6, 2008
    Publication date: September 22, 2011
    Applicant: FUJIFILM CORPORATION
    Inventors: Yoshihisa Usami, Satoru Yamada, Toshio Sasaki, Hiroyuki Suzuki, Makoto Kamo
  • Publication number: 20110198700
    Abstract: A semiconductor device includes a substrate including a memory cell region and a peripheral region and a field pattern including an insulating region disposed on a nitride liner in a trench in the substrate adjacent an active region. The field pattern and the active region extend in parallel through the cell and peripheral regions. The device also includes a transistor in the peripheral region including a source/drain region in the active region. The device further includes an insertion pattern including an elongate conductive region disposed in the substrate and extending along a boundary between the field pattern and the active region in the peripheral region. Fabrication methods are also described.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 18, 2011
    Inventors: Won-Kyung Park, Satoru Yamada, Young Jin Choi, Kyo-Suk Chae
  • Publication number: 20110170344
    Abstract: A semiconductor device includes a sub word line driver. A first sub word line and a second sub word line transmit an operation signal to a memory cell. A main word line optionally sends the operation signal to the first sub word line and the second sub word line. A switching transistor is disposed between the first sub word line and the second sub word line. A gate of the switching transistor is connected the main word line.
    Type: Application
    Filed: October 25, 2010
    Publication date: July 14, 2011
    Inventors: KYO-SUK CHAE, Satoru Yamada, Hyuk-joon Kwon, Won-kyung Park, Hyoung-ho Ko
  • Patent number: 7977015
    Abstract: The present invention provides a polymerizable compound denoted by general formula (1). In general formula (1), A denotes an oxygen atom, sulfur atom, or NR, R denotes a hydrogen atom, alkyl group, aryl group, or heterocyclic group, X denotes a hydrogen atom, polymerizable group, optionally polymerizable group-substituted alkyl group or the like, B and C each independently denote a hydrogen atom, halogen atom, polymerizable group, optionally polymerizable group-substituted alkyl group or the like, wherein at least one from among B and C denotes a hydrogen atom and at least one from among X, Y, and Z comprises a polymerizable group, m denotes an integer ranging from 0 to 5, n denotes an integer ranging from 0 to 2, and Q denotes an elimination group.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: July 12, 2011
    Assignee: Fujifilm Corporation
    Inventors: Hiroyuki Suzuki, Satoru Yamada
  • Publication number: 20110108962
    Abstract: An example semiconductor device includes a trench formed in a semiconductor substrate to define an active region, a filling dielectric layer provided within the trench, an oxide layer provided between the filling dielectric layer and the trench, a nitride layer provided between the oxide layer and the filling dielectric layer, and a barrier layer provided between the oxide layer and the nitride layer.
    Type: Application
    Filed: October 4, 2010
    Publication date: May 12, 2011
    Inventors: Seunguk Han, Satoru Yamada, Young Jin Choi
  • Patent number: 7936021
    Abstract: In a fin field effect transistor (Fin FET) and a method of manufacturing the Fin FET, the Fin FET includes an active pattern inside which insulating layer patterns are formed, an isolation layer pattern enclosing a sidewall of the active pattern such that an opening exposing a sidewall of the active pattern located between the insulating layer patterns is formed, a gate electrode formed on the active pattern to fill the opening, impurity regions formed at portions of the active pattern adjacent to sidewalls of the gate electrode, an insulating interlayer covering the active pattern and the gate electrode and contact plugs formed through portions of the insulating interlayer and the active pattern adjacent to the sidewalls of the gate electrode such that the contact plug makes contact with the impurity region.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: May 3, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hoon Jeon, Satoru Yamada, Sang-Yeon Han, Jong-Man Park, Si-Ok Sohn
  • Publication number: 20110085309
    Abstract: An electronic device includes a housing having an accommodation space, a first support body being slidably insertable into the accommodation space in parallel with a predetermined plane, a second support body coupled with the first support body rotatably around a rotation axis parallel to a front side of the housing and being rotatable between a reference attitude disposed in the same plane with respect to the first support body and an inclined attitude disposed at a given angle with respect to the first support body, and a drive mechanism for changing the attitude of the second support body.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 14, 2011
    Applicant: FUJITSU LIMITED
    Inventor: SATORU YAMADA
  • Patent number: 7923174
    Abstract: The present invention provides a holographic recording composition and a holographic recording medium comprising a recording layer formed with the holographic recording composition. The holographic recording composition comprises a bifunctional or greater isocyanate, a polyfunctional alcohol comprising a bifunctional alcohol and a trifunctional or greater alcohol, a titanocene-based radical polymerization initiator, a bifunctional or greater acrylate monomer, and an amidine salt denoted by General Formula (1). In General Formula (1), R1, R2, and R3 each independently denote an alkyl group, aryl group, amino group, or acyl group, R1 and R2 may be bonded together to form a ring, R2 and R3 may be bonded together to form a ring, and A? denotes an anion.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: April 12, 2011
    Assignee: Fujifilm Corporation
    Inventors: Satoru Yamada, Makoto Kamo, Toshio Sasaki
  • Publication number: 20110076829
    Abstract: Provided are semiconductor devices and methods of forming the same. In the semiconductor devices and methods of forming the same, different insulating patterns are disposed around a cell gate pattern and a peripheral gate pattern to impose different heat budgets around the cell gate pattern and the peripheral gate pattern. For this purpose, a semiconductor substrate having a cell array region and a peripheral circuit region is prepared. First and second cell gate patterns are disposed in the cell array region. A peripheral gate pattern is disposed in the peripheral circuit region to be to adjacent to the second cell gate pattern. Buried insulating patterns are disposed around the first and second cell gate patterns. Planarization insulating patterns are disposed around the peripheral gate pattern.
    Type: Application
    Filed: December 3, 2010
    Publication date: March 31, 2011
    Inventors: Wook-Je Kim, Satoru Yamada, Shin-Deuk Kim