Patents by Inventor Satoshi Toriumi

Satoshi Toriumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220037532
    Abstract: A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.
    Type: Application
    Filed: October 19, 2021
    Publication date: February 3, 2022
    Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
  • Patent number: 11217703
    Abstract: A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: January 4, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Toriumi, Takashi Hamada, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Ryunosuke Honda, Shunpei Yamazaki
  • Publication number: 20200357925
    Abstract: A minute transistor is provided. A semiconductor device includes a semiconductor over a substrate, a first conductor and a second conductor over the semiconductor, a first insulator over the first conductor and the second conductor, a second insulator over the semiconductor, a third insulator over the second insulator, and a third conductor over the third insulator. The third insulator is in contact with a side surface of the first insulator. The semiconductor includes a first region where the semiconductor overlaps with a bottom surface of the first conductor, a second region where the semiconductor overlaps with a bottom surface of the second conductor, and a third region where the semiconductor overlaps with a bottom surface of the third conductor. The length between a top surface of the semiconductor and the bottom surface of the third conductor is longer than the length between the first region and the third region.
    Type: Application
    Filed: June 18, 2020
    Publication date: November 12, 2020
    Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
  • Patent number: 10693013
    Abstract: A minute transistor with low parasitic capacitance, high frequency characteristics, favorable electrical characteristics, stable electrical characteristics, and low off-state current is provided. A semiconductor device includes a semiconductor over a substrate, a source and a drain over the semiconductor, a first insulator over the source and the drain, a second insulator over the semiconductor, a third insulator in contact with a side surface of the first insulator and over the second insulator, and a gate over the third insulator. The semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping with the gate. The length between a top surface of the third region of the semiconductor and a bottom surface of the gate is longer than the length between the first region and the third region.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Toriumi, Takashi Hamada, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Ryunosuke Honda, Shunpei Yamazaki
  • Patent number: 10147747
    Abstract: A semiconductor device includes a first layer, a second layer over the first layer, and a third layer over the second layer. The first layer includes a first transistor. The third layer includes a second transistor. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The second layer includes a first insulating film, a second insulating film, and a conductive film. The conductive film has a function of electrically connecting the first transistor and the second transistor. The first insulating film is over and in contact with the conductive film. The second insulating film is provided over the first insulating film. The second insulating film includes a region with a carbon concentration of greater than or equal to 1.77×1017 atoms/cm3 and less than or equal to 1.0×1018 atoms/cm3.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: December 4, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Toriumi, Yoshikazu Hiura, Mai Sugikawa
  • Patent number: 10050132
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. One feature resides in forming an oxide semiconductor film over an oxygen-introduced insulating film, and then forming the source and drain electrodes with an antioxidant film thereunder. Here, in the antioxidant film, the width of a region overlapping with the source and drain electrodes is longer than the width of a region not overlapping with them. The transistor formed as such has less defects in the channel region, which will improve reliability of the semiconductor device.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: August 14, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Tetsuhiro Tanaka, Masashi Tsubuku, Toshihiko Takeuchi, Ryo Tokumaru, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toshiya Endo
  • Patent number: 9882061
    Abstract: A transistor with favorable electrical characteristics is provided. A minute transistor is provided. Provided is a semiconductor device including a first insulator over a substrate, a second insulator over the first insulator, a semiconductor over the second insulator, a first conductor and a second conductor over the semiconductor, a third insulator over the semiconductor, a fourth insulator over the third insulator, a third conductor over the fourth insulator, and a fifth insulator over the first insulator, the first conductor, and the second conductor. In the semiconductor device, the second insulator and the third insulator each include at least one element other than oxygen included in the semiconductor, respectively, and the semiconductor includes a region having a carbon concentration of 3×1018 atoms/cm3 or lower.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: January 30, 2018
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Shunpei Yamazaki, Satoshi Toriumi, Takashi Hamada
  • Publication number: 20170352746
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. Oxygen is introduced into a surface of an insulating film, and then, an oxide semiconductor, a layer which is capable of blocking oxygen, a gate insulating film, and other films which composes a transistor are formed. For at least one of the first gate insulating film and the insulating film, three signals in Electron Spin Resonance Measurement are each observed in a certain range of g-factor. Reducing the sum of the spin densities of the signals will improve reliability of the semiconductor device.
    Type: Application
    Filed: July 31, 2017
    Publication date: December 7, 2017
    Inventors: Shunpei YAMAZAKI, Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Tetsuhiro TANAKA, Masashi TSUBUKU, Toshihiko TAKEUCHI, Ryo TOKUMARU, Mitsuhiro ICHIJO, Satoshi TORIUMI, Takashi OHTSUKI, Toshiya ENDO
  • Patent number: 9806096
    Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: October 31, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
  • Patent number: 9755083
    Abstract: Electrical characteristics of a semiconductor device including the oxide semiconductor are improved. Furthermore, a highly reliable transistor with small variation in electrical characteristics is manufactured. An oxynitride insulating film functioning as a base insulating film and a transistor in contact with the oxynitride insulating film are provided. The transistor includes an oxide semiconductor film in contact with the oxynitride insulating film functioning as a base insulating film. The total amount of gas having a mass-to-charge ratio of 30 released from the oxynitride insulating film by heat treatment and double of the amount of a gas having a mass-to-charge ratio of 32 released from the oxynitride insulating film by heat treatment is greater than or equal to 5×1015/cm2 and less than or equal to 5×1016/cm2, or greater than or equal to 5×1015/cm2 and less than or equal to 3×1016/cm2.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: September 5, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kosei Noda, Satoshi Toriumi, Kazuki Tanemura
  • Patent number: 9720277
    Abstract: A liquid crystal display device which includes a pair of substrates, a pixel including a liquid crystal element between the pair of substrates, a lighting portion provided on the outer side of the pair of substrates, a first polarizing member between the pair of substrates and the lighting portion, a reflective member provided outside the lightning portion, a second polarizing member on a side opposite to the first polarizing member with the pair of substrates provided therebetween, and a first optical sensor and a second optical sensor. The first optical sensor has a function of detecting illuminance of external light, and the second optical sensor has a function of detecting a color tone of polarized light emitted from the pixel portion. The lightning portion can emits light having a predetermined wavelength depending on the color tone of the pixel portion which is detected by the second optical sensor.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: August 1, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Toriumi, Toshiyuki Isa
  • Patent number: 9722056
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. Oxygen is introduced into a surface of an insulating film, and then, an oxide semiconductor, a layer which is capable of blocking oxygen, a gate insulating film, and other films which composes a transistor are formed. For at least one of the first gate insulating film and the insulating film, three signals in Electron Spin Resonance Measurement are each observed in a certain range of g-factor. Reducing the sum of the spin densities of the signals will improve reliability of the semiconductor device.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: August 1, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Tetsuhiro Tanaka, Masashi Tsubuku, Toshihiko Takeuchi, Ryo Tokumaru, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toshiya Endo
  • Publication number: 20170018631
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. The semiconductor device includes an oxide semiconductor film over an insulating surface, an antioxidant film over the insulating surface and the oxide semiconductor film, a pair of electrodes in contact with the antioxidant film, a gate insulating film over the pair of electrodes, and a gate electrode which is over the gate insulating film and overlaps with the oxide semiconductor film. In the antioxidant film, a width of a region overlapping with the pair of electrodes is longer than a width of a region not overlapping with the pair of electrodes.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 19, 2017
    Inventors: Shunpei YAMAZAKI, Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Tetsuhiro TANAKA, Masashi TSUBUKU, Toshihiko TAKEUCHI, Ryo TOKUMARU, Mitsuhiro ICHIJO, Satoshi TORIUMI, Takashi OHTSUKI, Toshiya ENDO
  • Publication number: 20160365454
    Abstract: Electrical characteristics of a semiconductor device including the oxide semiconductor are improved. Furthermore, a highly reliable transistor with small variation in electrical characteristics is manufactured. An oxynitride insulating film functioning as a base insulating film and a transistor in contact with the oxynitride insulating film are provided. The transistor includes an oxide semiconductor film in contact with the oxynitride insulating film functioning as a base insulating film. The total amount of gas having a mass-to-charge ratio of 30 released from the oxynitride insulating film by heat treatment and double of the amount of a gas having a mass-to-charge ratio of 32 released from the oxynitride insulating film by heat treatment is greater than or equal to 5×1015/cm2 and less than or equal to 5×1016/cm2, or greater than or equal to 5×1015/cm2 and less than or equal to 3×1016/cm2.
    Type: Application
    Filed: August 24, 2016
    Publication date: December 15, 2016
    Inventors: Kosei NODA, Satoshi TORIUMI, Kazuki TANEMURA
  • Patent number: 9519183
    Abstract: A liquid crystal display device which includes a pair of substrates, a pixel including a liquid crystal element between the pair of substrates, a lighting portion provided on the outer side of the pair of substrates, a first polarizing member between the pair of substrates and the lighting portion, a reflective member provided outside the lightning portion, a second polarizing member on a side opposite to the first polarizing member with the pair of substrates provided therebetween, and a first optical sensor and a second optical sensor. The first optical sensor has a function of detecting illuminance of external light, and the second optical sensor has a function of detecting a color tone of polarized light emitted from the pixel portion. The lightning portion can emits light having a predetermined wavelength depending on the color tone of the pixel portion which is detected by the second optical sensor.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: December 13, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Toriumi, Toshiyuki Isa
  • Patent number: 9478664
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. The semiconductor device includes an oxide semiconductor film over an insulating surface, an antioxidant film over the insulating surface and the oxide semiconductor film, a pair of electrodes in contact with the antioxidant film, a gate insulating film over the pair of electrodes, and a gate electrode which is over the gate insulating film and overlaps with the oxide semiconductor film. In the antioxidant film, a width of a region overlapping with the pair of electrodes is longer than a width of a region not overlapping with the pair of electrodes.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Tetsuhiro Tanaka, Masashi Tsubuku, Toshihiko Takeuchi, Ryo Tokumaru, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toshiya Endo
  • Publication number: 20160300952
    Abstract: A minute transistor is provided. A semiconductor device includes a semiconductor over a substrate, a first conductor and a second conductor over the semiconductor, a first insulator over the first conductor and the second conductor, a second insulator over the semiconductor, a third insulator over the second insulator, and a third conductor over the third insulator. The third insulator is in contact with a side surface of the first insulator. The semiconductor includes a first region where the semiconductor overlaps with a bottom surface of the first conductor, a second region where the semiconductor overlaps with a bottom surface of the second conductor, and a third region where the semiconductor overlaps with a bottom surface of the third conductor. The length between a top surface of the semiconductor and the bottom surface of the third conductor is longer than the length between the first region and the third region.
    Type: Application
    Filed: April 5, 2016
    Publication date: October 13, 2016
    Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
  • Publication number: 20160276487
    Abstract: A transistor with favorable electrical characteristics is provided. A minute transistor is provided. Provided is a semiconductor device including a first insulator over a substrate, a second insulator over the first insulator, a semiconductor over the second insulator, a first conductor and a second conductor over the semiconductor, a third insulator over the semiconductor, a fourth insulator over the third insulator, a third conductor over the fourth insulator, and a fifth insulator over the first insulator, the first conductor, and the second conductor. In the semiconductor device, the second insulator and the third insulator each include at least one element other than oxygen included in the semiconductor, respectively, and the semiconductor includes a region having a carbon concentration of 3×1018 atoms/cm3 or lower.
    Type: Application
    Filed: March 15, 2016
    Publication date: September 22, 2016
    Inventors: Shunpei YAMAZAKI, Satoshi TORIUMI, Takashi HAMADA
  • Patent number: 9450102
    Abstract: Electrical characteristics of a semiconductor device including the oxide semiconductor are improved. Furthermore, a highly reliable transistor with small variation in electrical characteristics is manufactured. An oxynitride insulating film functioning as a base insulating film and a transistor in contact with the oxynitride insulating film are provided. The transistor includes an oxide semiconductor film in contact with the oxynitride insulating film functioning as a base insulating film. The total amount of gas having a mass-to-charge ratio of 30 released from the oxynitride insulating film by heat treatment and double of the amount of a gas having a mass-to-charge ratio of 32 released from the oxynitride insulating film by heat treatment is greater than or equal to 5×1015/cm2 and less than or equal to 5×1016/cm2, or greater than or equal to 5×1015/cm2 and less than or equal to 3×1016/cm2.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: September 20, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kosei Noda, Satoshi Toriumi, Kazuki Tanemura
  • Patent number: 9450132
    Abstract: An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the butler layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: September 20, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sho Kato, Yoshikazu Hiura, Akihisa Shimomura, Takashi Ohtsuki, Satoshi Toriumi, Yasuyuki Arai