Patents by Inventor Satoshi Toriumi

Satoshi Toriumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100151664
    Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.
    Type: Application
    Filed: February 25, 2010
    Publication date: June 17, 2010
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
  • Publication number: 20100139766
    Abstract: A highly-efficient photoelectric conversion device is provided without complicating the manufacturing process. The photoelectric conversion device includes a unit cell having a semiconductor junction, in which a first impurity semiconductor layer having one conductivity type, a semiconductor layer including a first semiconductor region having a larger proportion of a crystalline semiconductor than an amorphous semiconductor and a second semiconductor region having a larger proportion of an amorphous semiconductor than a crystalline semiconductor and including both a radial crystal and a crystal having a needle-like growing end in the amorphous semiconductor, and a second impurity semiconductor layer having a conductivity type opposite to the conductivity type of the first impurity semiconductor layer are stacked in this order.
    Type: Application
    Filed: November 23, 2009
    Publication date: June 10, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi TORIUMI, Toshiya ENDO, Eriko OHMORI
  • Patent number: 7727773
    Abstract: A method of manufacturing an analytical sample by a secondary ion mass spectrometry method is provided, which comprises a step of forming a separation layer over a substrate, a step of forming one of a thin film and a thin-film stack body to be analyzed over the separation layer, a step of forming an opening portion in one of the thin film and the thin-film stack body, a step of attaching a supporting body to one of a surface of the thin film and a surface of a top layer of the thin-film stack body, and a step of separating one of the thin film and the thin-film stack body from the substrate.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: June 1, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Satoshi Toriumi
  • Publication number: 20100071767
    Abstract: An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the buffer layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.
    Type: Application
    Filed: September 23, 2009
    Publication date: March 25, 2010
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sho KATO, Yoshikazu Hiura, Akihisa Shimomura, Takashi Ohtsuki, Satoshi Toriumi, Yasuyuki Arai
  • Patent number: 7670881
    Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: March 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
  • Publication number: 20090305469
    Abstract: A stack including at least an insulating layer, a first electrode, and a first impurity semiconductor layer is provided over a supporting substrate; a first semiconductor layer to which an impurity element imparting one conductivity type is added is formed over the first impurity semiconductor layer; a second semiconductor layer to which an impurity element imparting the one conductivity type is added is formed over the first semiconductor layer under a condition different from that of the first semiconductor layer; crystallinity of the first semiconductor layer and crystallinity of the second semiconductor layer are improved by a solid-phase growth method to form a second impurity semiconductor layer; an impurity element imparting the one conductivity type and an impurity element imparting a conductivity type different from the one conductivity type are added to the second impurity semiconductor layer; and a gate electrode layer is formed via a gate insulating layer.
    Type: Application
    Filed: May 18, 2009
    Publication date: December 10, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Sho KATO, Satoshi TORIUMI, Fumito ISAKA, Hideto OHNUMA
  • Patent number: 7611930
    Abstract: In a case of forming a bottom-gate thin film transistor, a step of forming a microcrystalline semiconductor film over a gate insulating film by a plasma CVD method, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film are performed. In the step of forming the microcrystalline semiconductor film, the pressure in the reaction chamber is set at or below 10?5 Pa once, the substrate temperature is set in the range of 120° C. to 220° C., plasma is generated by introducing hydrogen and a silicon gas, hydrogen plasma is made to act on a reaction product formed on a surface of the gate insulating film to perform removal while performing film formation. Moreover, the plasma is generated by applying a first high-frequency electric power of an HF band a second high-frequency electric power of a VHF band superimposed on each other.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: November 3, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Sachiaki Teduka, Makoto Furuno, Satoshi Toriumi, Yasuhiro Jinbo, Koji Dairiki
  • Publication number: 20090269875
    Abstract: An embrittlement layer is formed in the single crystal semiconductor substrate and a first impurity semiconductor layer, a first electrode, and an insulating layer are formed on one surface of the single crystal semiconductor substrate. After attaching the insulating layer and a supporting substrate to each other to bond the single crystal semiconductor substrate and the supporting substrate, the single crystal semiconductor substrate is separated along the embrittlement layer to form a stack including a first single crystal semiconductor layer. A first semiconductor layer and a second semiconductor layer are formed over the first single crystal semiconductor layer. A second single crystal semiconductor layer is formed by solid phase growth. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer is formed on the second single crystal semiconductor layer. A second electrode is formed on the second impurity semiconductor layer.
    Type: Application
    Filed: April 16, 2009
    Publication date: October 29, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Sho KATO, Satoshi TORIUMI, Fumito ISAKA
  • Publication number: 20090267066
    Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.
    Type: Application
    Filed: April 13, 2009
    Publication date: October 29, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Satoshi TORIUMI, Tomokazu YOKOI, Makoto FURUNO
  • Publication number: 20090269906
    Abstract: A semiconductor substrate is provided by a method suitable for mass production. Further, a semiconductor substrate having an excellent characteristic with effective use of resources is provided.
    Type: Application
    Filed: April 20, 2009
    Publication date: October 29, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Sho KATO, Satoshi TORIUMI, Fumito ISAKA
  • Publication number: 20090224260
    Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.
    Type: Application
    Filed: March 6, 2009
    Publication date: September 10, 2009
    Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
  • Publication number: 20090139447
    Abstract: It is an object to provide a method for forming a crystalline semiconductor film in which a transition layer is not formed or which includes a thinner transition layer than that in a crystalline semiconductor film which is formed by conventional method, and a method for manufacturing a thin film transistor to which the above method is applied. A semiconductor film including hydrogen is formed over a substrate or over an insulating film formed over a substrate. The semiconductor film including hydrogen undergoes surface wave plasma treatment, which is performed in a gas including hydrogen and/or a rare gas, to generate a crystal nucleus in the semiconductor film including hydrogen. The crystal nucleus is grown to form a crystalline semiconductor film by employing a plasma CVD method.
    Type: Application
    Filed: November 25, 2008
    Publication date: June 4, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Satoshi Toriumi
  • Publication number: 20090114915
    Abstract: A separation layer containing a halogen element is formed over a glass substrate by a plasma CVD method; a semiconductor element is formed over the separation layer; and separation is then performed inside the separation layer or at its interface, so that the large-area glass substrate and the semiconductor element are detached from each other. In order to perform detachment at the interface between the glass substrate and the separation layer, the separation layer may have concentration gradient of the halogen element, and the halogen element is contained more near the interface between the separation layer and the glass substrate than in the other areas.
    Type: Application
    Filed: May 19, 2008
    Publication date: May 7, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Satoshi TORIUMI
  • Publication number: 20090102027
    Abstract: An object of the present invention is to provide a semiconductor device including an insulating layer with a high dielectric strength voltage, a low dielectric constant, and low hygroscopicity. Another object of the present invention is to provide an electronic appliance with high performance and high reliability, which uses the semiconductor device. An insulator containing nitrogen, such as silicon oxynitride or silicon nitride oxide, and an insulator containing nitrogen and fluorine, such as silicon oxynitride added with fluorine or silicon nitride oxide added with fluorine, are alternately deposited so that an insulating layer is formed. By sandwiching an insulator containing nitrogen and fluorine between insulators containing nitrogen, the insulator containing nitrogen and fluorine can be prevented from absorbing moisture and thus a dielectric strength voltage can be increased. Further, an insulator contains fluorine so that a dielectric constant can be reduced.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 23, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi TORIUMI, Noriyoshi SUZUKI
  • Patent number: 7504343
    Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: March 17, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
  • Publication number: 20090047758
    Abstract: In a case of forming a bottom-gate thin film transistor, a step of forming a microcrystalline semiconductor film over a gate insulating film by a plasma CVD method, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film are performed. In the step of forming the microcrystalline semiconductor film, the pressure in the reaction chamber is set at or below 10?5 Pa once, the substrate temperature is set in the range of 120° C. to 220° C., plasma is generated by introducing hydrogen and a silicon gas, hydrogen plasma is made to act on a reaction product formed on a surface of the gate insulating film to perform removal while performing film formation. Moreover, the plasma is generated by applying a first high-frequency electric power of an HF band a second high-frequency electric power of a VHF band superimposed on each other.
    Type: Application
    Filed: August 5, 2008
    Publication date: February 19, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Sachiaki TEDUKA, Makoto FURUNO, Satoshi TORIUMI, Yasuhiro JINBO, Koji DAIRIKI
  • Publication number: 20090047759
    Abstract: After a gate insulating film is formed over a gate electrode, in order to improve the quality of a microcrystalline semiconductor film which is formed in an early stage of deposition, a film near an interface with the gate insulating film is formed under a first deposition condition in which a deposition rate is low but the quality of a film to be formed is high, and then, a film is further deposited under a second deposition condition in which a deposition rate is high. Then, a buffer layer is formed to be in contact with the microcrystalline semiconductor film. Further, plasma treatment with a rare gas such as argon or hydrogen plasma treatment is performed before formation of the film under the first deposition condition for removing adsorbed water on a substrate.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 19, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Sachiaki Teduka, Satoshi Toriumi, Makoto Furuno, Yasuhiro Jinbo, Koji Dairiki, Hideaki Kuwabara
  • Publication number: 20090047761
    Abstract: An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
    Type: Application
    Filed: August 12, 2008
    Publication date: February 19, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Sachiaki Teduka, Satoshi Toriumi, Makoto Furuno, Yasuhiro Jinbo, Koji Dairiki, Hideaki Kuwabara
  • Patent number: 7465966
    Abstract: A new film formation method that makes it possible to form a film with a little concentration of contaminants from a material and to form a film on a low heat-resistant member is proposed. Further, a method for forming a film that can keep semiconductor properties is proposed. In the film formation method of the present invention, a first film that is to be a target is formed by employing plasma CVD, and the first film is sputtered, thereby forming the second film on a surface of the substrate to be processed in one chamber. By employing the film formation method of the present invention for a protective film of a semiconductor element, deterioration of a semiconductor device can be controlled.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: December 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuhiro Ichijo, Taketomi Asami, Kunihiko Fukuchi, Satoshi Toriumi
  • Patent number: 7368335
    Abstract: The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: May 6, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toru Mitsuki, Kenji Kasahara, Tamae Takano, Chiho Kokubo, Shunpei Yamazaki, Takeshi Shichi