Patents by Inventor Seiichi Nakatani

Seiichi Nakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9076714
    Abstract: There is provided a substrate for light-emitting element, including a mounting surface on which a light-emitting element is to be mounted, the mounting surface being one of two opposed main surfaces of the substrate. The substrate of the present invention is provided with a protection element for the light-emitting element, the protection element comprising a voltage-dependent resistive layer embedded in a body of the substrate, and comprising a first electrode and a second electrode each of which is in connection with the voltage-dependent resistive layer wherein the light-emitting element is to be mounted such that it is positioned in an overlapping relation with the voltage-dependent resistive layer.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: July 7, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Seiichi Nakatani, Tatsuo Ogawa, Kazuo Kimura, Shigetoshi Segawa
  • Publication number: 20150159025
    Abstract: Disclosed herein is a conductive paste for forming a conductive film, including: (A) a conductive powder; (B) as a first additive, at least one selected from a first group consisting of Se, Te, a compound containing Se, and a compound containing Te; (C) as a second additive, a compound containing at least one element selected from a second group consisting of V, Nb, Ta, Sb, Bi, Mn, Ge, Si, and W; (D) glass frit; (E) an organic binder; and (F) a solvent.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 11, 2015
    Applicant: KYOTO ELEX CO., LTD.
    Inventors: Kazuya Takagi, Seiichi Nakatani, Kenichi Harigae, Nobuo Ochiai, Masashi Nakayama, Kairi Otani, Nozomu Hayashida
  • Publication number: 20150155251
    Abstract: There is provided a semiconductor device. The semiconductor device of the present invention includes a semiconductor element and a metal buffer layer in an electrical connection to the semiconductor element. The metal buffer layer and the semiconductor element are in a connection with each other by mutual surface contact of the metal buffer layer and the semiconductor element. The metal buffer layer is an external connection terminal used for a mounting with respect to a secondary mount substrate, and the metal buffer layer serves as a buffer part having a stress-relaxation effect between the semiconductor element and the secondary mount substrate.
    Type: Application
    Filed: August 2, 2013
    Publication date: June 4, 2015
    Inventors: Koji Kawakita, Susumu Sawada, Seiichi Nakatani, Yoshihisa Yamashita
  • Publication number: 20150084080
    Abstract: There is provided a light-emitting device comprising a light-emitting element and a substrate for light-emitting element. The light-emitting element is in a mounted state on a mounting surface of the substrate, the mounting surface being one of two opposed main surfaces of the substrate. The substrate is provided with a protection element for the light-emitting element, the protection element comprising a voltage-dependent resistive layer embedded in the substrate, and comprising a first electrode and a second electrode each of which is in connection with the voltage-dependent resistive layer. The mounted light-emitting element is in an overlapping relation with the voltage-dependent resistive layer. A reflective layer is provided on at least one of the substrate and the voltage-dependent resistive layer such that the reflective layer is located adjacent to the first electrode which is in contact with a substrate exposure surface of the voltage-dependent resistive layer.
    Type: Application
    Filed: February 14, 2013
    Publication date: March 26, 2015
    Inventors: Koji Kawakita, Seiichi Nakatani, Tatsuo Ogawa, Susumu Sawada
  • Publication number: 20150076545
    Abstract: There is provided a method for manufacturing an electronic component package. The method includes the steps: (i) disposing a metal pattern layer on an adhesive carrier; (ii) placing at least one kind of electronic component on the adhesive carrier, the placed electronic component being not overlapped with respect to the metal pattern layer; (iii) forming a sealing resin layer on the adhesive carrier, and thereby producing a precursor of the electronic component package; (iv) peeling off the adhesive carrier of the precursor, whereby the metal pattern layer and an electrode of the electronic component are exposed at the surface of the sealing resin layer; and (v) forming a metal plating layer such that the metal plating layer is in contact with the exposed surface of the metal pattern layer and the exposed surface of the electrode of the electronic component.
    Type: Application
    Filed: August 2, 2013
    Publication date: March 19, 2015
    Applicant: Panasonic Intellectual Property Management Co., Lt
    Inventors: Seiichi Nakatani, Yoshihisa Yamashita, Koji Kawakita, Susumu Sawada
  • Patent number: 8975626
    Abstract: There is provided a flexible semiconductor device. The flexible semiconductor device of the present invention comprises a metal layer comprising a gate electrode, a source electrode and a drain electrode; a metal oxide film made from a metal which constitutes the metal layer and formed over a surface region of the metal layer; and a semiconductor layer formed above the gate electrode via the metal oxide film. In the flexible semiconductor device, uncovered portions, each of which is not covered with the metal oxide film, are locally formed in the surface region of the metal layer; and also electrical connections are formed between the source electrode and the semiconductor layer and between the drain electrode and the semiconductor layer via the uncovered portions.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: March 10, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takeshi Suzuki, Kenichi Hotehama, Koichi Hirano, Seiichi Nakatani
  • Publication number: 20150008467
    Abstract: There is provided a light-emitting device comprising a light-emitting element. The light-emitting device of the present invention comprises an electrode part for the light-emitting element; a reflective layer provided on the electrode part; and the light-emitting element provided on the reflective layer such that the light-emitting element is in contact with at least a part of the reflective layer, wherein the light-emitting element and the electrode part are in an electrical connection with each other by mutual surface contact via the at least a part of the reflective layer, wherein the electrode part serves as a supporting layer for supporting the light-emitting element, and wherein the electrode part extends toward the outside of the light-emitting element and beyond the light-emitting element.
    Type: Application
    Filed: January 28, 2013
    Publication date: January 8, 2015
    Inventors: Susumu Sawada, Seiichi Nakatani, Koji Kawakita, Yoshihisa Yamashita
  • Patent number: 8895373
    Abstract: There is provided a flexible semiconductor device. The flexible semiconductor device of the present invention comprising a support layer, a semiconductor structure portion formed on the support layer, and a resin film formed on the semiconductor structure portion. The resin film comprises an opening formed by a laser irradiation therein, and also an electroconductive member which is in contact with the surface of the semiconductor structure portion is disposed within the opening of the resin film.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: November 25, 2014
    Assignee: Panasonic Corporation
    Inventors: Takeshi Suzuki, Kenichi Hotehama, Seiichi Nakatani, Koichi Hirano, Tatsuo Ogawa
  • Patent number: 8887383
    Abstract: An electrode structure 100 on which a solder bump is placed includes an electrode pattern 50 made of an electrode-constituting material selected from the group consisting of Cu, Al, Cr, and Ti, a Ni layer 52 formed on a part of the electrode pattern 50, a Pd layer 54 formed on at least a part of a region other than the part of the electrode pattern 50, and an Au layer 56 formed on the Ni layer 52 and the Pd layer 54.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: November 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Yasushi Taniguchi, Seiichi Nakatani, Takashi Kitae, Seiji Karashima, Kenichi Hotehama
  • Publication number: 20140151225
    Abstract: An electrochemical detector is an electrochemical detector for detecting a substance in a liquid by generating a redox cycle, the electrochemical detector comprising: a first working electrode having a first electrode surface, a second working electrode having a second electrode surface, and a plurality of insulating spacer particles, wherein the first and second electrode surfaces are placed so as to face each other so that an electric field is formed between the first and second electrode surfaces, and the plurality of spacer particles are placed along the first and second electrode surfaces so as to separate the first and second electrode surfaces from each other.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 5, 2014
    Applicant: Panasonic Corporation
    Inventors: Yoshihisa Yamashita, Seiichi Nakatani, Tetsuyoshi Ogura, Koichi Hirano, Makoto Takahashi, Satoshi Arimoto
  • Publication number: 20140151085
    Abstract: There is provided a transparent electrode comprising a supporting substrate, a first transparent electrically-conductive film provided on the supporting substrate, a transparent insulating film provided on the first transparent electrically-conductive film, and a second transparent electrically-conductive film provided on the transparent insulating film. In the transparent electrode of the present invention, all of the first transparent electrically-conductive film, the second transparent electrically-conductive film and the transparent insulating film provided therebetween comprise a metal compound, and the first transparent electrically-conductive film and the second transparent electrically-conductive film have a crystalline structure, whereas the transparent insulating film has an amorphous structure.
    Type: Application
    Filed: May 17, 2013
    Publication date: June 5, 2014
    Applicant: Panasonic Corporation
    Inventors: Takashi Ichiryu, Yoshihisa Yamashita, Seiichi Nakatani
  • Publication number: 20140131076
    Abstract: In the present invention, a ceramic substrate composite comprising, on a ceramic substrate, a conductor pattern composite and an insulating layer is provided. The ceramic substrate composite of the present invention is characterized in that the conductor pattern composite and the insulating layer are provided on the ceramic substrate with each other so that the insulating layer overlaps a part of the conductor pattern composite; and wherein the conductor pattern composite is composed of a conductor portion and an insulating portion that exists locally in the conductor portion, the insulating portion being an insulating material that constitutes the insulating layer.
    Type: Application
    Filed: December 21, 2012
    Publication date: May 15, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Taiji Kuroiwa, Seiichi Nakatani, Yoshihisa Yamashita, Susumu Sawada
  • Publication number: 20140124777
    Abstract: A method for manufacturing a build-up substrate, the build-up substrate comprising an insulating layer and a wiring pattern layer stacked over a circuit substrate, said method comprising the steps of: (i) applying a photoactive metal oxide precursor material to one or both sides of the circuit substrate with a wiring pattern, and drying the applied photoactive metal oxide precursor material to form an insulating film; (ii) forming an opening for a via hole in the insulating film by exposure and development of the insulating film; (iii) applying a heat treatment to the insulating film to convert the insulating film into a metal oxide film, thereby forming a build-up insulating layer of the metal oxide film; and (iv) plating the build-up insulating layer to form via holes in the openings, forming a metal layer on the build-up insulating layer, and etching the metal layer to form a build-up wiring pattern; and (v) repeating the steps from (i) to (iv) at least one time.
    Type: Application
    Filed: October 29, 2012
    Publication date: May 8, 2014
    Applicant: Panasonic Corporation
    Inventors: Seiichi Nakatani, Koji Kawakita, Susumu Sawada, Yoshihisa Yamashita
  • Patent number: 8709293
    Abstract: There is provided a flip-chip mounting resin composition which can be used for a flip-chip mounting process that is high in productivity and reliability and thus can be applicable to a flip-chip mounting of a next-generation LSI. This flip-chip mounting resin composition comprises a resin, metal particles and a convection additive 12 that boils upon heating the resin 13. Upon the heating of the resin 13, the metal particles melt and the boiling convection additive 12 convects within the resin 13. This flip-chip mounting resin composition is supplied between a circuit substrate 10 and a semiconductor chip 20, and subsequently the resin 13 is heated so that the molten metal particles self-assemble into the region between each electrode of the circuit substrate and each electrode of the semiconductor chip. As a result, an electrical connection is formed between each electrode of the circuit substrate and each electrode of the semiconductor chip.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: April 29, 2014
    Assignee: Panasonic Corporation
    Inventors: Takashi Kitae, Seiji Karashima, Koichi Hirano, Toshiyuki Kojima, Seiichi Nakatani, Shingo Komatsu, Yoshihisa Yamashita
  • Patent number: 8691683
    Abstract: [Means for Solving Problem] A semiconductor chip 20 having a plurality of electrode terminals 12 is held to oppose a circuit board 21 having a plurality of connection terminals 11 with a given gap provided therebetween, and the semiconductor chip 20 and the circuit board 21 in this state are dipped in a dipping bath 40 containing a melted resin 14 including melted solder particles for a given period of time. In this dipping process, the melted solder particles self-assemble between the connection terminals 11 of the circuit board 21 and the electrode terminals 12 of the semiconductor chip 20, so as to form connectors 22 between these terminals. Thereafter, the semiconductor chip 20 and the circuit board 21 are taken out of the dipping bath 40, and the melted resin 14 having permeated into the gap between the semiconductor chip 20 and the circuit board 21 is cured, so as to complete a flip-chip mounting body.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: April 8, 2014
    Assignee: Panasonic Corporation
    Inventors: Koichi Hirano, Seiji Karashima, Takashi Ichiryu, Yoshihiro Tomita, Seiichi Nakatani
  • Publication number: 20140038366
    Abstract: There is provided a flexible semiconductor device. The flexible semiconductor device of the present invention comprising a support layer, a semiconductor structure portion formed on the support layer, and a resin film formed on the semiconductor structure portion. The resin film comprises an opening formed by a laser irradiation therein, and also an electroconductive member which is in contact with the surface of the semiconductor structure portion is disposed within the opening of the resin film.
    Type: Application
    Filed: October 7, 2013
    Publication date: February 6, 2014
    Applicant: Panasonic Corporation
    Inventors: Takeshi SUZUKI, Kenichi HOTEHAMA, Seiichi NAKATANI, Koichi HIRANO, Tatsuo OGAWA
  • Patent number: 8617943
    Abstract: A method for fabricating a flexible semiconductor device includes: preparing a layered film 80 including a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40 which are sequentially formed; etching the first metal layer 10 to form a gate electrode 12g; compression bonding a resin layer 50 to a surface of the layered film 80 provided with the gate electrode 12g to allow the gate electrode 12g to be embedded in the resin layer 50; and etching the second metal layer 40 to form a source electrode 42s and a drain electrode 42d, wherein the inorganic insulating layer 20 on the gate electrode 12g functions as a gate insulating film 22, and the semiconductor layer 30 between the source electrode 42s and drain electrode 42d on the inorganic insulating layer 20 functions as a channel 32.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: December 31, 2013
    Assignee: Panasonic Corporation
    Inventors: Takashi Ichiryu, Seiichi Nakatani, Koichi Hirano, Yoshihisa Yamashita, Shingo Komatsu
  • Patent number: 8593720
    Abstract: Provided is an electronic paper that permits a high-quality, large area to be easily created. Also provided is a method for producing the electronic paper. The electronic paper comprises: a first substrate upon which first electrodes are formed and a second substrate upon which second electrodes are formed, said first substrate and second substrate disposed so as to face each other; and a plurality of cell spaces constituting pixels between said first substrate and second substrate. The first substrate comprises a plurality of first sheet members, each having a first electrode formed thereon. By disposing a cover substrate on said first sheet members, each with a partition wall therebetween, a plurality of subsheet formations comprising the plurality of cell spaces partitioned by the partition walls are formed, and the first electrodes are connected in between adjacent subsheet formations.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Koichi Hirano, Masami Nakagawa, Seiichi Nakatani
  • Patent number: 8581247
    Abstract: There is provided a flexible semiconductor device. The flexible semiconductor device of the present invention comprising a support layer, a semiconductor structure portion formed on the support layer, and a resin film formed on the semiconductor structure portion. The resin film comprises an opening formed by a laser irradiation therein, and also an electroconductive member which is in contact with the surface of the semiconductor structure portion is disposed within the opening of the resin film.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: November 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Takeshi Suzuki, Kenichi Hotehama, Seiichi Nakatani, Koichi Hirano, Tatsuo Ogawa
  • Patent number: 8525178
    Abstract: A flexible semiconductor device includes an insulating film on which a semiconductor element is formed. The top and bottom surfaces of the insulating film have a top wiring pattern layer and a bottom wiring pattern layer, respectively. The semiconductor element includes a semiconductor layer formed on the top surface of the insulating film, a source electrode and a drain electrode formed on the top surface of the insulating film so as to contact the semiconductor layer, and a gate electrode formed on the bottom surface of the insulating film so as to be opposite the semiconductor layer. A first thickness, which is the thickness of the insulating film facing the source electrode, the drain electrode, the top wiring pattern layer, and the bottom wiring pattern layer, is greater than a second thickness, which is the thickness of the insulating film between the gate electrode and the semiconductor layer.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: September 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Takashi Ichiryu, Seiichi Nakatani, Koichi Hirano