Patents by Inventor Sen Huang

Sen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170012033
    Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate having a cell region defined thereon, in which the cell region includes a first edge and a second edge extending along a first direction; and a plurality of patterns on the substrate extending along the first direction, in which the patterns includes a plurality of first patterns and a plurality of second patterns, and one of the first patterns closest to the first edge and one of the second patterns closest to the second edge are different.
    Type: Application
    Filed: August 3, 2015
    Publication date: January 12, 2017
    Inventors: Ching-Wen Hung, Chih-Sen Huang, Yi-Wei Chen
  • Patent number: 9541379
    Abstract: A displacement detection device includes an image sensor, a light source and a processing unit. The image sensor is configured to successively capture images. The light source provides light with an emission frequency and an emission duration for the image sensor in capturing the images. The processing unit is configured to calculate a displacement according to the images and to adjust both the emission frequency and the emission duration according to the displacement.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: January 10, 2017
    Assignee: PIXART IMAGING INC
    Inventors: Yu-Hao Huang, Ming-Tsan Kao, Sen-Huang Huang
  • Patent number: 9543211
    Abstract: A manufacturing method of a semiconductor structure includes the following steps. Gate structures are formed on a semiconductor substrate. A source/drain contact is formed between two adjacent gate structures. The source/drain contact is recessed by a recessing process. A top surface of the source/drain contact is lower than a top surface of the gate structure after the recessing process. A stop layer is formed on the gate structures and the source/drain contact after the recessing process. A top surface of the stop layer on the source/drain contact is lower than the top surface of the gate structure. A semiconductor structure includes the semiconductor substrate, the gate structures, a gate contact structure, and the source/drain contact. The source/drain contact is disposed between two adjacent gate structures, and the top surface of the source/drain contact is lower than the top surface of the gate structure.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 10, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Yu-Cheng Tung, Kun-Yuan Liao, Feng-Yi Chang, En-Chiuan Liou, Wei-Hao Huang, Chih-Sen Huang, Ching-Wen Hung
  • Patent number: 9536914
    Abstract: There is provided a front side illuminated (FSI) semiconductor structure with improved light absorption efficiency which is configured to provide a reflecting layer on a bottom of the FSI semiconductor structure to enhance the light absorption efficiency, wherein the reflecting layer is manufactured in the packaging process or the semiconductor process.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: January 3, 2017
    Assignee: PIXART IMAGING INC.
    Inventors: Sen-Huang Huang, Huan-Kun Pan, Yi-Chang Chang, Ching-Wei Chen
  • Publication number: 20160379931
    Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, in which the substrate includes a first metal gate and a second metal gate thereon, a first hard mask on the first metal gate and a second hard mask on the second metal gate, and a first interlayer dielectric (ILD) layer around the first metal gate and the second metal gate. Next, the first hard mask and the second hard mask are used as mask to remove part of the first ILD layer for forming a recess, and a patterned metal layer is formed in the recess, in which the top surface of the patterned metal layer is lower than the top surfaces of the first hard mask and the second hard mask.
    Type: Application
    Filed: September 7, 2016
    Publication date: December 29, 2016
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Ching-Wen Hung, Jia-Rong Wu, Tsung-Hung Chang, Yi-Hui Lee, Yi-Wei Chen
  • Patent number: 9530778
    Abstract: Semiconductor devices having metal gate include a substrate, a first nFET device formed thereon, and a second nFET device formed thereon. The first nFET device includes a first n-metal gate, and the first n-metal gate includes a third bottom barrier metal layer and an n type work function metal layer. The n type work function metal layer directly contacts the third bottom barrier layer. The second nFET device includes a second n-metal gate and the second n-metal gate includes a second bottom barrier metal layer, the n type work function metal layer, and a third p type work function metal layer sandwiched between the second bottom barrier metal layer and the n type work function metal layer. The third p type work function metal layer of the second nFET device and the third bottom barrier metal layer of the first nFET device include a same material.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: December 27, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chao-Hung Lin, Chih-Kai Hsu, Li-Wei Feng, Shih-Hung Tsai, Chien-Ting Lin, Jyh-Shyang Jenq, Ching-Wen Hung, Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Yi-Kuan Wu, Chih-Sen Huang, Yi-Wei Chen
  • Publication number: 20160372476
    Abstract: Semiconductor devices and method of manufacturing such semiconductor devices are provided for improved FinFET memory cells to avoid electric short often happened between metal contacts of a bit cell, where the meal contacts are positioned next to a dummy gate of a neighboring dummy edge cell. In one embodiment, during the patterning of a gate layer on a substrate surface, an improved gate slot pattern is used to extend the lengths of one or more gate slots adjacent bit lines so as to pattern and sectionalize a dummy gate line disposed next to metal contacts of an active memory cell. In another embodiment, during the patterning of gate lines, the distances between one or more dummy gates lines disposed adjacent an active memory cell are adjusted such that their locations within dummy edge cells are shifted in position to be away from metal contacts of the active memory cell.
    Type: Application
    Filed: June 17, 2015
    Publication date: December 22, 2016
    Inventors: Ching-Wen Hung, Chih-Sen Huang, Shih-Fang Tzou, Yi-Wei Chen, Yung-Feng Cheng, Li-Ping Huang, Chun-Hsien Huang, Chia-Wei Huang, Yu-Tse Kuo
  • Patent number: 9519859
    Abstract: A deep structured semantic module (DSSM) is described herein which uses a model that is discriminatively trained based on click-through data, e.g., such that a conditional likelihood of clicked documents, given respective queries, is maximized, and a condition likelihood of non-clicked documents, given the queries, is reduced. In operation, after training is complete, the DSSM maps an input item into an output item expressed in a semantic space, using the trained model. To facilitate training and runtime operation, a dimensionality-reduction module (DRM) can reduce the dimensionality of the input item that is fed to the DSSM. A search engine may use the above-summarized functionality to convert a query and a plurality of documents into the common semantic space, and then determine the similarity between the query and documents in the semantic space. The search engine may then rank the documents based, at least in part, on the similarity measures.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: December 13, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Po-Sen Huang, Xiaodong He, Jianfeng Gao, Li Deng, Alejandro Acero, Larry P. Heck
  • Publication number: 20160353192
    Abstract: An earphone cord managing device of the invention has a resilient bushing, which can clip and be fixed onto an earphone cord, and a fixing cover for fixing the resilient bushing. One of resilient members of the resilient bushing is integrally formed with a loop body. A gap for passage of the earphone cord is formed on an annular body of the loop body. When necessary, the earphone cord may be firstly wound a number of turns, and then the wound earphone cord is buckled into the loop body of the resilient bushing to achieve the object of rapidly and really storing and managing the earphone cord.
    Type: Application
    Filed: May 29, 2015
    Publication date: December 1, 2016
    Inventor: Po-Sen Huang
  • Publication number: 20160351575
    Abstract: The present invention provides a semiconductor structure, including a substrate, a plurality of fin structures, a plurality of gate structures, a dielectric layer and a plurality of contact plugs. The substrate has a memory region. The fin structures are disposed on the substrate in the memory region, each of which stretches along a first direction. The gate structures are disposed on the fin structures, each of which stretches along a second direction. The dielectric layer is disposed on the gate structures and the fin structures. The contact plugs are disposed in the dielectric layer and electrically connected to a source/drain region in the fin structure. From a top view, the contact plug has a trapezoid shape or a pentagon shape. The present invention further provides a method for forming the same.
    Type: Application
    Filed: July 7, 2015
    Publication date: December 1, 2016
    Inventors: Ching-Wen Hung, Wei-Cyuan Lo, Ming-Jui Chen, Chia-Lin Lu, Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Yi-Kuan Wu, Chih-Sen Huang, Yi-Wei Chen, Tan-Ya Yin, Chia-Wei Huang, Shu-Ru Wang, Yung-Feng Cheng
  • Publication number: 20160332470
    Abstract: The present disclosure provides a dye ribbon for sublimation thermal transfer printing including a ribbon body and a dye layer. The ribbon body includes a substrate and a lubricating and thermal resistant material. The lubricating and thermal resistant material is dispersed in the substrate, and the content of which is 0.5-20% of weight of the substrate. The dye layer is disposed on the ribbon body.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 17, 2016
    Inventors: Tze-Wei LIU, Chien-Sen HUANG
  • Publication number: 20160328027
    Abstract: There is provided an optical navigation device including an image sensor, a processing unit, a storage unit and an output unit. The image sensor is configured to successively capture images. The processing unit is configured to calculate a current displacement according to the images and to compare the current displacement or an accumulated displacement with a threshold so as to determine an outputted displacement. The storage unit is configured to save the accumulated displacement. The output unit is configured to output the outputted displacement with a report rate.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 10, 2016
    Inventors: Yu-Hao HUANG, Ming-Tsan KAO, Sen-Huang HUANG
  • Publication number: 20160321321
    Abstract: A deep structured semantic module (DSSM) is described herein which uses a model that is discriminatively trained based on click-through data, e.g., such that a conditional likelihood of clicked documents, given respective queries, is maximized, and a condition likelihood of non-clicked documents, given the queries, is reduced. In operation, after training is complete, the DSSM maps an input item into an output item expressed in a semantic space, using the trained model. To facilitate training and runtime operation, a dimensionality-reduction module (DRM) can reduce the dimensionality of the input item that is fed to the DSSM. A search engine may use the above-summarized functionality to convert a query and a plurality of documents into the common semantic space, and then determine the similarity between the query and documents in the semantic space. The search engine may then rank the documents based, at least in part, on the similarity measures.
    Type: Application
    Filed: July 12, 2016
    Publication date: November 3, 2016
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Po-Sen Huang, Xiaodong He, Jianfeng Gao, Li Deng, Alejandro Acero, Larry P. Heck
  • Publication number: 20160315007
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a gate structure thereon and a first interlayer dielectric (ILD) layer surrounding the gate structure; removing part of the gate structure; forming a first mask layer on the first ILD layer and the gate structure; removing the first mask layer on the first ILD layer and part of the first mask layer on the gate structure for forming a first hard mask on the gate structure; forming a second mask layer on the first ILD layer, the first hard mask, and the gate structure; and planarizing the second mask layer to form a second hard mask on the gate structure, in which the top surfaces of the first hard mask, the second hard mask, and the first ILD layer are coplanar.
    Type: Application
    Filed: July 4, 2016
    Publication date: October 27, 2016
    Inventors: En-Chiuan Liou, Chih-Wei Yang, Chih-Sen Huang, Yu-Cheng Tung
  • Publication number: 20160315171
    Abstract: A method for manufacturing a semiconductor device having a metal gate includes forming a filling layer and a high-K gate dielectric layer in the first recess between a pair of spacers, wherein the high-K gate dielectric layer and the filling layer are stacked in the first recess sequentially, and an exposed top surface of the high-K gate dielectric layer and a top surface of the filling layer are lower than a top surface of each spacer; and removing a part of each spacer and widening the first recess on the top surface of the filling layer to form a second recess, wherein a width of the second recess is larger than a width of the first recess.
    Type: Application
    Filed: June 1, 2015
    Publication date: October 27, 2016
    Inventors: Yu-Hsiang Hung, Chao-Hung Lin, Chih-Kai Hsu, Ssu-I Fu, Jyh-Shyang Jenq, Jun-Jie Wang, En-Chiuan Liou, Chih-Wei Yang, Chih-Sen Huang, Ching-Wen Hung, Hung-Chan Lin, Yu-Hsiang Lin
  • Patent number: 9471808
    Abstract: A file management system comprises an identification device, an administration device, and a supervisory device. A first computing processor of the administration device generates an encrypted file from an original file and encryption information, and stores the encryption information into the identification device. The first computing processor further defines file management information for access control of the encrypted file, and the first computing processor also stores the file management information into the identification device. A second processor of the supervisory device loads the encryption information and the file management information in the identification device to control the usage of the encrypted file. The second computing processor further records the file usage information into the identification device, and transmits to the administration device.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: October 18, 2016
    Assignees: INWELLCOM TECHNOLOGY CO., LTD.
    Inventors: Jian-Jr Lin, Ke-Sen Huang
  • Patent number: 9466564
    Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate having a gate structure thereon and a first interlayer dielectric (ILD) layer surrounding the gate structure; a first hard mask on the gate structure; and a second hard mask on the gate structure, wherein the first hard mask is adjacent to two sides of the second hard mask and the first hard mask and the first hard mask comprises silicon nitride.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: October 11, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Chih-Wei Yang, Chih-Sen Huang, Yu-Cheng Tung
  • Patent number: 9464756
    Abstract: A head strap includes a head band and a pair of holders. The pair of holders are connected to two ends of the head band. Each of the pair of holders includes a receiving portion. The receiving portion defines a receiving cavity with a cutout. The disclosure also provides an earphone assembly.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: October 11, 2016
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventor: Po-Sen Huang
  • Patent number: 9466521
    Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate; a first metal gate on the substrate; a first hard mask on the first metal gate; an interlayer dielectric (ILD) layer on top of and around the first metal gate; and a patterned metal layer embedded in the ILD layer, in which the top surface of the patterned metal layer is lower than the top surface of the first hard mask.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: October 11, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Ching-Wen Hung, Jia-Rong Wu, Tsung-Hung Chang, Yi-Hui Lee, Yi-Wei Chen
  • Publication number: 20160284641
    Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate having a gate structure thereon and a first interlayer dielectric (ILD) layer surrounding the gate structure; a first hard mask on the gate structure; and a second hard mask on the gate structure, wherein the first hard mask is adjacent to two sides of the second hard mask and the first hard mask and the first hard mask comprises silicon nitride.
    Type: Application
    Filed: April 22, 2015
    Publication date: September 29, 2016
    Inventors: En-Chiuan Liou, Chih-Wei Yang, Chih-Sen Huang, Yu-Cheng Tung