Patents by Inventor Seong Hoon Jeong

Seong Hoon Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210013306
    Abstract: A semiconductor device includes a substrate including a first active pattern and a second active pattern, a device isolation layer filling a first trench between the first and second active patterns, the device isolation layer including a silicon oxide layer doped with helium, a helium concentration of the device isolation layer being higher than a helium concentration of the first and second active patterns, and a gate electrode crossing the first and second active patterns.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 14, 2021
    Inventors: Kyungin CHOI, Hyunchul SONG, Sunjung KIM, Taegon KIM, Seong Hoon JEONG
  • Patent number: 10847611
    Abstract: A semiconductor device includes a substrate including a first active pattern and a second active pattern, a device isolation layer filling a first trench between the first and second active patterns, the device isolation layer including a silicon oxide layer doped with helium, a helium concentration of the device isolation layer being higher than a helium concentration of the first and second active patterns, and a gate electrode crossing the first and second active patterns.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: November 24, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyungin Choi, Hyunchul Song, Sunjung Kim, Taegon Kim, Seong Hoon Jeong
  • Patent number: 10538529
    Abstract: A crystalline modification of triazolopyrazine derivatives binds to a hepatocyte growth factor (HGF) to activate phosphorylation, thereby significantly inhibiting the activity of c-Met kinase triggering cell proliferation, migration, and formation of new blood vessels. Therefore, the compound of the present application may be effectively used for the treatment or prevention of various hyper proliferative disorders mediated by hyper proliferation activation of cells and excessive angiogenesis.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: January 21, 2020
    Assignee: ABION Inc
    Inventors: Seong-Hoon Jeong, Ki-Hyun Kim, Nam-Ah Kim
  • Publication number: 20190393303
    Abstract: A semiconductor device includes a substrate including a first active pattern and a second active pattern, a device isolation layer filling a first trench between the first and second active patterns, the device isolation layer including a silicon oxide layer doped with helium, a helium concentration of the device isolation layer being higher than a helium concentration of the first and second active patterns, and a gate electrode crossing the first and second active patterns.
    Type: Application
    Filed: January 9, 2019
    Publication date: December 26, 2019
    Inventors: Kyungin CHOI, Hyunchul SONG, Sunjung KIM, Taegon KIM, Seong Hoon JEONG
  • Publication number: 20190270747
    Abstract: A crystalline modification of triazolopyrazine derivatives binds to a hepatocyte growth factor (HGF) to activate phosphorylation, thereby significantly inhibiting the activity of c-Met kinase triggering cell proliferation, migration, and formation of new blood vessels. Therefore, the compound of the present application may be effectively used for the treatment or prevention of various hyper proliferative disorders mediated by hyper proliferation activation of cells and excessive angiogenesis.
    Type: Application
    Filed: January 24, 2018
    Publication date: September 5, 2019
    Applicant: ABION Inc.
    Inventors: Seong-Hoon JEONG, Ki-Hyun KIM, Nam-Ah KIM
  • Publication number: 20190252540
    Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.
    Type: Application
    Filed: April 25, 2019
    Publication date: August 15, 2019
    Inventors: Sung-Min Kim, Kyung-Seok Oh, Cheol Kim, Heon-Jong Shin, Jong-Ryeol Yoo, Hyun-Jung Lee, Seong-Hoon Jeong
  • Patent number: 10379983
    Abstract: A simulation apparatus and a distribution simulation system are disclosed. The simulation apparatus, according to one example, includes a simulation executer configured to execute a simulation task, a data storage configured to store data related to the simulation task based on a data storage policy that is set in advance of the execution of the simulation tasks, and a data updater configured to update the data stored in the data storage to most recent data by comparing the data stored in the data storage with data stored in another simulation apparatus.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: August 13, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Chul Cho, Seong-Hoon Jeong, Jin-Sae Jung
  • Patent number: 10319858
    Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 11, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Min Kim, Kyung-Seok Oh, Cheol Kim, Heon-Jong Shin, Jong-Ryeol Yoo, Hyun-Jung Lee, Seong-Hoon Jeong
  • Patent number: 10304120
    Abstract: The present invention provides a merchandise sales service device based on dynamic scene change, a merchandise sales system based on dynamic scene change, a method for selling merchandise based on dynamic scene change, and a non-transitory computer readable storage medium having computer program recorded thereon. That is, it is possible to transmit information about a commodity and image information of the commodity to user equipment by efficiently configuring images and dynamically changing the images in a commodity purchase procedure. Accordingly, a user can acquire detailed information about a commodity and carefully purchase the commodity, similar to actually purchasing the commodity at an offline store. Further, it is possible to reduce the rate of returning of purchased commodities for the seller of the commodities.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: May 28, 2019
    Assignee: ELEVEN STREET CO., LTD.
    Inventors: Seong Hoon Jeong, Sung Bak Baek
  • Publication number: 20190013401
    Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.
    Type: Application
    Filed: September 11, 2018
    Publication date: January 10, 2019
    Inventors: Sung-Min KIM, Kyung-Seok OH, Cheol KIM, Heon-Jong SHIN, Jong-Ryeol YOO, Hyun-Jung LEE, Seong-Hoon JEONG
  • Publication number: 20180327472
    Abstract: Provided is a pharmaceutical formulation comprising a modified IL-7 protein. More particularly, it comprises (a) a modified IL-7 fusion protein; (b) a basal buffer with a concentration of 10 to 50 mM; (c) a sugar with a concentration of 2.5 to 5 w/v %; and (d) a surfactant with a concentration of 0.05 to 6 w/v %. Such pharmaceutical formulation of a modified IL-7 fusion protein does not show aggregates formation, but shows protective effects on proteins under stress conditions such as oxidation or agitation, and thus can effectively be used for the treatment of a patient.
    Type: Application
    Filed: November 2, 2016
    Publication date: November 15, 2018
    Applicant: GENEXINE, INC.
    Inventors: Donghoon CHOI, Changyong EUN, Seong Hoon JEONG, Jun Yeul LIM
  • Patent number: 10103266
    Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: October 16, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Min Kim, Kyung-Seok Oh, Cheol Kim, Heon-Jong Shin, Jong-Ryeol Yoo, Hyun-Jung Lee, Seong-Hoon Jeong
  • Publication number: 20180261677
    Abstract: A semiconductor device includes a gate insulating layer disposed on a substrate, a first work function tuning layer disposed on the gate insulating layer, a lower barrier conductive layer on and in contact with the first work function tuning layer, and an upper barrier conductive layer on and in contact with the lower barrier conductive layer. The upper barrier conductive layer and the lower barrier conductive layer include a material in common, e.g., they may each include a titanium nitride (TiN) layer.
    Type: Application
    Filed: July 19, 2017
    Publication date: September 13, 2018
    Inventors: Byoung Hoon LEE, Hyeon Jin KIM, Hoon Joo NA, Sung In SUH, Chan Hyeong LEE, Hu Yong LEE, Seong Hoon JEONG, Sang Jin HYUN
  • Patent number: 10056491
    Abstract: A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper region. The middle region has lateral surfaces with a slope less steep than the lateral surfaces of the upper region. An isolation region is on a lateral surface of the lower region of the fin active region. A gate electrode structure is provided. A gate dielectric structure having an oxidation oxide layer and a deposition oxide layer, while having a thickness greater than half a width of the upper region of the fin active region is provided. The deposition oxide layer is between the gate electrode structure and the fin active region and the gate electrode structure and the isolation region, and the oxidation oxide layer is between the fin active region and the deposition oxide layer.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: August 21, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong Hoon Jeong, Hong Bum Park, HanMei Choi, Jae Young Park, Seung Hyun Lim
  • Patent number: 10055318
    Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: August 21, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-hoon Jeong, Ho-young Kim, Soo-jung Ryu
  • Patent number: 10019349
    Abstract: A cache memory and a method of managing the same are provided. The method of managing a cache memory includes determining whether a number of bits of a data bandwidth stored in a bank is an integer multiple of a number of bits of unit data in data to be stored, storing first unit data, among the data to be stored, in a first region of a first address in the bank in response to the number of bits of the data bandwidth not being the integer multiple of the number of bits of the unit data, and storing part of second unit data, among the data to be stored, in a second region of the first address.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: July 10, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong Hoon Jeong, Woong Seo, Sang Heon Lee, Sun Min Kwon, Ho Young Kim, Hee Jun Shim
  • Patent number: 9967064
    Abstract: A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-hit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: May 8, 2018
    Assignee: LG Electronics Inc.
    Inventors: Hak Seong Kim, Sung Duk Choi, Ki Jun Kim, Suk Hyon Yoon, Joon Kui Ahn, Bong Hoe Kim, Dong Youn Seo, Young Woo Yun, Jung Hoon Lee, Seong Hoon Jeong
  • Patent number: 9916414
    Abstract: An apparatus for generating a test case includes a constrained description generator configured to define a plurality of constrained verification spaces in a total verification space, and generate a constrained description for each of the plurality of constrained verification spaces; and a test case generator configured to generate a test case using the constrained description.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: March 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Hoon Jeong, Moo-Kyoung Chung, Young-Chul Cho, Hee-Jun Shim, Jin-Sae Jung, Yen-Jo Han
  • Publication number: 20170358680
    Abstract: A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper region. The middle region has lateral surfaces with a slope less steep than the lateral surfaces of the upper region. An isolation region is on a lateral surface of the lower region of the fin active region. A gate electrode structure is provided. A gate dielectric structure having an oxidation oxide layer and a deposition oxide layer, while having a thickness greater than half a width of the upper region of the fin active region is provided. The deposition oxide layer is between the gate electrode structure and the fin active region and the gate electrode structure and the isolation region, and the oxidation oxide layer is between the fin active region and the deposition oxide layer.
    Type: Application
    Filed: January 31, 2017
    Publication date: December 14, 2017
    Inventors: Seong Hoon JEONG, Hong Bum PARK, HanMei CHOI, Jae Young PARK, Seung Hyun LIM
  • Publication number: 20170344447
    Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.
    Type: Application
    Filed: August 21, 2017
    Publication date: November 30, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seong-hoon JEONG, Ho-young KIM, Soo-jung RYU