Patents by Inventor Seongyeol Yoo
Seongyeol Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150325630Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The array substrate comprises a base substrate (1), an organic light-emitting diode (OLED) device and a thin-film transistor (TFT) structure, the OLED device disposed on one side of the base substrate (1); the TFT structure disposed on the other side of the base substrate (1); a through hole formed on the base substrate and provided with a conductive bridge (2); and the OLED device connected with the TFT structure through the conductive bridge (2).Type: ApplicationFiled: March 31, 2014Publication date: November 12, 2015Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seongyeol YOO, Seungjin CHOI, Heecheol KIM, Youngsuk SONG
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Fabricating method of thin film transistor, fabricating method of array substrate and display device
Patent number: 9171941Abstract: An embodiment of the present invention provides a fabricating method of a thin film transistor, a fabricating method of an array substrate, and a display device. The fabricating method of a thin film transistor comprises: forming a gate electrode on a substrate; and forming a gate insulating layer, a semiconductor layer, source and drain electrodes and a channel region on the substrate, wherein, the semiconductor layer is formed of a metal oxide, and two etching steps are used to form the channel region, and in a first etching step, a part of a source-drain metal layer above the semiconductor layer corresponding to the channel region is removed by using a dry etching, and in a second etching step, a remaining part of the source-drain metal layer above the semiconductor layer corresponding to the channel region is removed by using a wet etching, thereby forming the channel region.Type: GrantFiled: September 17, 2013Date of Patent: October 27, 2015Assignee: BOE Technology Group Co., Ltd.Inventors: Seongyeol Yoo, Yoonsung Um -
Publication number: 20150303306Abstract: There are provided a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor is formed on a base substrate, and includes a gate electrode, an active layer, a source electrode and a drain electrode, the gate electrode includes a first section, a second section and a third section, the first section and the third section correspond to locations of the source electrode and the drain electrode, respectively; the base substrate has two recesses formed therein, and the first section and the third section are situated in the two recesses, respectively; the first section and the third section are covered with a filling layer; the filling layer and the second section are covered with a gate insulating layer, the active layer, the source electrode and the drain electrode in sequence.Type: ApplicationFiled: April 18, 2014Publication date: October 22, 2015Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin CHOI, Heecheol KIM, Youngsuk SONG, Seongyeol YOO
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Publication number: 20150303150Abstract: An array substrate and manufacturing method thereof, and a display device are provided. The array substrate comprises a TFT, an isolating layer (M), a pixel electrode (12) and a via (Q) formed through the isolating layer (14). A drain (6) of the TFT is electrically connected with the pixel electrode (12) through the via (Q). A first light blocking layer (14a) is formed on the pixel electrode (12) inside the via (Q). In the array substrate of the present invention, display effect deterioration due to the light reflection on pixel electrode inside the via is avoided by forming the light blocking layer on the pixel electrode inside the via. At the same time, prior to manufacturing the light blocking layer, a barrier layer is formed first to guarantee no residual of light blocking layer will be left on the substrate, thereby improving display performance of the display device.Type: ApplicationFiled: April 21, 2014Publication date: October 22, 2015Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin CHOI, Heecheol KIM, Youngsuk SONG, Seongyeol YOO
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Patent number: 9165830Abstract: An array substrate, a method of fabricating the same, and a liquid crystal display device are disclosed. The method comprises: sequentially forming a first transparent conductive material layer, an insulation material layer, a semiconductor material layer and a photoresist layer on a substrate base and forming patterns including a gate line, a gate, a gate insulation layer, a semiconductor layer and a first transparent electrode by patterning process; forming a passivation layer and forming a source via and a drain via connected to the semiconductor layer in the passivation layer; sequentially forming a second transparent conductive material layer and a source-drain metal layer and forming patterns including a source, a drain and a second transparent electrode by patterning process, the gate insulation layer is formed only on the gate and the gate line, the source and the drain include stacked second transparent conductive material layer and source-drain metal layer.Type: GrantFiled: November 28, 2014Date of Patent: October 20, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seongyeol Yoo, Youngsuk Song, Heecheol Kim, Seungjin Choi
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Publication number: 20150294993Abstract: An array substrate and a manufacturing method thereof as well as a display device are disclosed. The array substrate includes a gate (21) and a gate insulating layers (22) of TFT formed in this order on a surface of a base substrate (20); a semiconductor active layer (23), an etching stop layer (24), and a source (251)/drain (252) of the TFT formed in this order on a surface of the gate insulating layer (22) corresponding to the gate (21) of the TFT. The source (251) and drain (252) of the TFT contact the semiconductor active layer (23) through respective vias. The array substrate further includes: a shielding electrode (26) formed between the gate (21) of the TFT and the base substrate (20); and an insulating layer (27) formed between the gate (21) of the TFT and the shielding electrode (26).Type: ApplicationFiled: May 30, 2014Publication date: October 15, 2015Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Heecheol Kim, Youngsuk Song, Seongyeol Yoo, Seungjin Choi
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Patent number: 9153606Abstract: The present invention provides an array substrate comprising: a substrate, having a thin film transistor (TFT) formed thereupon, the TFT having a gate electrode, a source electrode and a drain electrode; a first metal layer, formed on the substrate, and comprising a gate line and the gate electrode of the TFT; a first insulating layer, covering the first metal layer and the substrate; a semiconductor layer, an ohmic contact layer, and a second metal layer, which are sequentially formed on the first insulating layer; a second insulating layer, covering the semiconductor layer, the ohmic contact layer, and the second metal layer; a pixel electrode, provided on the second insulating layer and is connected to the drain electrode. The second metal layer further comprises an etch-blocking pattern in the peripheral area of the pixel electrode within the overlapping region between the pixel electrode and the first metal layer.Type: GrantFiled: September 13, 2013Date of Patent: October 6, 2015Assignee: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Youngsuk Song, Seungjin Choi, Seongyeol Yoo
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Patent number: 9123586Abstract: Disclosed are an array substrate, a method for fabricating the same and a display device. The array substrate comprises: a substrate, a gate electrode, a gate insulating layer as well as an active layer, and a source/drain metal layer formed on the substrate, the source/drain metal layer is configured for forming a source electrode, a drain electrode and a channel region, wherein a region of the S/D metal layer for forming the channel region is at a lower height than other region of the S/D metal layer for forming the source electrode and the drain electrode.Type: GrantFiled: August 12, 2013Date of Patent: September 1, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin Choi, Seongyeol Yoo, Youngsuk Song
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Patent number: 9122114Abstract: An embodiment of the disclosed technology provides a method of manufacturing an array substrate, including: a first mask process of forming an inorganic material protrusion on a base substrate; a second mask process of forming a reflective region pattern, a gate line, a gate electrode branched from the gate line, and a common electrode; a third mask process of forming an active island and a data line formed and forming a source electrode connected to the data line and a drain electrode on the active island and a channel; a fourth mask process of forming an insulation material layer, treating the insulation material layer to form a planarization layer, and forming a through hole above the drain electrode; and a fifth mask process of forming a pixel electrode and connected to the drain electrode via the through hole in a reflective region.Type: GrantFiled: May 18, 2012Date of Patent: September 1, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Youngsuk Song, Seungjin Choi, Seongyeol Yoo
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Patent number: 9117707Abstract: The array substrate includes a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions includes a thin film transistor and further includes: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer including at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer including at least one second electrode strip disposed on the protrusions.Type: GrantFiled: December 16, 2013Date of Patent: August 25, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin Choi, Heecheol Kim, Youngsuk Song, Seongyeol Yoo
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Patent number: 9070599Abstract: An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a plurality of data lines (16), formed on the substrate and extending in a first direction; a plurality of gate lines (15), formed on the substrate (1), crossing the plurality of data lines (15), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines (15) and the plurality of data lines (15) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode (12), wherein, the thin film transistor comprises: a gate electrode (2), connected with one of the plurality of gate lines (15); a gate insulating layer (3), provided above the gate line (15) and the gate electrode (2); an active layer (5), formed on the gate insulating layer (3) and disposed corresponding to the gate electrode (2); a drain electrode (8) aType: GrantFiled: October 31, 2013Date of Patent: June 30, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Heecheol Kim, Youngsuk Song, Seongyeol Yoo, Seungjin Choi
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Patent number: 9040344Abstract: A method for fabricating array substrate, an array substrate and a display device. The method for fabricating the array substrate comprises forming a thin film transistor, a first transparent electrode (14) and a second transparent electrode (19), wherein a multi dimensional electric field is created by the first transparent electrode (17) and the second transparent electrode (19), wherein forming the first transparent electrode (17) comprises: forming a metal oxide film presenting semiconductor properties; forming the first transparent electrode (17) by subjecting a portion of the metal oxide film to metallization treatment, and forming a semiconductor active layer (141) from a portion which is not subjected to the metallization treatment.Type: GrantFiled: December 13, 2012Date of Patent: May 26, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin Choi, Heecheol Kim, Youngsuk Song, Seongyeol Yoo
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Patent number: 8952384Abstract: Embodiments of the invention relate to a TFT, a mask for manufacturing the TFT, an array substrate and a display device. A channel of the TFT is formed by using a single slit mask. The channel of the TFT has a bent portion and extension portions provided on both sides of the bent portion, and a channel width of the bent portion is larger than a channel width of the extension portion.Type: GrantFiled: December 6, 2012Date of Patent: February 10, 2015Assignee: BOE Technology Group Co., Ltd.Inventors: Seungjin Choi, Seongyeol Yoo, Youngsuk Song
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Patent number: 8946701Abstract: Embodiments of the present invention provide a thin film transistor, an array substrate and a display device. The thin film transistor comprises a gate layer, a first insulating layer, an active layer, an etch stop layer and a source/drain electrode layer, wherein the active layer is made of a metal oxide material, the first insulating layer, the active layer, the etch stop layer and the source/drain electrode layer are sequentially stacked from bottom to top, the source/drain electrode layer contains an interval separating a source electrode and a drain electrode therein, the etch stop layer is located below the interval, and the etch stop layer has a width greater than that of the interval, and the first insulating layer comprises a laminate of a first sub-insulation layer and a second sub-insulation layer, the second sub-insulation layer is in contact with the active layer and made of an oxygen-rich insulating material.Type: GrantFiled: October 25, 2012Date of Patent: February 3, 2015Assignee: BOE Technology Group Co., Ltd.Inventors: Zhanfeng Cao, Xiaoyang Tong, Qi Yao, Seongyeol Yoo
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Publication number: 20150028342Abstract: An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a plurality of data lines (16), formed on the substrate and extending in a first direction; a plurality of gate lines (15), formed on the substrate (1), crossing the plurality of data lines (15), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines (15) and the plurality of data lines (15) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode (12), wherein, the thin film transistor comprises: a gate electrode (2), connected with one of the plurality of gate lines (15); a gate insulating layer (3), provided above the gate line (15) and the gate electrode (2); an active layer (5), formed on the gate insulating layer (3) and disposed corresponding to the gate electrode (2); a drain electrode (8) aType: ApplicationFiled: October 31, 2013Publication date: January 29, 2015Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Heecheol Kim, Youngsuk Song, Seongyeol Yoo, Seungjin Choi
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Patent number: 8933472Abstract: An array substrate, which is formed with a gate electrode (2), a source electrode (5), a drain electrode (6), a gate insulating layer (3), an active layer (4) and a passivation layer (9) in a thin film transistor region, and with the gate insulating layer (3), a pixel electrode (7), the passivation layer (9) and a common electrode (8) in a pixel electrode pattern region, and a color resin layer (11) is formed between the passivation layer (9) and the common electrode (8). Since the color resin layer (11) for planarization is formed on the passivation layer (9), the horizontal driving manner may be suitably applied in order to reduce light leakage, to improve contrast ratio and aperture ratio of a panel and to lower production costs.Type: GrantFiled: January 9, 2013Date of Patent: January 13, 2015Assignee: BOE Technology Group Co., Ltd.Inventors: Youngsuk Song, Seongyeol Yoo, Seungjin Choi
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Publication number: 20140353690Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate comprise a base substrate (11), a gate line, a data line, and a pixel region defined by intersection of the gate line and the data line, which are formed on the base substrate (11), wherein the pixel region comprises a thin film transistor, and the thin film transistor comprises a gate, a gate insulation layer, an active layer, a source and a drain, the pixel region further comprise: at least one groove (110), formed on a surface of the base substrate (11); a first electrode layer (12) comprising at least one first electrode bar (120), the first electrode bars (120) are disposed in the groove (110) and electrically connected with each other; and a second electrode layer (13) comprising at least one second electrode bar (130), wherein the second electrode bars (130) are disposed outside the groove (110) and electrically connected with each other.Type: ApplicationFiled: December 2, 2013Publication date: December 4, 2014Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin Choi, Heecheol Kim, Youngsuk Song, Seongyeol Yoo
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Publication number: 20140353672Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions comprises a thin film transistor and further comprises: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer comprising at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer comprising at least one second electrode strip disposed on the protrusions.Type: ApplicationFiled: December 16, 2013Publication date: December 4, 2014Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Seungjin Choi, Heecheol Kim, Youngsuk Song, Seongyeol Yoo
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Patent number: 8842231Abstract: An array substrate comprises: a base substrate; a gate scanning line, a data scanning line, a pixel electrode and a thin film transistor, formed on the base substrate; and a light blocking layer, formed on the base substrate and corresponding to the thin film transistor and the data scanning line.Type: GrantFiled: June 1, 2011Date of Patent: September 23, 2014Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Xiang Liu, Seongyeol Yoo, Jianshe Xue
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Publication number: 20140209913Abstract: An array substrate, which is formed with a gate electrode (2), a source electrode (5), a drain electrode (6), a gate insulating layer (3), an active layer (4) and a passivation layer (9) in a thin film transistor region, and with the gate insulating layer (3), a pixel electrode (7), the passivation layer (9) and a common electrode (8) in a pixel electrode pattern region, and a color resin layer (11) is formed between the passivation layer (9) and the common electrode (8). Since the color resin layer (11) for planarization is formed on the passivation layer (9), the horizontal driving manner may be suitably applied in order to reduce light leakage, to improve contrast ratio and aperture ratio of a panel and to lower production costs.Type: ApplicationFiled: January 9, 2013Publication date: July 31, 2014Applicant: BOE Technology Group Co., Ltd.Inventors: Youngsuk Song, Seongyeol Yoo, Seungjin Choi