Abstract: The present invention relates to a copolymer and core-shell particles, a slurry composition, a separator and a secondary battery which comprise the copolymer, the copolymer comprising, with respect to 100 wt % of the total weight of the copolymer, greater than 5 wt % and less than or equal to 70 wt % of an acrylonitrile-based monomer unit, greater than or equal to 15 wt % and less than 90 wt % of an acrylate-based monomer unit, 1-20 wt % of an acrylamide-based monomer unit, and 1-10 wt % of an acrylic acid-based monomer unit.

Abstract: Disclosed is a coating thickness measuring apparatus and method. The coating thickness measuring apparatus according to an embodiment of the present disclosure includes a data obtaining unit configured to obtain thickness data indicating a thickness of a coating material applied to a contact portion of a substrate in contact with a coating roll while the substrate coated with the coating material is transported by the coating roll; and a processor configured to create a virtual memory zone having a plurality of storage areas in which correction data is distributed and stored and correct the thickness data based on the correction data pre-stored in a target storage area selected from the plurality of storage areas to generate corrected thickness data.

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

Abstract: An imprinting photomask including: a transparent substrate; a light blocking pattern provided on the transparent substrate; and a dry film resist (DFR) pattern provided on the light blocking pattern.

Abstract: The present specification relates to a conductive structure body, a method for manufacturing the same, and an electrode and an electronic device including the conductive structure body.

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

Abstract: A semiconductor memory device and associated methods, the device including first and second lower conductive lines extending in a first direction; a first middle conductive line on the first and second lower conductive lines and extending in a second direction; first and second memory cells between the first and second lower conductive lines and the first middle conductive line; an air gap support layer between the first and second memory cells; and a first air gap between the first and second memory cells and under the air gap support layer, wherein an upper surface of the air gap support layer lies in a same plane as the first and second memory cells, the first and second memory cells include first and second OTS layers and first and second phase-change layers, and the first air gap overlaps the first and second phase-change layers.

Abstract: The heating film including: a transparent substrate; a coating layer provided on the transparent substrate and having a refractive index of 1.450 to 1.485; and a metal foil pattern provided on the coating layer, in which a ten-point average roughness (Rz) of a surface of the metal foil pattern is more than 0.9 ?m.

Abstract: Provided are a method of manufacturing a semiconductor device using a thermally decomposable layer, a semiconductor manufacturing apparatus, and the semiconductor device. The method includes forming an etch target layer on a substrate, forming thermally decomposable patterns spaced apart from each other on the etch target layer, forming a first mask pattern covering at least sidewalls of the thermally decomposable patterns, and removing the thermally decomposable patterns by a heating method to expose a sidewall of the first mask pattern.

Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device may include a first interlayer insulating film containing therein a plurality of pores, a first line structure in the first interlayer insulating film, an inserted insulating film extending along and on a upper surface of the first interlayer insulating film and in contact with the first interlayer insulating film, a barrier insulating film in contact with the inserted insulating film and extending along an upper surface of the inserted insulating film and an upper surface of the first line structure, a second interlayer insulating film on the barrier insulating film and a second line structure disposed in the second interlayer insulating film and connected to the first line structure.

Abstract: A substrate, an optical device include the same, and a method of making the same are disclosed herein. In some embodiments, a substrate includes a base layer, a plurality of column spacers disposed on the base layer, and a ball spacer attached to or embedded in at least one of the plurality of column spacers. The spacers having excellent dimensional accuracy and adhesiveness on the substrate.

Abstract: A method of manufacturing a transparent electrode substrate according to an exemplary embodiment of the present application comprises: forming a structure comprising a transparent base, a bonding layer provided on the transparent base, and a metal foil provided on the bonding layer; forming a metal foil pattern by patterning the metal foil; heat-treating the structure comprising the metal foil pattern at a temperature of 70° C. to 100° C.; and completely curing the bonding layer.

Abstract: Provided is a black partition wall pattern film that comprises: a transparent substrate; an electrode layer provided on the transparent substrate; a black partition wall pattern provided on the electrode layer; and a black UV-curable resin layer provided in a region of the electrode layer where no black partition wall pattern is provided.

Abstract: A variable transmittance film includes a first electrode substrate and a second electrode substrate which are provided to face each other; and a liquid receiving layer which is provided between the first electrode substrate and the second electrode substrate and comprises a liquid substance, and a partition wall pattern that divides the liquid substance into two or more spaces, in which at least a part of the partition wall pattern comprises a passageway region that connects the adjacent spaces.

Abstract: A semiconductor memory device includes; a first impurity region and a second impurity region spaced apart in a semiconductor substrate, a bit line electrically connected to the first impurity region, a storage node contact electrically connected to the second impurity region, an air gap between the bit line and the storage node contact, a landing pad electrically connected to the storage node contact, a buried dielectric pattern on a sidewall of the landing pad and on the air gap, and a spacer capping pattern between the buried dielectric pattern and the air gap.

Abstract: A substrate and a method for producing the same are disclosed herein. In some embodiments, a substrate includes a base layer, a black layer formed on the base layer, and column spacers formed on the black layer, wherein a loss rate of spacers measured by a peel test is 15% or less. The substrate can have excellent adhesiveness of the spacer to the base layer or the black layer and ensuring appropriate darkening properties. The method can effectively produce such a substrate without adverse effects such as occurrence of foreign materials without separate treatment such as heat treatment.

Abstract: An unmanned aerial vehicle including a housing, a first front arm, a first back arm, a second front arm, and a second back arm. The first front arm has an end at a first elevational plane when in a closed position. The first back arm has an end at a second elevational plane when in the closed position, the second elevational plane higher than the first elevational plane to provide an offset. The second front arm has an end at the first elevational plane when in the closed position. The second back arm has an end at the second elevational plane when in the closed position, the second elevational plane higher than the first elevational plane to provide the offset.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: A pattern film, a method for manufacturing a pattern film, and a transmittance variable device comprising the same are disclosed herein. In some embodiments, a pattern film includes a base layer, and a spacer pattern formed on the base layer, the spacer pattern comprises a partition wall spacer comprises a plurality of spacer dots and a spacer line connecting the spacer dots, and a ball spacer, the ball spacer is one of embedded in, partially embedded in, or in contact with the partition wall spacer, when any 3 or more spacer dots are selected, the spacer line forms a closed figure having the selected spacer dots at the vertices thereof, the selected spacer dots are not present inside the closed figure, a length of at least one side of the closed figure is different from lengths of the remaining sides, and each spacer dot has irregularity of 50% or greater.

Abstract: A three-dimensional semiconductor memory device is disclosed. The device may include a substrate including a cell array region and a connection region provided at an end portion of the cell array region, an electrode structure extending from the cell array region to the connection region, the electrode structure including electrodes sequentially stacked on the substrate, an upper insulating layer provided on the electrode structure, a first horizontal insulating layer provided in the upper insulating layer and extending along the electrodes, and first contact plugs provided on the connection region to penetrate the upper insulating layer and the first horizontal insulating layer. The first horizontal insulating layer may include a material having a better etch-resistive property than the upper insulating layer.