Abstract: Failure-in-time (FIT) evaluation methods for an IC are provided. Data representing a layout of the IC is accessed, and the layout includes a metal line and a plurality of vertical interconnect accesses (VIAs). The metal line is divided into a first sub-line with a first line width and a second sub-line with a second line width. A plurality of nodes are picked along the first and second sub-lines of the metal line. The metal line is divided into a plurality of metal segments based on the nodes. FIT value is determined for each of the metal segments to verify the layout and fabricate the IC. The first line width is greater than the second line width.

Abstract: A system includes a processor configured to determine a power parameter associated with a cell in an integrated circuit (IC) layout diagram. In response to the determined power parameter exceeding a design criterion, the processor is configured to perform a modification of the IC layout diagram, the modification including at least one of altering a placement of the cell in the IC layout diagram or modifying a power delivery path to the cell. The power parameter includes at least one of a power density of a tile containing the cell, a voltage drop of the tile containing the cell, or a voltage drop of the cell.

Abstract: Disclosed are systems for applying materials to components. The system comprises a tool operable for transferring a portion of a material from a supply of the material to a component. A first portion of the tool may be configured for cutting along a side or edge of the portion of the material. A second portion of the tool may be configured for tamping, pressing, or pushing against the portion of the material to cause uncut sides or edges of the portion of the material attached to the supply of the material to be torn, severed, detached, or separated from the supply of the material.

Abstract: A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The semiconductor structure comprises a first semiconductor device, a second semiconductor device, and a first semiconductor component. The first semiconductor device and the second semiconductor device defining a channel region. The first semiconductor component is disposed in the channel region and configured to control states of a plurality of components in the channel region. The first semiconductor device and the first semiconductor component are located adjacent to a boundary, and the first semiconductor component is electrically isolated from the first semiconductor device.

Abstract: Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate, a power switch, a first power mesh and a second power mesh. The power switch is formed over the front surface of the semiconductor substrate. The first power mesh is formed over the power switch and is directly connected to the first terminal of the power switch. The second power mesh is formed over the back surface of the semiconductor substrate and is directly connected to the second terminal of the power switch.

Abstract: A method (of fabricating a power grid (PG) arrangement in a semiconductor) includes: forming a first layer including conductive lines (C_1st lines) which include interspersed alpha C_1st lines and beta C_1st lines designated correspondingly for first and second reference voltages; and forming a second layer over the first layer, the second layer including segments (C_2nd segments) which include interspersed alpha C_2nd segments and beta C_2nd segments designated correspondingly for the first and second reference voltages; and, relative to the first direction, each beta C_2nd segment being substantially asymmetrically between corresponding adjacent ones of the alpha C_2nd segments.

Abstract: An integrated circuit includes a first set of devices, a set of metal layers and a header circuit. The first set of devices are configured to operate on a first supply voltage, and are located on a first layer of the integrated circuit. The set of metal layers are above the first layer, and includes a first metal layer and a second metal layer. The first metal layer extends in at least a first direction and a second direction. The header circuit is above the first set of devices. At least a portion of the header circuit is positioned between the first metal layer and the second metal layer. The header circuit is configured to provide the first supply voltage to the first set of devices, and is configured to be coupled to a first voltage supply having the first supply voltage.

Abstract: A plug-in holder includes a frame, a first engaging structure and at least one second engaging structure. The frame has a first side and a second side, wherein the first side is opposite to the second side. The first engaging structure is located at the first side. The at least one second engaging structure is located at the second side.

Abstract: The present disclosure is directed to protocells or nanoparticles, which are optionally coated with a lipid bilayer, which can be used for targeting bone tissue for the delivery of bioactive agents useful in the treatment and/or diagnosis of bone cancer, often metastatic bone cancer which often occurs secondary to a primary cancer such as prostate cancer, breast cancer, lung cancer and ovarian cancer, among numerous others. These protocells or nanoparticles target bone cancer especially metastatic bone cancer with bioactive agents including anticancer agents and/or diagnostic agents for purposes of treating, diagnosing and/or monitoring the therapy of the bone cancer. Osteotropic protocells or nanoparticles, pharmaceutical compositions comprising a population of osteotropic protocells or nanoparticles and methods of diagnosing, treating and/or monitoring therapy of bone cancer are representative aspects.

Abstract: A method for manufacturing a semiconductor device is provided. The method comprises determining a dimensional quantity of a layout pattern having an angle relative to grid lines of a minimum grid. The minimum grid may be defined by a first quantity associated with a first direction and a second quantity associated with a second direction perpendicular to the first direction. The determination of the dimensional quantity of the layout pattern is based on the first quantity, the second quantity and the angle of the layout pattern relative to the grid lines of the minimum grid.

Abstract: Methods for analyzing electromigration (EM) in an integrated circuit (IC) are provided. A layout of the IC is obtained. A metal segment is selected from the layout according to a current simulation result of the IC. Two first vias are formed over and in contact with the metal segment in the layout. EM rule is kept on the metal segment when a distance between the two first vias is greater than a threshold distance. The EM rule is relaxed on the metal segment when the distance between the two first vias is less than or equal to the threshold distance.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: The present invention discloses a grinding cavity body of multiple vibration sources, in which a plurality of ultrasonic vibration sources are disposed, capable of controlling the multi-directional macroscopic medium flow, making benefits to the vibration medium (the abrasive of the slurry) to enter the fine structure of the workpiece to be processed, and to the abrasive to vibrate itself slightly to enhance the performance of abrasive to the workpiece which needs to be ground.

Abstract: The present disclosure provides a routing structure. The routing structure includes a substrate having a boundary and a first conductive trace configured to be coupled to a first conductive pad disposed within the boundary of the substrate. The first conductive trace is inclined with respect to the boundary of the substrate.

Abstract: The present invention discloses a multi-dimensional vibration grinding cavity body. By adjusting amplitudes (power) and frequencies of the multi-dimensional ultrasonic vibration source, such that the multi-directional macroscopic flow is formed in the cavity body while keeping the vibration medium to have the original characteristics to improve the performance of grinding of slurry.

Abstract: A display device including a display panel, a shaft, a correcting sensor and a driving module is provided. The display panel has a display surface. The shaft has an axial end and a correcting end opposite the axial end. The correcting sensor is disposed on the correcting end. When the shaft is rotated relative to the axial end, the correcting sensor is moved to a second position from a first position and faces the display surface at the second position. The driving module is configured to translate the shaft when the correcting sensor is at the second position, such that the correcting sensor can be moved to a detecting position from the second position, wherein the distance of the second position relative to the display surface is greater than the distance of the detecting position relative to the display surface.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: The present disclosure provides a routing structure. The routing structure includes a substrate having a first circuit region and a boundary surrounding the first circuit region. The routing structure also includes a first conductive trace coupled to a first conductive pad disposed in the first circuit region. The first conductive trace is inclined with respect to the boundary of the substrate. A method of forming a routing structure is also disclosed.

Abstract: The present invention provides a supporting hook structure, comprising a sleeve, a fixing rod, a first limit unit, a hook and a fixing device. The fixing rod is connected to the side surface of the sleeve. The hook body is connected to one end of the sleeve. The first limit unit is arranged on the side surface of the sleeve and adjacent to the hook body. The first limit unit makes the hook body rotates with the axis direction of the sleeve as a rotation axis. The fixing device is connected to the other end of the sleeve to fix the rotating position of the hook body. Through the above, the hook part enters the proximal thigh from a surgical entrance and the hook part rotates to make the hook part abut against the proximal femur to complete the positioning and fixation of the femur hook structure to the femur.