Patents by Inventor Sheng Yuan
Sheng Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153812Abstract: A method for fabricating a semiconductor device includes the steps of first forming a shallow trench isolation (STI) in a substrate, forming a first gate structure on the substrate and adjacent to the STI, forming a first doped region between the first gate structure and the STI, forming a second doped region between the first doped region and the first gate structure, forming a first contact plug on the first doped region, and then forming a second contact plug on the second doped region.Type: ApplicationFiled: December 4, 2022Publication date: May 9, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Wen-Kai Lin, Chi-Horn Pai, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
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Publication number: 20240153943Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: ApplicationFiled: January 5, 2024Publication date: May 9, 2024Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Publication number: 20240153052Abstract: Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for dynamic tone mapping of video content. An example embodiment operates by identifying, by a dynamic tone mapping system executing on a media device, characteristics of a first video signal having a first dynamic range based on a frame-by-frame analysis of the first video signal. The example embodiment further operates by modifying, by the dynamic tone mapping system, a tone mapping curve based on the characteristics of the first video signal to generate a modified tone mapping curve. Subsequently, the example embodiment operates by converting, by the dynamic tone mapping system, the first video signal based on the modified tone mapping curve to generate a second video signal having a second dynamic range that is less than the first dynamic range.Type: ApplicationFiled: January 12, 2024Publication date: May 9, 2024Applicant: Roku, Inc.Inventors: Sheng Yuan Chiu, Kunlung Wu
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Patent number: 11976429Abstract: The present invention discloses a shed tunnel structure for preventing a falling rock, including a shed tunnel body and a buffer plate for bearing impact of the falling rock, where the shed tunnel body includes a first supporting structure, and the first supporting structure is arranged on a side away from a ramp; one end of the buffer plate is connected to the ramp; a side face of the buffer plate close to the shed tunnel body is in movable contact with the first supporting structure, and the contact position is close to the other end of the buffer plate. The objective of resisting continuous impact of the falling rock can be achieved through the structural design.Type: GrantFiled: May 2, 2022Date of Patent: May 7, 2024Assignee: Sichuan Communication Surveying & Design Institute Co., Ltd.Inventors: Song Yuan, Xibao Wang, Liangpu Li, Peiyuan Liao, Sheng Zhang, Zhengzheng Wang, Zhixiang Yu, Tingbiao Zhang, Guoqiang Zheng, Junbing Li, Yafeng Jin, Weijin Zhou, Lisong Gan, Ke Zhou, Jicheng Wei, Daquan Zhao
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Publication number: 20240142687Abstract: A lighting assembly may include a light source and a reflective polarizer overlapping the light source. A portion of light that is incident on the reflective polarizer may not pass through the reflective polarizer and may be reflected back to the light source. The light source may include at least one of a light emitting diode (LED), a micro-LED, an organic light emitting diode (OLED), a micro-OLED, a liquid crystal on silicon (LCoS), or an fLCoS light source. The reflective polarizer may include a polymer birefringent multilayer structure of alternating first layers and second layers. The first layers may each include an isotropic polymer thin film the second layers each include an anisotropic polymer thin film. Various other devices, systems, and methods are also disclosed.Type: ApplicationFiled: October 27, 2023Publication date: May 2, 2024Inventors: Liliana Ruiz Diaz, Sheng Ye, Zhaoyu Nie, Tanya Malhotra, Christopher Yuan Ting Liao, Ehsan Vadiee, Andrew John Ouderkirk
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Patent number: 11973133Abstract: A method for fabricating a semiconductor device includes the steps of providing a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, forming a first mesa isolation on the HEMT region and a second mesa isolation on the capacitor region, forming a HEMT on the first mesa isolation, and then forming a capacitor on the second mesa isolation.Type: GrantFiled: May 8, 2023Date of Patent: April 30, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Kuo-Yu Liao
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Patent number: 11973068Abstract: A micro LED display device includes: a substrate; a plurality of micro light-emitting diodes disposed on the substrate; and a reflective layer and a black layer sequentially stacked on the substrate. The reflective layer and the black layer cover a surface of the substrate, wherein a top surface of the plurality of micro light-emitting diodes is exposed through the reflective layer and the black layer. A plurality of reflective banks and a plurality of black banks are sequentially disposed on the black layer and exposing the plurality of micro light-emitting diodes; and a color-conversion material covers the top surface of at least one of the plurality of micro light-emitting diodes. The color-conversion material is laterally disposed between the plurality of reflective banks. The reflective layer, the black layer, the plurality of reflective banks, and the plurality of black banks overlap each other in a display direction.Type: GrantFiled: October 28, 2021Date of Patent: April 30, 2024Assignee: PLAYNITRIDE DISPLAY CO., LTD.Inventors: Loganathan Murugan, Sheng-Yuan Sun, Po-Wei Chiu
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Patent number: 11956974Abstract: The invention discloses a memory fabrication method. The memory fabrication method includes forming a plurality of gate electrode lines to respectively form a plurality of gates of a plurality of data storage cells, and forming a plurality of conductive lines. The plurality of data storage cells are arranged in an array. Each of the plurality of conductive lines is coupled to two of the plurality of gate electrode lines. Each of the plurality of conductive lines at least partially overlaps the two gate electrode lines of the plurality of gate electrode lines.Type: GrantFiled: October 19, 2020Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh
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Patent number: 11951569Abstract: In some embodiments, the present disclosure relates to a wafer edge trimming apparatus that includes a processing chamber defined by chamber housing. Within the processing chamber is a wafer chuck configured to hold onto a wafer structure. Further, a blade is arranged near an edge of the wafer chuck and configured to remove an edge potion of the wafer structure and to define a new sidewall of the wafer structure. A laser sensor apparatus is configured to direct a laser beam directed toward a top surface of the wafer chuck. The laser sensor apparatus is configured to measure a parameter of an analysis area of the wafer structure. Control circuitry is to the laser sensor apparatus and the blade. The control circuitry is configured to start a damage prevention process when the parameter deviates from a predetermined threshold value by at least a predetermined shift value.Type: GrantFiled: May 12, 2021Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Ming Wu, Yung-Lung Lin, Hau-Yi Hsiao, Sheng-Chau Chen, Cheng-Yuan Tsai
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Publication number: 20240114380Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. In certain configurations, the UE establishes a connection supporting an extended reality (XR) application service with a base station. The UE reports, to the base station, a delay status report (DSR) to indicate a buffer size for data to be transmitted to the base station. The DSR includes timing information. The UE receives a configuration instruction from the base station. The UE configures resources on the UE according to the configuration instruction to transmit the data to the base station.Type: ApplicationFiled: September 13, 2023Publication date: April 4, 2024Inventors: Ming-Yuan Cheng, Pradeep Jose, Chia-Chun Hsu, Sheng-Yi Ho
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Publication number: 20240107640Abstract: An LED driving device with an adjustable dimming depth is provided. The LED driving device includes an LED driver and a dimming depth control circuit. The LED driver includes a dimming control circuit and a driving circuit. The dimming control circuit generates a first pulse-width modulation (PWM) signal according to a first brightness indication signal. The driving circuit drives a first light source and adjusts a brightness of the first light source. A duty ratio of the first PWM signal and the first driving current have a first relationship therebetween. The dimming depth control circuit includes a first variable resistance circuit, and the first variable resistance circuit controls a magnitude of a first variable resistance between a first current sampling terminal and a ground terminal according to a first dimming depth control signal. The first relationship defines a first dimming depth that varies with the first variable resistance.Type: ApplicationFiled: August 7, 2023Publication date: March 28, 2024Inventors: XIAO-LEI ZHU, YUAN-YUAN LIN, SHENG-JU CHUNG
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Publication number: 20240094445Abstract: A liquid lens with flexible transparent active layers on both sides of a fluid is transformed along two distinct deformation axes. The flexible transparent active layers include piezoelectric materials that actuate the lens in response to applied voltage(s). The piezoelectric properties and actuation mechanism of the transparent layers are arranged to deform the lens cylindrically along different axes resulting in a net spherical deformation or a combination of spherical and cylindrical deformation with substantially less distortion than spherically deforming layers. The piezoelectric active layers may be polymer or ceramic with isotropic or anisotropic mechanical stiffness. Alternatively, a pair of transparent, internal layers are positioned between the front and rear surfaces. The active layers, front and/or rear, are dual layers affixed together with an adhesive or single layers.Type: ApplicationFiled: December 8, 2022Publication date: March 21, 2024Applicant: Meta Platforms Technologies, LLCInventors: Nagi ELABBASI, Christopher Yuan Ting LIAO, Jonathan Robert PETERSON, Sheng YE, Eugene CHO, Spencer Allan WELLS, Andrew John OUDERKIRK, Emma MULLEN
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Publication number: 20240096856Abstract: A micro LED display device includes: a substrate; a plurality of micro light-emitting diodes disposed on the substrate; and a reflective layer and a black layer sequentially stacked on the substrate. The reflective layer and the black layer cover a surface of the substrate, wherein a top surface of the plurality of micro light-emitting diodes is exposed through the reflective layer and the black layer. A plurality of reflective banks and a plurality of black banks are sequentially disposed on the black layer and exposing the plurality of micro light-emitting diodes; and a color-conversion material covers the top surface of at least one of the plurality of micro light-emitting diodes. The color-conversion material is laterally disposed between the plurality of reflective banks. The reflective layer, the black layer, the plurality of reflective banks, and the plurality of black banks overlap each other in a display direction.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Loganathan MURUGAN, Sheng-Yuan SUN, Po-Wei CHIU
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Patent number: 11935985Abstract: A micro light-emitting diode (LED) display panel including a substrate, a first micro LED, a first light-shielding wall, a second micro LED, and a second light-shielding wall is provided. The substrate includes a plurality of pixel regions arranged in an array. The first micro LED is disposed on one of the pixel regions of the substrate. The first light-shielding wall is disposed on the substrate and located beside the first micro LED. The second micro LED is disposed on the one of the pixel regions of the substrate and located beside the first micro LED. The second light-shielding wall is disposed on the substrate and located beside the second micro LED. A light wavelength of the first micro LED is different from a light wavelength of the second micro LED. A height of the first light-shielding wall is smaller than a height of the second light-shielding wall.Type: GrantFiled: August 23, 2021Date of Patent: March 19, 2024Assignee: PlayNitride Display Co., Ltd.Inventors: Sheng-Yuan Sun, Loganathan Murugan, Po-Wei Chiu
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Patent number: 11935894Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.Type: GrantFiled: November 4, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
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Publication number: 20240084455Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.Type: ApplicationFiled: February 8, 2023Publication date: March 14, 2024Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
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Publication number: 20240084121Abstract: A mechanically and piezoelectrically anisotropic polymer article is formed from a crystallizable fluoropolymer and a nucleating agent. The polymer article may be a thin film or a fiber, for example. A crystalline phase may constitute at least approximately 50% of the polymer article. In certain examples, a fluoropolymer may include vinylidene fluoride, trifluoroethylene, chlorotrifluoroethylene, hexafluoropropylene, and vinyl fluoride. The polymer article may include up to approximately 10 wt. % of the nucleating agent. Such a polymer article is optically transparent, has an elastic modulus of at least approximately 3 GPa, and an electromechanical coupling factor (k31) of at least approximately 0.15.Type: ApplicationFiled: February 27, 2023Publication date: March 14, 2024Inventors: Sheng Ye, Jinghui Yang, Rui Jian, Hao Mei, Andrew John Ouderkirk, Christopher Yuan Ting Liao, Stephen Hsieh, Alexander Keener, Jonathan Robert Peterson
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Publication number: 20240090234Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Te-Wei Yeh, Chien-Liang Wu
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Publication number: 20240090336Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chang-Lin YANG, Chung-Te LIN, Sheng-Yuan CHANG, Han-Ting LIN, Chien-Hua HUANG
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Patent number: D1018907Type: GrantFiled: November 15, 2021Date of Patent: March 19, 2024Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.Inventors: Yun-Chien Lee, Yi-Ching Hsu, Pei-Yi Lin, Yu-Hung Su, Sheng-Yuan Huang, Chun-Fu Lin