Patents by Inventor Shigeru Mizuno
Shigeru Mizuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20100046134Abstract: An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.Type: ApplicationFiled: October 28, 2009Publication date: February 25, 2010Applicant: CANON ANELVA CORPORATIONInventors: Shigeru Mizuno, Masahito Ishihara, Sunil Wickramanayaka, Naoki Miyazaki
-
Publication number: 20100015798Abstract: A method for integrating ruthenium (Ru) metal cap layers and modified Ru metal cap layers into copper (Cu) metallization of semiconductor devices to improve electromigration (EM) and stress migration (SM) in bulk Cu metal. In one embodiment, the method includes providing a planarized patterned substrate containing a Cu metal surface and a dielectric layer surface, depositing first Ru metal on the Cu metal surface, and depositing additional Ru metal on the dielectric layer surface, where the amount of the additional Ru metal is less than the amount of the first Ru metal. The method further includes at least substantially removing the additional Ru metal from the dielectric layer surface to improve the selective formation of a Ru metal cap layer on the Cu metal surface. Other embodiments further include incorporating one or more types of modifier elements into the dielectric layer surface, the Cu metal surface, the Ru metal cap layer, or a combination thereof.Type: ApplicationFiled: July 15, 2008Publication date: January 21, 2010Applicant: Tokyo Electron LimitedInventors: Kenji Suzuki, Frank M. Cerio, JR., Miho Jomen, Shigeru Mizuno, Yasushi Mizusawa, Tadahiro Ishizaka
-
Patent number: 7642201Abstract: An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a multi-step process within a vacuum chamber which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang.Type: GrantFiled: January 24, 2008Date of Patent: January 5, 2010Assignee: Tokyo Electron LimitedInventors: Frank M. Cerio, Jr., Shigeru Mizuno, Tsukasa Matsuda, Adam Selsey
-
Patent number: 7623334Abstract: An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.Type: GrantFiled: June 17, 2003Date of Patent: November 24, 2009Assignee: Canon Anelva CorporationInventors: Shigeru Mizuno, Masahito Ishihara, Sunil Wickramanayaka, Naoki Miyazaki
-
Publication number: 20090246952Abstract: A method is provided for forming a cobalt metal nitride barrier film on a substrate for semiconductor devices. According to one embodiment of the invention, the method includes depositing a plurality of metal nitride layers on the substrate, and depositing a cobalt layer between each of the plurality of metal nitride layers. According to another embodiment of the invention, the method includes simultaneously exposing the substrate to a metal nitride precursor or a metal precursor, a cobalt precursor, and a reducing gas, nitriding gas, or a combination thereof. Embodiments for integrating a cobalt metal nitride barrier film into semiconductor devices are described.Type: ApplicationFiled: March 28, 2008Publication date: October 1, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Tadahiro ISHIZAKA, Shigeru Mizuno
-
Publication number: 20090191721Abstract: An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a multi-step process within a vacuum chamber which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang.Type: ApplicationFiled: January 24, 2008Publication date: July 30, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Frank M. Cerio, JR., Shigeru Mizuno, Tsukasa Matsuda, Adam Selsey
-
Publication number: 20090122459Abstract: An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.Type: ApplicationFiled: December 30, 2008Publication date: May 14, 2009Applicant: ANELVA CORPORATIONInventors: Shigeru Mizuno, Masahito Ishihara, Sunil Wickramanayaka, Naoki Miyazaki
-
Publication number: 20090059462Abstract: An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.Type: ApplicationFiled: October 22, 2008Publication date: March 5, 2009Applicant: ANELVA CORPORATIONInventors: Shigeru Mizuno, Masahito Ishihara, Sunil Wickramanayaka, Naoki Miyazaki
-
SEMICONDUCTOR DEVICE CONTAINING AN ALUMINUM TANTALUM CARBONITRIDE BARRIER FILM AND METHOD OF FORMING
Publication number: 20090045514Abstract: The method includes providing a substrate containing a dielectric layer having a recessed feature and forming a aluminum tantalum carbonitride barrier film over a surface of the recessed feature. The aluminum tantalum carbonitride barrier film is formed by depositing a plurality of tantalum carbonitride films, and depositing aluminum between each of the plurality of tantalum carbonitride films. One embodiment further comprises depositing a Ru film on the aluminum tantalum carbonitride barrier film, depositing a Cu seed layer on the Ru film, and filling the recessed feature with bulk Cu. A semiconductor device containing an aluminum tantalum carbonitride barrier film is described.Type: ApplicationFiled: August 15, 2007Publication date: February 19, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Tadahiro ISHIZAKA, Shigeru Mizuno -
Publication number: 20090041950Abstract: Embodiments of a method and system for improving the consistency of a layer or a plurality of layers with a desired profile in a deposition system are generally described herein. Other embodiments may be described and claimed.Type: ApplicationFiled: August 7, 2007Publication date: February 12, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: SHIGERU MIZUNO, TAKASHI SAKUMA, YASUSHI MIZUSAWA
-
Publication number: 20090023247Abstract: After plural semiconductor elements are stacked to form a stacked body P, side wirings are formed on the side surface of the stacked body P, thereby manufacturing a semiconductor apparatus in which the respective semiconductor elements are electrically connected to one another. In this case, as the semiconductor element, a semiconductor element 10 is employed in which a gold wire 16 with its one end connected to an electrode terminal of the semiconductor element is extended out to the side surface. A conductive paste 36 containing conductive particles applied over a predetermined length of a transferring wire 30 is transferred to the side surface of the stacked body P so that the gold wires 16 extended out to the side surfaces of the semiconductor elements 10, 10, 10 are connected, thereby forming the side wirings.Type: ApplicationFiled: July 18, 2008Publication date: January 22, 2009Applicant: Shinko Electric Industries Co., Ltd.Inventors: Shigeru MIZUNO, Takashi KURIHARA, Akinori SHIRAISHI, Kei MURAYAMA, Mitsutoshi HIGASHI
-
Publication number: 20090020887Abstract: In a semiconductor apparatus in which plural semiconductor elements are stacked, metal wires whose one ends are connected to electrode terminals of the semiconductor elements are extended to the side surfaces of the semiconductor elements in an abutment state and the metal wires extended to the side surfaces of the semiconductor elements are bonded to a side surface wiring formed on side surfaces of the semiconductor elements by a conductive paste containing conductive particles.Type: ApplicationFiled: July 16, 2008Publication date: January 22, 2009Applicant: Shinko Electric Industries Co., Ltd.Inventors: Shigeru MIZUNO, Takashi KURIHARA, Akinori SHIRAISHI, Kei MURAYAMA, Mitsutoshi HIGASHI
-
Publication number: 20090020889Abstract: A plurality of quadrilateral-shaped semiconductor elements are stacked on the one surface of a circuit substrate. A side surface wiring for making electrical connection between each of the electrode terminals of the semiconductor elements and a pad formed on the circuit substrate is formed by applying a conductive paste containing conductive particles. A metal wire whose one end is connected to the electrode terminal is extended along a tapered surface formed by cutting off an edge of the electrode terminal surface on which the electrode terminal is formed among edges formed along each of the sides of the semiconductor element. At least a part of the metal wire extended from each of the electrode terminals of the semiconductor elements to the tapered surface is electrically connected to the side surface wiring.Type: ApplicationFiled: July 18, 2008Publication date: January 22, 2009Applicant: Shinko Electric Industries Co., Ltd.Inventors: Kei MURAYAMA, Shigeru MIZUNO, Takashi KURIHARA, Akinori SHIRAISHI, Misutoshi HIGASHI
-
Publication number: 20090001571Abstract: A method of manufacturing a semiconductor device in which a semiconductor element 10 is mounted on a substrate 20 through a flip-chip connection, includes the steps of cladding gallium as a bonding material 30 to a connecting pad 22 formed on a surface of the substrate 20, diffusing copper from the connecting pad 22 formed of the copper into the bonding material 30 through heating under vacuum, thereby bringing a state of a solid solution of the gallium and the copper, and aligning a connecting bump 12 formed on the semiconductor element 10 with the connecting pad 22 and bonding the connecting bump 12 to the connecting pad 22 through the bonding material 30 in a state of a solid solution under heating.Type: ApplicationFiled: June 25, 2008Publication date: January 1, 2009Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Shigeru Mizuno, Takashi Kurihara
-
Publication number: 20080237859Abstract: An interconnect structure for an integrated circuit and method of forming the interconnect structure. The method includes depositing a metallic layer containing a reactive metal in an interconnect opening formed within a dielectric material containing a dielectric reactant element, thermally reacting at least a portion of the metallic layer with at least a portion of the dielectric material to form a diffusion barrier primarily containing a compound of the reactive metal from the metallic layer and the dielectric reactant element from the dielectric material, and filling the interconnect opening with Cu metal, where the diffusion barrier surrounds the Cu metal within the opening. The reactive metal can be Co, Ru, Mo, W, or Ir, or a combination thereof. The interconnect opening can be a trench, a via, or a dual damascene opening.Type: ApplicationFiled: March 26, 2007Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Tadahiro Ishizaka, Satohiko Hoshino, Kuzuhiro Hamamoto, Shigeru Mizuno, Yasushi Mizusawa
-
Publication number: 20070176357Abstract: A sheet medium adjustment apparatus, e.g., in an image forming system, includes: an ejector to eject a conveyed sheet; a stacking device to stack each sheet ejected from the sheet ejector into a stack on a tray; a moving device to shift the stacking device in a movement direction perpendicular to a sheet-ejecting direction; a sheet aligning member to align ends of the sheets in the stack that are parallel to the sheet-ejecting direction; a stepping motor to move the sheet aligning member; and an evacuation device to evacuate the aligning member by an amount representing an evacuation displacement in the movement direction at a timing of aligning the sheet, the evacuation displacement being determined adaptively according to at least one of an attribute of a given sheet in the stack, an attribute of the stack as a whole and an attribute of the tray.Type: ApplicationFiled: January 30, 2007Publication date: August 2, 2007Inventors: Toru Horio, Minoru Hattori, Shigeru Mizuno, Ikumi Takashima, Koji Furuta, Masanobu Kimata, Miyuki Ito, Yoshihide Sugiyama, Akihiro Tsuno, Nakayama Naoya, Ueno Shinichi
-
Publication number: 20060158823Abstract: An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.Type: ApplicationFiled: March 9, 2006Publication date: July 20, 2006Applicant: ANELVA CORPORATIONInventors: Shigeru Mizuno, Masahito Ishihara, Sunil Wickramanayaka, Naoki Miyazaki
-
Patent number: 6974721Abstract: In manufacturing a thin semiconductor chip, a wafer is stably held during processing to maintain a stable shape and to avoid generation of cracks on the wafer. When a thin wafer having a surface thereon is to be processed, a rigid support body is adhered to the other surface of the thin wafer and a ring-shaped frame, encircling an outer periphery of the thin wafer, is adhered to the rigid support body.Type: GrantFiled: August 28, 2003Date of Patent: December 13, 2005Assignee: Shinko Electric Industries Co., Ltd.Inventors: Naoyuki Koizumi, Kei Murayama, Shigeru Mizuno, Takashi Kurihara
-
Publication number: 20050176169Abstract: To provide a method, for manufacturing a thin semiconductor chip, in which the wafer is stably held during processing to maintain a stable shape and to avoid generation of cracks on the wafer. When a thin wafer (1) having a surface (1a) thereon is to be processed, the method comprising the steps of: adhering a rigid support body (2) to the other surface (1b) of the thin wafer (1); and adhering a ring-shaped frame (3) encircling an outer periphery of the thin wafer to the rigid support body (2).Type: ApplicationFiled: August 28, 2003Publication date: August 11, 2005Inventors: Naoyuki Koizumi, Kei Murayama, Shigeru Mizuno, Takashi Kurihara
-
Patent number: 6872289Abstract: A thin film is fabricated while causing ions in a plasma P to be incident by effecting biasing relative to the space potential of the plasma P by imparting a set potential to the surface of a substrate 9. A bias system 6 causes the substrate surface potential Vs to vary in pulse form by imposing an electrode imposed voltage Ve in pulse form on a bias electrode 23 which is in a dielectric block 22. The pulse frequency is lower than the oscillation frequency of ions in the plasma P, and the pulse period T, pulse width t and pulse height h are controlled by a control section 62 in a manner such that the incidence of ions is optimized. The imposed pulses are controlled in a manner such that the substrate surface potential Vs recovers to a floating potential Vf at the end of a pulse period T, and that the ion incidence energy temporarily crosses a thin film sputtering threshold value in a pulse period T.Type: GrantFiled: March 7, 2001Date of Patent: March 29, 2005Assignee: Anelva CorporationInventors: Shigeru Mizuno, Makoto Satou, Manabu Tagami, Hideki Satou