Patents by Inventor Shih-Wei Lin

Shih-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170358551
    Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.
    Type: Application
    Filed: August 29, 2017
    Publication date: December 14, 2017
    Inventors: Ping-Yin Liu, Shih-Wei Lin, Xin-Hua Huang, Lan-Lin Chao, Chia-Shiung Tsai
  • Publication number: 20170343028
    Abstract: A connecting structure connecting a first device and a second device rigidly but readily demountably comprises a housing having a top cover and a bottom cover to form an internal space. A connector which has an engagement block, a sliding block, and an insert block engages with the second device. A push button having a knob movably mounted on the housing, a sprung hooking structure having a guiding slot engaging with the sliding block, and a hook engaging with the second device provide demountable. The push button resists the engagement block via a through hole of the top cover, the connecting structure being combined with the connector to link with the hooking structure.
    Type: Application
    Filed: May 30, 2016
    Publication date: November 30, 2017
    Inventors: HSING-HSU CHEN, CHIA-HUNG HUNG, SHIH-WEI LIN
  • Patent number: 9815685
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures, a membrane disposed opposite to the plate and including a plurality of corrugations facing the plurality of apertures, and a conductive plug extending from the plate through the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate is an epitaxial (EPI) silicon layer or a silicon-on-insulator (SOI) substrate.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: November 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi-Hsien Chang, Chun-Wen Cheng, Chun-Ren Cheng, Shih-Wei Lin, Wei-Cheng Shen
  • Patent number: 9796584
    Abstract: A bio-sensing semiconductor structure is provided. A transistor includes a channel region and a gate underlying the channel region. A first dielectric layer overlies the transistor. A first opening extends through the first dielectric layer to expose the channel region. A bio-sensing layer lines the first opening and covers an upper surface of the channel region. A second dielectric layer lines the first opening over the bio-sensing layer. A second opening within the first opening extends to the bio-sensing layer, through a region of the second dielectric layer overlying the channel region. A method for manufacturing the bio-sensing semiconductor structure is also provided.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: October 24, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Ming Chang, Chih-Jen Chan, Chung-Yen Chou, Lee-Chuan Tseng, Shih-Wei Lin, Yuan-Chih Hsieh
  • Patent number: 9748198
    Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: August 29, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Shih-Wei Lin, Xin-Hua Huang, Lan-Lin Chao, Chia-Shiung Tsai
  • Publication number: 20170158500
    Abstract: A bio-sensing semiconductor structure is provided. A transistor includes a channel region and a gate underlying the channel region. A first dielectric layer overlies the transistor. A first opening extends through the first dielectric layer to expose the channel region. A bio-sensing layer lines the first opening and covers an upper surface of the channel region. A second dielectric layer lines the first opening over the bio-sensing layer. A second opening within the first opening extends to the bio-sensing layer, through a region of the second dielectric layer overlying the channel region. A method for manufacturing the bio-sensing semiconductor structure is also provided.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 8, 2017
    Inventors: Che-Ming Chang, Chih-Jen Chan, Chung-Yen Chou, Lee-Chuan Tseng, Shih-Wei Lin, Yuan-Chih Hsieh
  • Publication number: 20170129772
    Abstract: A semiconductor structure includes: a first device; a second device contacted with the first device, wherein a chamber is formed between the first device and the second device; a first hole disposed in the second device and defined between a first end with a first circumference and a second end with a second circumference; a second hole disposed in the second device and aligned to the first hole; and a sealing object for sealing the second hole. The first end links with the chamber, and the first circumference is different from the second circumference, the second hole is defined between the second end and a third end with a third circumference, and the second circumference and the third circumference are smaller than the first circumference.
    Type: Application
    Filed: January 17, 2017
    Publication date: May 11, 2017
    Inventors: CHUN-WEN CHENG, YI-CHUAN TENG, CHENG-YU HSIEH, LEE-CHUAN TSENG, SHIH-CHANG LIU, SHIH-WEI LIN
  • Patent number: 9637378
    Abstract: The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus. In some embodiments, the method is performed by providing a substrate into a processing chamber having one or more residual gases. A cavity is formed within a top surface of the substrate. The cavity has a bottom surface and sidewalls extending from the bottom surface to the top surface. A getter layer, which absorbs the one or more residual gases, is deposited over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls. By depositing the getter layer to extend to a location on the sidewalls of the cavity, the area of the substrate that is able to absorb the one or more residual gases is increased.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: May 2, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Jen Chan, Lee-Chuan Tseng, Shih-Wei Lin, Che-Ming Chang, Chung-Yen Chou, Yuan-Chih Hsieh
  • Publication number: 20170102356
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a substrate, a gate structure over a first surface of the substrate, and a source region and a drain region in the substrate adjacent to the gate structure. The semiconductor structure further comprises a channel region interposing the source and drain regions and underlying the gate structure. The semiconductor structure further comprises a first layer over a second surface of the substrate opposite to the first surface, and a second layer over the first layer. The semiconductor structure further comprises a sensing film over the channel region and at least a portion of the first and second layers, and a well over the sensing film and cutting off the first layer and the second layer.
    Type: Application
    Filed: October 8, 2015
    Publication date: April 13, 2017
    Inventors: SHIH-WEI LIN, CHANG-MING WU, LEE-CHUAN TSENG, SHIH-CHANG LIU
  • Patent number: 9606081
    Abstract: A bio-sensing semiconductor structure is provided. A transistor includes a channel region and a gate underlying the channel region. A first dielectric layer overlies the transistor. A first opening extends through the first dielectric layer to expose the channel region. A bio-sensing layer lines the first opening and covers an upper surface of the channel region. A second dielectric layer lines the first opening over the bio-sensing layer. A second opening within the first opening extends to the bio-sensing layer, through a region of the second dielectric layer overlying the channel region. A method for manufacturing the bio-sensing semiconductor structure is also provided.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: March 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Ming Chang, Chih-Jen Chan, Chung-Yen Chou, Lee-Chuan Tseng, Shih-Wei Lin, Yuan-Chih Hsieh
  • Patent number: 9567208
    Abstract: A semiconductor structure includes a first device, a second device, a first hole, a second hole, and a sealing object. The second device is contacted to the first device, wherein a chamber is formed between the first device and the second device. The first hole is disposed in the second device and defined between a first end with a first circumference and a second end with a second circumference. The second hole is disposed in the second device and aligned to the first hole. The sealing object seals the second hole. The first end links with the chamber, and the first circumference is different from the second circumference.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: February 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Yi-Chuan Teng, Cheng-Yu Hsieh, Lee-Chuan Tseng, Shih-Wei Lin
  • Publication number: 20160362292
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures, a membrane disposed opposite to the plate and including a plurality of corrugations facing the plurality of apertures, and a conductive plug extending from the plate through the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate is an epitaxial (EPI) silicon layer or a silicon-on-insulator (SOI) substrate.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 15, 2016
    Inventors: YI-HSIEN CHANG, CHUN-WEN CHENG, CHUN-REN CHENG, SHIH-WEI LIN, WEI-CHENG SHEN
  • Publication number: 20160266063
    Abstract: A bio-sensing semiconductor structure is provided. A transistor includes a channel region and a gate underlying the channel region. A first dielectric layer overlies the transistor. A first opening extends through the first dielectric layer to expose the channel region. A bio-sensing layer lines the first opening and covers an upper surface of the channel region. A second dielectric layer lines the first opening over the bio-sensing layer. A second opening within the first opening extends to the bio-sensing layer, through a region of the second dielectric layer overlying the channel region. A method for manufacturing the bio-sensing semiconductor structure is also provided.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 15, 2016
    Inventors: Che-Ming Chang, Chih-Jen Chan, Chung-Yen Chou, Lee-Chuan Tseng, Shih-Wei Lin, Yuan-Chih Hsieh
  • Publication number: 20160256522
    Abstract: The invention relates to a method for enhancing wound healing in a subject in need thereof, comprising administering to the subject a composition comprising fibronectin type III domain-containing protein 5 (FNDC5) or its cleaved fragment irisin in an amount effective to enhance wound healing
    Type: Application
    Filed: September 7, 2015
    Publication date: September 8, 2016
    Applicant: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ming-Hong Tai, Shih-Wei Lin, Hsuan-Yi Hsiao, Chang-Yi Wu, Shih-Hsuan Cheng, Po-Han Tai, Han-En Tsai, Chia-Wen Hsieh, Jian-Ching Wu
  • Patent number: 9434076
    Abstract: The present disclosure relates to a wafer transfer robot having a robot blade that can be used to handle substrates that are patterned on both sides without causing warpage of the substrates. In some embodiments, the wafer transfer robot has a robot blade coupled to a transfer arm that varies a position of the robot blade. The robot blade has a wafer reception area that receives a substrate. Two or more spatially distinct contact points are located at positions along a perimeter of the wafer reception area that provide support to opposing edges of the substrate. The two or more contact points are separated by a cavity in the robot blade. The cavity mitigates contact between a backside of the substrate and the robot blade, while providing support to opposing sides of the substrate to prevent warpage of the substrate.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: September 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lee-Chuan Tseng, Chih-Jen Chan, Shih-Wei Lin, Che-Ming Chang, Chung-Yen Chou, Yuan-Chih Hsieh
  • Patent number: 9417209
    Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET includes a microwells having a sensing layer, a top metal stack under the sensing layer, and a multi-layer interconnect (MLI) under the top metal stack. The top metal stack includes a top metal and a protective layer over and peripherally surrounding the top metal.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: August 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Cheng Shen, Yi-Hsien Chang, Shih-Wei Lin, Chun-Ren Cheng
  • Publication number: 20160207756
    Abstract: A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.
    Type: Application
    Filed: January 16, 2015
    Publication date: July 21, 2016
    Inventors: Yi-Hsien CHANG, Tzu-Heng WU, Chun-Ren CHENG, Shih-Wei LIN, Jung-Kuo TU
  • Publication number: 20160054765
    Abstract: A communication apparatus includes a pair of securing brackets, a locking assembly. The pair of securing brackets are parallel with each other to collectively define an accommodate space. The locking assembly is received in the accommodate space and used to lock at least one electronic device in the communication apparatus. The locking assembly includes a housing, a latching member, a spring member and a key member. The latching member is pivotably connected to the housing by a pivoting member, and includes a pair of latching portions used to pass through the housing to be locked in the communication apparatus. The spring member is elastically connected between the housing and the latching member. The key member includes a pair of coupling portions engage with the pair of receiving portions to make the latching member rotate relative to the housing about the pivoting member.
    Type: Application
    Filed: November 4, 2015
    Publication date: February 25, 2016
    Inventor: SHIH-WEI LIN
  • Patent number: 9228974
    Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of microwells having a bio-sensing layer and a number of stacked well portions over a multi-layer interconnect (MLI). A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The microwells are formed by removing a top metal plate on a topmost level of the MLI.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsien Chang, Wei-Cheng Shen, Shih-Wei Lin, Chun-Ren Cheng
  • Patent number: 9224615
    Abstract: A method of etching a trench in a substrate is provided. The method repeatedly alternates between using a fluorine-based plasma to etch a trench, which has trench sidewalls, into a selected region of the substrate; and using a fluorocarbon plasma to deposit a liner on the trench sidewalls. The liner, when formed and subsequently etched, has an exposed sidewall surface that includes scalloped recesses. The trench, which includes the scalloped recesses, is then bombarded with a molecular beam where the molecules are directed on an axis parallel to the trench sidewalls to reduce the scalloped recesses.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: December 29, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Ming Chang, Lee-Chuan Tseng, Shih-Wei Lin, Chih-Jen Chan, Yuan-Chih Hsieh, Ming Chyi Liu, Chung-Yen Chou