Patents by Inventor Shih-Wei Lin
Shih-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9210821Abstract: A locking assembly used to lock at least one electronic device in a communication apparatus includes a housing, a latching member, a spring member and a key member. The latching member is pivotably connected to the housing by a pivoting member, and includes a pair of latching portions used to pass through the housing to be locked in the communication apparatus. The spring member is elastically connected between the housing and the latching member. The key member includes a pair of coupling portions used to be inserted into the housing and engage with the pair of receiving portions to make the latching member rotate relative to the housing about the pivoting member, so as to make the pair of latching portions to be released from the corresponding latching holes.Type: GrantFiled: October 9, 2012Date of Patent: December 8, 2015Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Shih-Wei Lin
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Publication number: 20150330942Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of micro wells having a sensing gate bottom and a number of stacked well portions. A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The micro wells are formed by multiple etching operations through different materials, including a sacrificial plug, to expose the sensing gate without plasma induced damage.Type: ApplicationFiled: July 27, 2015Publication date: November 19, 2015Inventors: Yi-Hsien Chang, Chun-Ren Cheng, Shih-Wei Lin, Yi-Shao Liu
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Publication number: 20150287694Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.Type: ApplicationFiled: May 29, 2015Publication date: October 8, 2015Inventors: Ping-Yin Liu, Shih-Wei Lin, Xin-Hua Huang, Lan-Lin Chao, Chia-Shiung Tsai
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Publication number: 20150233864Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET includes a microwells having a sensing layer, a top metal stack under the sensing layer, and a multi-layer interconnect (MLI) under the top metal stack. The top metal stack includes a top metal and a protective layer over and peripherally surrounding the top metal.Type: ApplicationFiled: May 4, 2015Publication date: August 20, 2015Inventors: Wei-Cheng Shen, Yi-Hsien Chang, Shih-Wei Lin, Chun-Ren Cheng
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Patent number: 9091647Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of micro wells having a sensing gate bottom and a number of stacked well portions. A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The micro wells are formed by multiple etching operations through different materials, including a sacrificial plug, to expose the sensing gate without plasma induced damage.Type: GrantFiled: September 8, 2012Date of Patent: July 28, 2015Inventors: Yi-Hsien Chang, Chun-Ren Cheng, Shih-Wei Lin, Yi-Shao Liu
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Patent number: 9058849Abstract: A hard disk frame for holding a hard disk drive can include a supporting plate defining a first opening, a first group of positioning portions and a second group of positioning portions. Each of the first and second group of the positioning portions can define a second opening. The second openings can communicate with the first opening. The first group of the positioning portions can enable the hard disk drive to be mounted to the supporting plate at a first direction, and a second group of the positioning portions can enable the hard disk drive to be mounted to the supporting plate in a second orientation different from the first direction. As a result, the hard disk can be arranged in the hard disk frame at different orientations.Type: GrantFiled: September 5, 2014Date of Patent: June 16, 2015Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Shih-Wei Lin, Jiunn-Her Li
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Patent number: 9048283Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.Type: GrantFiled: July 5, 2012Date of Patent: June 2, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ping-Yin Liu, Shih-Wei Lin, Xin-Hua Huang, Lan-Lin Chao, Chia-Shiung Tsai
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Patent number: 9023674Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET includes a microwells having a sensing layer, a top metal stack under the sensing layer, and a multi-layer interconnect (MLI) under the top metal stack. The top metal stack includes a top metal and a protective layer over and peripherally surrounding the top metal.Type: GrantFiled: September 20, 2013Date of Patent: May 5, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Cheng Shen, Yi-Hsien Chang, Shih-Wei Lin, Chun-Ren Cheng
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Publication number: 20150116864Abstract: A hard disk frame for holding a hard disk drive can include a supporting plate defining a first opening, a first group of positioning portions and a second group of positioning portions. Each of the first and second group of the positioning portions can define a second opening. The second openings can communicate with the first opening. The first group of the positioning portions can enable the hard disk drive to be mounted to the supporting plate at a first direction, and a second group of the positioning portions can enable the hard disk drive to be mounted to the supporting plate in a second orientation different from the first direction. As a result, the hard disk can be arranged in the hard disk frame at different orientations.Type: ApplicationFiled: September 5, 2014Publication date: April 30, 2015Inventors: SHIH-WEI LIN, JIUNN-HER LI
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Publication number: 20150084099Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET includes a microwells having a sensing layer, a top metal stack under the sensing layer, and a multi-layer interconnect (MLI) under the top metal stack. The top metal stack includes a top metal and a protective layer over and peripherally surrounding the top metal.Type: ApplicationFiled: September 20, 2013Publication date: March 26, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wei-Cheng Shen, Yi-Hsien Chang, Shih-Wei Lin, Chun-Ren Cheng
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Publication number: 20150069539Abstract: The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus. In some embodiments, the method is performed by providing a substrate into a processing chamber having one or more residual gases. A cavity is formed within a top surface of the substrate. The cavity has a bottom surface and sidewalls extending from the bottom surface to the top surface. A getter layer, which absorbs the one or more residual gases, is deposited over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls. By depositing the getter layer to extend to a location on the sidewalls of the cavity, the area of the substrate that is able to absorb the one or more residual gases is increased.Type: ApplicationFiled: September 11, 2013Publication date: March 12, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Jen Chan, Lee-Chuan Tseng, Shih-Wei Lin, Che-Ming Chang, Chung-Yen Chou, Yuan-Chih Hsieh
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Publication number: 20150069581Abstract: A method of etching a trench in a substrate is provided. The method repeatedly alternates between using a fluorine-based plasma to etch a trench, which has trench sidewalls, into a selected region of the substrate; and using a fluorocarbon plasma to deposit a liner on the trench sidewalls. The liner, when formed and subsequently etched, has an exposed sidewall surface that includes scalloped recesses. The trench, which includes the scalloped recesses, is then bombarded with a molecular beam where the molecules are directed on an axis parallel to the trench sidewalls to reduce the scalloped recesses.Type: ApplicationFiled: September 11, 2013Publication date: March 12, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Ming Chang, Lee-Chuan Tseng, Shih-Wei Lin, Chih-Jen Chan, Yuan-Chih Hsieh, Ming Chyi Liu, Chung-Yen Chou
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Publication number: 20150044008Abstract: The present disclosure relates to a wafer transfer robot having a robot blade that can be used to handle substrates that are patterned on both sides without causing warpage of the substrates. In some embodiments, the wafer transfer robot has a robot blade coupled to a transfer arm that varies a position of the robot blade. The robot blade has a wafer reception area that receives a substrate. Two or more spatially distinct contact points are located at positions along a perimeter of the wafer reception area that provide support to opposing edges of the substrate. The two or more contact points are separated by a cavity in the robot blade. The cavity mitigates contact between a backside of the substrate and the robot blade, while providing support to opposing sides of the substrate to prevent warpage of the substrate.Type: ApplicationFiled: August 6, 2013Publication date: February 12, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lee-Chuan Tseng, Chih-Jen Chan, Shih-Wei Lin, Che-Ming Chang, Chung-Yen Chou, Yuan-Chih Hsieh
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Publication number: 20140308752Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of microwells having a bio-sensing layer and a number of stacked well portions over a multi-layer interconnect (MLI). A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The microwells are formed by removing a top metal plate on a topmost level of the MLI.Type: ApplicationFiled: July 19, 2013Publication date: October 16, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Hsien Chang, Wei-Cheng Shen, Shih-Wei Lin, Chun-Ren Cheng
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Patent number: 8760857Abstract: An exemplary USB device includes a base including a body and a pair of arms extending from the body, a head rotatably positioned between the pair of arms, and a pair of wheels fixed to the head. When the base is gripped by a user and oriented at an oblique angle relative to an external surface, with the at least one wheel contacting the surface, and the base is moved by the user in a direction generally parallel to the surface, the head is capable of rotating relative to the base by reason of friction between the wheels and the surface, and the head is opened out from the base and is secured in position at a desired angle with respect to the base when the user ceases moving the base.Type: GrantFiled: December 9, 2011Date of Patent: June 24, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Shih-Wei Lin, Tzu-Hsiu Hung
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Patent number: 8728845Abstract: The present disclosure provides various methods for removing an anti-stiction layer. An exemplary method includes forming an anti-stiction layer over a substrate, including over a first substrate region of a first material and a second substrate region of a second material, wherein the second material is different than the first material; and selectively removing the anti-stiction layer from the second substrate region of the second material without using a mask.Type: GrantFiled: March 24, 2011Date of Patent: May 20, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Wei Lin, Ping-Yin Liu, Lan-Lin Chao, Jung-Huei Peng, Chia-Shiung Tsai
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Publication number: 20140069247Abstract: A cutter used for cutting sheet material includes a cutting board, a knife rack and two pairs of knife wheels. The cutting board allows the sheet material to be placed on and has a guiding track. The knife rack is arranged on the cutting board and is able to slide along with the guiding track. One inner side of the knife rack near the guiding track is provided with two pairs of knife grooves, and two guiding grooves are provided on the knife rack between the two pairs of knife grooves respectively, and the two guiding grooves are used to guide the cut sheet material to leave. The two knife wheels are installed inside the upper and lower pairs of knife grooves of the knife rack.Type: ApplicationFiled: September 12, 2012Publication date: March 13, 2014Inventors: Chuan-Sheng LIN, Shih-Wei Lin
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Publication number: 20140073039Abstract: The present disclosure provides a biological field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a plurality of micro wells having a sensing gate bottom and a number of stacked well portions. A bottom surface area of a well portion is different from a top surface area of a well portion directly below. The micro wells are formed by multiple etching operations through different materials, including a sacrificial plug, to expose the sensing gate without plasma induced damage.Type: ApplicationFiled: September 8, 2012Publication date: March 13, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Hsien Chang, Chun-Ren Cheng, Shih-Wei Lin, Yi-Shao Liu
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Publication number: 20140054066Abstract: A circuit layout method for a printed circuit board (PCB) is provided. The method includes forming a pair of signal traces on the PCB, and disposing a ground trace between the pair of signal traces. The pair of signal traces and the ground trace are located at a same layer of the PCB, and the ground trace renders the pair of transmission traces to have predetermined impedance. An associated PCB is also provided. The PCB includes a circuit layer, and a ground layer for grounding. The circuit layer includes a pair of signal traces, and a ground grace disposed between the pair of signal traces. The circuit layer is different from the ground layer. Based on the circuit layout method and the associated PCB, an electronic apparatus not only complies with mobile high-definition link (MHL) requirements regarding impedance between signal traces but also offers reduced costs.Type: ApplicationFiled: August 1, 2013Publication date: February 27, 2014Applicant: MStar Semiconductor, Inc.Inventors: Tien Hua Yu, Shih Wei Lin
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Publication number: 20140011324Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.Type: ApplicationFiled: July 5, 2012Publication date: January 9, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ping-Yin Liu, Shih-Wei Lin, Xin-Hua Huang, Lan-Lin Chao, Chia-Shiung Tsai