Patents by Inventor Shin Hashimoto
Shin Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7749828Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm?3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm?3.Type: GrantFiled: March 3, 2006Date of Patent: July 6, 2010Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shin Hashimoto, Makoto Kiyama, Takashi Sakurada, Tatsuya Tanabe, Kouhei Miura, Tomihito Miyazaki
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Patent number: 7741207Abstract: A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulating film, and a third metal pattern formed in the second insulating film and connecting between the first metal pattern and the second metal pattern. The third metal pattern is a single continuous structure, and the principal orientation axes of crystals of a metal constituting the third metal pattern are parallel to the principal surface of the semiconductor substrate.Type: GrantFiled: November 14, 2007Date of Patent: June 22, 2010Assignee: Panasonic CorporationInventors: Shin Hashimoto, Tadaaki Mimura
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Publication number: 20100048004Abstract: A production method for a semiconductor device includes the steps of: (a) providing a semiconductor substrate having a semiconductor layer 2 of a first conductivity type formed on a surface thereof; (b) forming a first mask 30 so as to cover a predetermined region of the semiconductor layer 2; (c) forming a well region 6 of a second conductivity type by implanting impurity ions of the second conductivity type into the semiconductor layer 2 having the first mask 30 formed thereon; (d) reducing the thickness t1 of the first mask 30 by removing a portion of the first mask 30; (e) forming a second mask 34 covering a portion of the well region 6 by using photolithography; and (f) forming a source region 8 of the first conductivity type by implanting impurity ions of the first conductivity type into the semiconductor layer 2 having the first mask 30? with the reduced thickness and the second mask 34 formed thereon.Type: ApplicationFiled: August 31, 2007Publication date: February 25, 2010Inventors: Koichi Hashimoto, Shin Hashimoto, Kyoko Egashira
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Patent number: 7582394Abstract: A photomask includes, on a translucent substrate, three or more first light-shielding portions each in insular shape having a property of shielding exposure light and spaced equidistantly, a second light-shielding portion having a property of shielding the exposure light and formed to connect the adjacent first light-shielding portions, and first light-transmitting portions each in slit shape having a property of transmitting the exposure light and formed to be surrounded with the first and second light-shielding portions. The second light-shielding portion is formed to contain a point located equidistantly from the three or more first light-shielding portions.Type: GrantFiled: October 5, 2004Date of Patent: September 1, 2009Assignee: Panasonic CorporationInventors: Kenji Noda, Shin Hashimoto
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Publication number: 20090194847Abstract: An AlxGayIn1-x-yN crystal substrate of the present invention has a main plane having an area of at least 10 cm2. The main plane has an outer region located within 5 mm from an outer periphery of the main plane, and an inner region corresponding to a region other than the outer region. The inner region has a total dislocation density of at least 1×102 cm?2 and at most 1×106 cm-31 2. It is thereby possible to provide an AlxGayIn1-x-yN crystal substrate having a large size and a suitable dislocation density for serving as a substrate for a semiconductor device, a semiconductor device including the AlxGayIn1-x-yN crystal substrate, and a method of manufacturing the same.Type: ApplicationFiled: October 16, 2006Publication date: August 6, 2009Applicant: Sumitomo Electric Industries, Ltd.Inventors: Shinsuke Fujiwara, Tomoki Uemura, Takuji Okahisa, Koji Uematsu, Manabu Okui, Muneyuki Nishioka, Shin Hashimoto
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Publication number: 20090194796Abstract: Affords epitaxial substrates for vertical gallium nitride semiconductor devices that have a structure in which a gallium nitride film of n-type having a desired low carrier concentration can be provided on a gallium nitride substrate of n type. A gallium nitride epitaxial film (65) is provided on a gallium nitride substrate (63). A layer region (67) is provided in the gallium nitride substrate (63) and the gallium nitride epitaxial film (65). An interface between the gallium nitride substrate (43) and the gallium nitride epitaxial film (65) is positioned in the layer region (67). In the layer region (67), a peak value of donor impurity along an axis from the gallium nitride substrate (63) to the gallium nitride epitaxial film (65) is 1×1018 cm?3 or more. The donor impurity is at least either silicon or germanium.Type: ApplicationFiled: March 1, 2006Publication date: August 6, 2009Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Shin Hashimoto, Makoto Kiyama, Tatsuya Tanabe, Kouhei Miura, Takashi Sakurada
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Publication number: 20090189190Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm?3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm?3.Type: ApplicationFiled: March 3, 2006Publication date: July 30, 2009Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Shin Hashimoto, Makoto Kiyama, Takashi Sakurada, Tatsuya Tanabe, Kouhei Miura, Tomihito Miyazaki
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Publication number: 20090147793Abstract: A packet communication network is connected between a first external network and a second external network. The packet communication network includes a classifier, a parallel network that includes a plurality of physically or logically independent networks, and a multiplexing router. The classifier classifies a packet input from the first external network to one of the networks in the parallel network. Each of the networks in the parallel network transmits the packet to the multiplexing router. The multiplexing router multiplexes a packet received from the networks in the parallel network and outputs the multiplexed packet to the second external network.Type: ApplicationFiled: October 25, 2005Publication date: June 11, 2009Applicant: NIPPON TELEGRAPH AND TELEPHONE CORP.Inventors: Kazuhiro Hayakawa, Satoru Yoshida, Makoto Fukuda, Nobuo Shigeta, Kazuhiko Ogawa, Shin Hashimoto
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Patent number: 7538005Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.Type: GrantFiled: March 6, 2007Date of Patent: May 26, 2009Assignee: Panasonic CorporationInventors: Kyoko Egashira, Shin Hashimoto
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Publication number: 20090051007Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.Type: ApplicationFiled: August 4, 2008Publication date: February 26, 2009Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kyoko Egashira, Shin Hashimoto
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Publication number: 20080284026Abstract: A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulating film, and a third metal pattern formed in the second insulating film and connecting between the first metal pattern and the second metal pattern. The third metal pattern is a single continuous structure, and the principal orientation axes of crystals of a metal constituting the third metal pattern are parallel to the principal surface of the semiconductor substrate.Type: ApplicationFiled: November 14, 2007Publication date: November 20, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Shin Hashimoto, Tadaaki Mimura
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Patent number: 7331844Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.Type: GrantFiled: April 19, 2006Date of Patent: February 19, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiro Tanoue, Yoshiharu Hidaka, Shin Hashimoto
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Patent number: 7312530Abstract: A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulating film, and a third metal pattern formed in the second insulating film and connecting between the first metal pattern and the second metal pattern. The third metal pattern is a single continuous structure, and the principal orientation axes of crystals of a metal constituting the third metal pattern are parallel to the principal surface of the semiconductor substrate.Type: GrantFiled: September 22, 2004Date of Patent: December 25, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shin Hashimoto, Tadaaki Mimura
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Publication number: 20070242684Abstract: Full-mesh WDM transmission units, each of which includes n number of interfaces and is capable of establishing a bidirectional full-mesh communication between all of the interfaces using wavelength paths based on a wavelength division multiplexing technique, are connected in a multistage tree-shaped structure by internetwork connection units through edge-packet transfer units connected to the respective interfaces. Therefore, it is possible to hold a direct communication between user terminals connected to the edge-packet transfer units of the same full-mesh WDM transmission unit, and to realize scalability by a multistage connection configuration.Type: ApplicationFiled: October 25, 2005Publication date: October 18, 2007Applicant: NIPPON TELEGRAPH AND TEPLEPHONE CORP.Inventors: Kazuhiro Hayakawa, Satoru Yoshida, Makoto Fukuda, Nobuo Shigeta, Kazuhiko Ogawa, Shin Hashimoto
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Patent number: 7249995Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.Type: GrantFiled: June 14, 2004Date of Patent: July 31, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiro Tanoue, Yoshiharu Hidaka, Shin Hashimoto
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Publication number: 20070155147Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.Type: ApplicationFiled: March 6, 2007Publication date: July 5, 2007Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kyoko Egashira, Shin Hashimoto
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Patent number: 7190045Abstract: A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.Type: GrantFiled: March 31, 2004Date of Patent: March 13, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kyoko Egashira, Shin Hashimoto
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Patent number: 7166018Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.Type: GrantFiled: December 18, 2003Date of Patent: January 23, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiro Tanoue, Yoshiharu Hidaka, Shin Hashimoto
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Publication number: 20060199480Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.Type: ApplicationFiled: April 19, 2006Publication date: September 7, 2006Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiro Tanoue, Yoshiharu Hidaka, Shin Hashimoto
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Patent number: 7052377Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.Type: GrantFiled: June 14, 2004Date of Patent: May 30, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiro Tanoue, Yoshiharu Hidaka, Shin Hashimoto