Patents by Inventor Shinichi Kurita

Shinichi Kurita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105427
    Abstract: Embodiments of the present disclosure include methods and apparatus for depositing a plurality of layers on a large area substrate. In one embodiment, a processing chamber for plasma deposition is provided. The processing chamber includes a showerhead and a substrate support assembly. The showerhead is coupled to an RF power source and a ground and includes a plurality of perforated gas diffusion members. A plurality of plasma applicators is disposed within the showerhead, wherein one plasma applicator of the plurality of plasma applicators corresponds to one of the plurality of perforated gas diffusion members. Further, a DC bias power source is coupled to a substrate support assembly.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventors: Chien-Teh KAO, Tae Kyung WON, Carl A. SORENSEN, Sanjay D. YADAV, Young Dong LEE, Shinichi KURITA, Soo Young CHOI
  • Patent number: 11914896
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The nonvolatile memory is correspond to a first mode of writing data of N bits per unit area and a second mode of writing data of M bits (M>N) per unit area. When receiving a first command issued prior to a write command to instruct writing write data to the nonvolatile memory, the controller selects one or both of the first mode and the second mode for writing the write data to the nonvolatile memory, to allow writing the write data to the nonvolatile memory to be executed in the first mode as much as possible, based on a capacity of the write data specified by the first command and a capacity of a free area of the nonvolatile memory.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: February 27, 2024
    Assignee: Kioxia Corporation
    Inventors: Takahiro Kurita, Shinichi Kanno
  • Patent number: 11854771
    Abstract: Embodiments of the present disclosure include methods and apparatus for depositing a plurality of layers on a large area substrate. In one embodiment, a processing chamber for plasma deposition is provided. The processing chamber includes a showerhead and a substrate support assembly. The showerhead is coupled to an RF power source and a ground and includes a plurality of perforated gas diffusion members. A plurality of plasma applicators is disposed within the showerhead, wherein one plasma applicator of the plurality of plasma applicators corresponds to one of the plurality of perforated gas diffusion members. Further, a DC bias power source is coupled to a substrate support assembly.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: December 26, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chien-Teh Kao, Tae Kyung Won, Carl A. Sorensen, Sanjay D. Yadav, Young Dong Lee, Shinichi Kurita, Soo Young Choi
  • Publication number: 20230260811
    Abstract: An assembled grid tray is disclosed, comprising a frame for holding multiple substrate trays to form a larger tray for use in a semiconductor processing tool. The frame may be comprised of two outer frame members that hold one or more of the trays, each with a magnet rail use with a maglev system. The frame may be further comprised of an inner frame member positioned between the outer frame members, which may also include a magnet rail, with the frame members being held in position by one or more outer beam members. The frame members may be fabricated of a material having a similar thermal expansion to trays to be placed in the frame.
    Type: Application
    Filed: August 18, 2021
    Publication date: August 17, 2023
    Inventors: Shinobu ABE, Chang Hee SHIN, Shinichi KURITA, Masahiko KOWAKA
  • Patent number: 11600642
    Abstract: Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer containing zirconium dioxide or hafnium dioxide disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: March 7, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xiangxin Rui, Soo Young Choi, Shinichi Kurita, Yujia Zhai, Lai Zhao
  • Patent number: 11123837
    Abstract: Methods for manufacturing a diffuser plate for a PECVD chamber are provided. The methods provide for applying a compliant abrasive medium to round the sharp edges at corners of the output holes on a contoured downstream side of a gas diffuser plate. By rounding the edges of the output holes reduces the flaking of deposited materials on the downstream side of the gas diffuser plate and reduces the amount of undesirable particles generated during the PECVD deposition process.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 21, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Ilyoung Hong, Lai Zhao, Jianhua Zhou, Robin L. Tiner, Gaku Furuta, Shinichi Kurita, Soo Young Choi
  • Publication number: 20210288084
    Abstract: Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer containing zirconium dioxide or hafnium dioxide disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.
    Type: Application
    Filed: May 27, 2021
    Publication date: September 16, 2021
    Inventors: Xiangxin RUI, Soo Young CHOI, Shinichi KURITA, Yujia ZHAI, Lai ZHAO
  • Publication number: 20210280392
    Abstract: Embodiments of the present disclosure include methods and apparatus for depositing a plurality of layers on a large area substrate. In one embodiment, a processing chamber for plasma deposition is provided. The processing chamber includes a showerhead and a substrate support assembly. The showerhead is coupled to an RF power source and a ground and includes a plurality of perforated gas diffusion members. A plurality of plasma applicators is disposed within the showerhead, wherein one plasma applicator of the plurality of plasma applicators corresponds to one of the plurality of perforated gas diffusion members. Further, a DC bias power source is coupled to a substrate support assembly.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Inventors: Chien-Teh KAO, Tae Kyung WON, Carl A. SORENSEN, Sanjay D. YADAV, Young Dong LEE, Shinichi KURITA, Soo Young CHOI
  • Patent number: 11094508
    Abstract: Embodiments of the present disclosure include methods and apparatus for depositing a plurality of layers on a large area substrate. In one embodiment, a processing chamber for plasma deposition is provided. The processing chamber includes a showerhead and a substrate support assembly. The showerhead is coupled to an RF power source and a ground and includes a plurality of perforated gas diffusion members. A plurality of plasma applicators is disposed within the showerhead, wherein one plasma applicator of the plurality of plasma applicators corresponds to one of the plurality of perforated gas diffusion members. Further, a DC bias power source is coupled to a substrate support assembly.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: August 17, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chien-Teh Kao, Tae Kyung Won, Carl A. Sorensen, Sanjay D. Yadav, Young Dong Lee, Shinichi Kurita, Soo Young Choi
  • Patent number: 11049965
    Abstract: A semiconductor device includes a first external electrode with a first electrode surface portion; a second external electrode with a second electrode surface portion; a MOSFET chip with a built-in Zener diode which includes an active region and a peripheral region; a control IC chip which drives the MOSFET chip based on voltage or current between a drain electrode and a source electrode of the MOSFET chip; and a capacitor which supplies power to the MOSFET chip and the control IC chip. The first electrode surface portion is connected to either the drain electrode or the source, the second electrode surface portion is connected to either the source electrode or the drain electrode, a plurality of unit cells of the MOSFET with the built-in Zener diode are provided in the active region, and the breakdown voltage of the Zener diode is set to be lower than that of the peripheral region.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: June 29, 2021
    Assignee: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
    Inventors: Masaki Shiraishi, Tetsuya Ishimaru, Junichi Sakano, Mutsuhiro Mori, Shinichi Kurita
  • Patent number: 11049887
    Abstract: Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: June 29, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Xiangxin Rui, Soo Young Choi, Shinichi Kurita, Yujia Zhai, Lai Zhao
  • Patent number: 11022032
    Abstract: An engine includes: a cylinder head that forms an intake port connected to a combustion chamber; a throttle body that is joined to the intake port and adjusts a degree of an opening of an intake passage by rotating a throttle vale around a rotation axis of a valve shaft, the throttle vale being fixed to the valve shaft; and a case that stores a drive member and supports a drive motor, the drive member being fixed to the valve shaft, the drive motor generating a drive force that is transmitted to the drive member. The case overlaps with the intake port as seen in a side view. Accordingly, in the engine, it is possible to reduce the volume of the intake passage between the throttle valve and the combustion chamber.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: June 1, 2021
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Masahiro Kontani, Kensuke Mori, Toshiaki Deguchi, Shinichi Kurita
  • Patent number: 11012022
    Abstract: The object of the invention is to provide an inverter device and an electric motor device using the same to shorten a dead time. Thus, an inverter device is provided, which includes: a switching element including a control terminal and a pair of main terminals; a control circuit configured to output a control signal which indicates whether to instruct an ON state of the switching element; a decision circuit configured to output a decision signal which indicates a state of the switching element based on a voltage between the main terminals of the switching element; and a drive circuit configured to control the ON state or an OFF state of the switching element based on the control signal and the decision signal.
    Type: Grant
    Filed: May 28, 2018
    Date of Patent: May 18, 2021
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Tetsuya Ishimaru, Junichi Sakano, Shinichi Kurita
  • Patent number: 10954833
    Abstract: An air cleaner includes: an air cleaner box defining a clean chamber that is placed rearward of a dirty chamber, the clean chamber receiving air which has been introduced from front into the dirty chamber and then filtered through an air cleaner element; and funnels that are to be connected to an intake port of an internal combustion engine, the funnels protruding upward into a space within the air cleaner box from a bottom wall of the air cleaner box. The air cleaner further includes a breather chamber into which blow-by gas is introduced from the internal combustion engine, the breather chamber being placed rearward of the funnels and between the funnels and a rear wall of the air cleaner box. Accordingly, the air cleaner can further promote the air-liquid separation of blow-by gas without incurring an increase in weight of the internal combustion engine.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: March 23, 2021
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Masahiro Kontani, Takeji Kawazumi, Toshiaki Deguchi, Shinichi Kurita, Kensuke Mori
  • Patent number: 10697062
    Abstract: Embodiments described herein provide a chamber having a gas flow inlet guide to uniformly deliver process gas and a gas flow outlet guide to effectively purge process gasses and reduce purge time. The chamber includes a chamber body having a process gas inlet and a process gas outlet, a lid assembly, a process gas inlet and a process gas outlet configured to be in fluid communication with a processing region in the chamber, a gas flow inlet guide disposed in the process gas inlet, and a gas flow outlet guide disposed in the process gas outlet. The gas flow inlet guide includes a flow modulator and at least two first inlet guide channels having first inlet guide channel areas that are different. The gas flow outlet guide includes at least two first outlet guide channels having first outlet guide channel areas that are different.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: June 30, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chien-Teh Kao, Jeffrey A. Kho, Xiangxin Rui, Jianhua Zhou, Shinichi Kurita, Shouqian Shao, Guangwei Sun
  • Publication number: 20200194233
    Abstract: Embodiments of the present disclosure include methods and apparatus for depositing a plurality of layers on a large area substrate. In one embodiment, a processing chamber for plasma deposition is provided. The processing chamber includes a showerhead and a substrate support assembly. The showerhead is coupled to an RF power source and a ground and includes a plurality of perforated gas diffusion members. A plurality of plasma applicators is disposed within the showerhead, wherein one plasma applicator of the plurality of plasma applicators corresponds to one of the plurality of perforated gas diffusion members. Further, a DC bias power source is coupled to a substrate support assembly.
    Type: Application
    Filed: December 14, 2018
    Publication date: June 18, 2020
    Inventors: Chien-Teh KAO, Tae Kyung WON, Carl A. SORENSEN, Sanjay D. YADAV, Young Dong LEE, Shinichi KURITA, Soo Young CHOI
  • Publication number: 20200186076
    Abstract: The object of the invention is to provide an inverter device and an electric motor device using the same to shorten a dead time. Thus, an inverter device is provided, which includes: a switching element including a control terminal and a pair of main terminals; a control circuit configured to output a control signal which indicates whether to instruct an ON state of the switching element; a decision circuit configured to output a decision signal which indicates a state of the switching element based on a voltage between the main terminals of the switching element; and a drive circuit configured to control the ON state or an OFF state of the switching element based on the control signal and the decision signal.
    Type: Application
    Filed: May 28, 2018
    Publication date: June 11, 2020
    Inventors: Tetsuya ISHIMARU, Junichi SAKANO, Shinichi KURITA
  • Patent number: 10655222
    Abstract: The present disclosure relates to methods and apparatus for a thin film encapsulation (TFE). In one embodiment a process kit for use in an atomic layer deposition (ALD) chamber is disclosed and includes a dielectric window, a sealing frame, and a mask frame connected with the sealing frame, wherein the mask frame has a gas inlet channel and a gas outlet channel formed therein on opposing sides thereof.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: May 19, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Shinichi Kurita, Srikanth V. Racherla, Suhas Bhoski, Xiangxin Rui
  • Patent number: 10604846
    Abstract: Embodiments described herein relate to a thermal chamber utilized in the processing of display substrates. The thermal chamber may be part of a larger processing system configured to manufacture OLED devices. The thermal chamber may be configured to heat and cool masks and/or substrates utilized in deposition processes in the processing system. The thermal chamber may include a chamber body defining a volume sized to receive one or more cassettes containing a plurality of masks and/or substrates. Heaters coupled to the chamber body within the volume may be configured to controllably heat masks and/or substrates prior to deposition processes and cool the masks and/or substrates after deposition processes.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: March 31, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Shinichi Kurita, Makoto Inagawa, Suhas Bhoski
  • Publication number: 20200063620
    Abstract: An air cleaner includes: an air cleaner box defining a clean chamber that is placed rearward of a dirty chamber, the clean chamber receiving air which has been introduced from front into the dirty chamber and then filtered through an air cleaner element; and funnels that are to be connected to an intake port of an internal combustion engine, the funnels protruding upward into a space within the air cleaner box from a bottom wall of the air cleaner box. The air cleaner further includes a breather chamber into which blow-by gas is introduced from the internal combustion engine, the breather chamber being placed rearward of the funnels and between the funnels and a rear wall of the air cleaner box. Accordingly, the air cleaner can further promote the air-liquid separation of blow-by gas without incurring an increase in weight of the internal combustion engine.
    Type: Application
    Filed: July 19, 2019
    Publication date: February 27, 2020
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Masahiro Kontani, Takeji Kawazumi, Toshiaki Deguchi, Shinichi Kurita, Kensuke Mori