Patents by Inventor Shinichi Uchida

Shinichi Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Thermally conductive sheet, production method for thermally conductive sheet, heat dissipation member, and semiconductor device
    Patent number: 10526519
    Abstract: A thermal conducting sheet including: a binder resin; carbon fibers; and a thermal conducting filler other than the carbon fibers, wherein a mass ratio (carbon fibers/binder resin) of the carbon fibers to the binder resin is less than 1.30, wherein an amount of the thermal conducting filler is from 48% by volume through 70% by volume, and wherein the carbon fibers are oriented in a thickness direction of the thermal conducting sheet.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: January 7, 2020
    Assignee: Dexerials Corporation
    Inventors: Hiroki Kanaya, Yu Nomura, Shunsuke Uchida, Shinichi Uchida, Keisuke Aramaki
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20190393148
    Abstract: In a semiconductor device, a semiconductor substrate includes a bulk layer, a buried oxide layer provided in at least a partial region on the bulk layer, and a surface single crystal layer on the buried oxide layer. An inductor is provided above a main surface side of the semiconductor substrate on which the surface single crystal layer is disposed. To increase a Q value of the inductor, a ground shield is an impurity region formed in the bulk layer below the inductor and below the buried oxide layer.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 26, 2019
    Inventors: Shinichi UCHIDA, Yasutaka NAKASHIBA
  • Semiconductor device
    Patent number: 10497654
    Abstract: A semiconductor device includes an annular seal ring formed in a seal ring region surrounding a circuit forming region. The seal ring includes a BOX layer, an n-type semiconductor layer, and an annular electrode portion comprised of multiple layers of wirings. The electrode portion is electrically connected with the n-type semiconductor layer through a plug electrode.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: December 3, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Yasutaka Nakashiba
  • Semiconductor device and method of manufacturing semiconductor device
    Patent number: 10446543
    Abstract: A semiconductor device of the present invention includes, in a region 1C, a top electrode made by a semiconductor layer of an SOI substrate, a capacitive insulating film made by an insulating layer, a bottom electrode made by a supporting board, and a lead part (a high-concentration impurity region of an n type) of the bottom electrode coupled to the supporting board. An SOI transistor in a region 1B is formed over a main surface of the semiconductor layer over the insulating layer as a thin film, and threshold voltage can be adjusted by applying a voltage to a well arranged on the rear face side of the insulating layer.
    Type: Grant
    Filed: October 29, 2017
    Date of Patent: October 15, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Takafumi Kuramoto, Yasutaka Nakashiba
  • Semiconductor device, electronic circuit having the same, and semiconductor device forming method
    Patent number: 10446485
    Abstract: A semiconductor device includes: a plurality of first wires formed in a first layer and indicating fixed potentials; and an inductor formed in a second layer stacked on the first layer, and wiring widths of the first wires located within a range of a formation region of the inductor in a plan view among the plurality of first wires are formed narrower than wiring widths of the first wires located outside the range of the formation region of the inductor.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: October 15, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Shinichi Uchida
  • Method for measuring toxicity of human CSF
    Patent number: 10232056
    Abstract: The problem is to provide a method that can quickly and efficiently evaluate the toxicity of human cerebrospinal fluid (CSF) with small amounts of human CSF. The problem is solved by a method comprising administering human CSF into the cerebral ventricle of a rodent such as a mouse, and evaluating the cognitive function of the rodent by using a behavioral pharmacological technique.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: March 19, 2019
    Assignee: KYOWA HAKKO KIRIN CO., LTD.
    Inventors: Shinichi Uchida, Tomoyuki Kanda
  • Thermally Conductive Sheet, Production Method for Thermally Conductive Sheet, Heat Dissipation Member, and Semiconductor Device
    Publication number: 20190055443
    Abstract: A thermal conducting sheet including: a binder resin; carbon fibers; and a thermal conducting filler other than the carbon fibers, wherein a mass ratio (carbon fibers/binder resin) of the carbon fibers to the binder resin is less than 1.30, wherein an amount of the thermal conducting filler is from 48% by volume through 70% by volume, and wherein the carbon fibers are oriented in a thickness direction of the thermal conducting sheet.
    Type: Application
    Filed: January 13, 2017
    Publication date: February 21, 2019
    Inventors: Hiroki Kanaya, Yu Nomura, Shunsuke Uchida, Shinichi Uchida, Keisuke Aramaki
  • Thermally Conductive Sheet, Production Method for Thermally Conductive Sheet, Heat Dissipation Member, and Semiconductor Device
    Publication number: 20190035712
    Abstract: A thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein a mass ratio (insulating-coated carbon fibers/binder resin) of the insulating-coated carbon fibers to the binder resin is less than 1.30, and wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Application
    Filed: January 13, 2017
    Publication date: January 31, 2019
    Inventors: Hiroki Kanaya, Shinichi Uchida, Shunsuke Uchida, Gupta Rishabh, Keisuke Aramaki
  • Thermal Conducting Sheet, Method for Manufacturing Thermal Conducting Sheet, Heat Dissipation Member, and Semiconductor Device
    Publication number: 20190019739
    Abstract: Provided is a thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Application
    Filed: January 13, 2017
    Publication date: January 17, 2019
    Inventors: Hiroki Kanaya, Shinichi Uchida, Keisuke Aramaki
  • Semiconductor device
    Patent number: 10115684
    Abstract: A semiconductor device includes a first semiconductor chip including a first plurality of wiring layers, and a first coil, a first bonding pad, and first dummy wires formed in an uppermost layer of the first plurality of the wiring layers, and a second semiconductor chip including a second plurality of wiring layers, a second coil, a second bonding pad, and second dummy wires formed in an uppermost layer of the second plurality of the wiring layers. The first semiconductor chip and the second semiconductor chip face each other via an insulation sheet. The first coil and the second coil are magnetically coupled with each other.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: October 30, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinpei Watanabe, Shinichi Uchida, Tadashi Maeda, Kazuo Henmi
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20180308795
    Abstract: A method of manufacturing a semiconductor device includes a step of: patterning a conductive film formed over an interlayer insulating film so as to form a coil and a conductive pattern in the same layer, and then forming unevennesses on a surface of the interlayer insulating film by etching a portion of the interlayer insulating film with using the coil and the conductive pattern as a mask.
    Type: Application
    Filed: April 16, 2018
    Publication date: October 25, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Shinichi UCHIDA, Yasutaka NAKASHIBA, Tetsuya IIDA, Shinichi KUWABARA
  • Semiconductor device and communication circuit
    Patent number: 10103773
    Abstract: A semiconductor device and a communication circuit capable of reducing the effect of a noise generated in an inductor are provided. A semiconductor device according to an embodiment includes a substrate, a first circuit disposed in a first area of the substrate, a second circuit disposed in a second area of the substrate, the second circuit being configured to operate selectively with the first circuit, a first inductor disposed in the second area and connected to the first circuit, and a second inductor disposed in the first area and connected to the second circuit.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: October 16, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Uchida, Takafumi Kuramoto
  • SEMICONDUCTOR DEVICE, ELECTRONIC CIRCUIT HAVING THE SAME, AND SEMICONDUCTOR DEVICE FORMING METHOD
    Publication number: 20180294221
    Abstract: A semiconductor device includes: a plurality of first wires formed in a first layer and indicating fixed potentials; and an inductor formed in a second layer stacked on the first layer, and wiring widths of the first wires located within a range of a formation region of the inductor in a plan view among the plurality of first wires are formed narrower than wiring widths of the first wires located outside the range of the formation region of the inductor.
    Type: Application
    Filed: December 29, 2017
    Publication date: October 11, 2018
    Inventor: Shinichi Uchida
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20180182751
    Abstract: A semiconductor device of the present invention includes, in a region 1C, a top electrode made by a semiconductor layer of an SOI substrate, a capacitive insulating film made by an insulating layer, a bottom electrode made by a supporting board, and a lead part (a high-concentration impurity region of an n type) of the bottom electrode coupled to the supporting board. An SOI transistor in a region 1B is formed over a main surface of the semiconductor layer over the insulating layer as a thin film, and threshold voltage can be adjusted by applying a voltage to a well arranged on the rear face side of the insulating layer.
    Type: Application
    Filed: October 29, 2017
    Publication date: June 28, 2018
    Inventors: Shinichi UCHIDA, Takafumi KURAMOTO, Yasutaka NAKASHIBA
  • SENSOR DEVICE
    Publication number: 20180108609
    Abstract: A sensor device includes a power line and a semiconductor device. The semiconductor device includes an inductor. The inductor is formed using an interconnect layer (to be described later using FIG. 3). The power line and the semiconductor device overlap each other when viewed from a direction perpendicular to the semiconductor device. The semiconductor device includes two inductors. The power line extends between the two inductors when viewed from a direction perpendicular to the semiconductor device.
    Type: Application
    Filed: December 15, 2017
    Publication date: April 19, 2018
    Inventors: Takatsugu NEMOTO, Yasutaka NAKASHIBA, Takasuke HASHIMOTO, Shinichi UCHIDA, Kazunori GO, Hiroshi OE, Noriko YOSHIKAWA
  • SEMICONDUCTOR DEVICE
    Publication number: 20180047680
    Abstract: A semiconductor device includes an annular seal ring formed in a seal ring region surrounding a circuit forming region. The seal ring includes a BOX layer, an n-type semiconductor layer, and an annular electrode portion comprised of multiple layers of wirings. The electrode portion is electrically connected with the n-type semiconductor layer through a plug electrode.
    Type: Application
    Filed: June 28, 2017
    Publication date: February 15, 2018
    Inventors: Shinichi UCHIDA, Yasutaka NAKASHIBA
  • SEMICONDUCTOR DEVICE
    Publication number: 20180047667
    Abstract: A semiconductor device is provided with a SOI substrate including a semiconductor substrate, a BOX layer on the semiconductor substrate, and a semiconductor layer on the BOX layer, a multilayer wiring formed over a main surface of the SOI substrate, and an inductor comprised of the multilayer wiring. In a region located below the inductor, the BOX layer and the semiconductor layer are separated into a plurality of regions by an element isolation portion, and a dummy gate electrode is formed on a part of the semiconductor layer, which is located in each of the plurality of regions, via a dummy gate insulating film.
    Type: Application
    Filed: June 12, 2017
    Publication date: February 15, 2018
    Inventors: Shinichi UCHIDA, Yasutaka NAKASHIBA
  • Sensor device having inductors, analog and logic circuits for detecting power flowing through a powerline
    Patent number: 9875962
    Abstract: A sensor device includes a power line and a semiconductor device. The semiconductor device includes an inductor. The inductor is formed using an interconnect layer (to be described later using FIG. 3). The power line and the semiconductor device overlap each other when viewed from a direction perpendicular to the semiconductor device. The semiconductor device includes two inductors. The power line extends between the two inductors when viewed from a direction perpendicular to the semiconductor device.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: January 23, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takatsugu Nemoto, Yasutaka Nakashiba, Takasuke Hashimoto, Shinichi Uchida, Kazunori Go, Hiroshi Oe, Noriko Yoshikawa
  • SEMICONDUCTOR DEVICE AND COMMUNICATION CIRCUIT
    Publication number: 20170359097
    Abstract: A semiconductor device and a communication circuit capable of reducing the effect of a noise generated in an inductor are provided. A semiconductor device according to an embodiment includes a substrate, a first circuit disposed in a first area of the substrate, a second circuit disposed in a second area of the substrate, the second circuit being configured to operate selectively with the first circuit, a first inductor disposed in the second area and connected to the first circuit, and a second inductor disposed in the first area and connected to the second circuit.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 14, 2017
    Inventors: Shinichi UCHIDA, Takafumi KURAMOTO
  • SEMICONDUCTOR DEVICE, ELECTRICAL ENERGY MEASUREMENT INSTRUMENT, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    Publication number: 20170345755
    Abstract: According to one embodiment, a semiconductor device 1 includes an Si substrate 11, an inductor 12 formed in wiring layers disposed above the Si substrate 11, and a shield 13 formed so as to surround the inductor 12, in which the shield 13 includes metals 105 to 109 formed in, among the wiring layers, a layer in which the inductor 12 is formed and a layer above that layer, and a silicide 104 formed between the Si substrate 11 and the wiring layers above the Si substrate 11.
    Type: Application
    Filed: April 5, 2017
    Publication date: November 30, 2017
    Inventors: Shinichi UCHIDA, Keiichiro TANAKA, Takafumi KURAMOTO