Abstract: There are provided a test apparatus and a test method for testing a semiconductor integrated circuit which facilitate control of a BOST device and improve the versatility of the BOST device. There is provided an interface for exchanging signals between a BOST device and an external controller. A test control signal and a test result analysis signal are exchanged by means of the interface, thus effecting a test and analysis of the test.

Abstract: A tensioner device 14 for an engine 1 comprises a support member 16, a blade shoe 17 coming into sliding contact with a timing chain 11 having a base end section 17a held by a cylinder block 3 and a tip end section 17b supported by the support member 16, and a leaf spring 18 held by the blade shoe 1 for pressing the blade shoe 17 against the timing chain 11 elastically. The support member 16 is formed integrally with the cylinder block 3. The tip end section 17b comes into sliding contact with a guide surface 16a formed on the support member 16 to be supported.

Abstract: A collecting exhaust port 18 provided in a cylinder head 12 is comprised of exhaust port sections 46 extending from exhaust valve bores 35 in cylinders 14, and an exhaust collecting section 47 in which the exhaust port sections 46 are collected. The cylinder head 12 includes a protrusion 49 projecting in an arch shape outside a side wall 111 of a cylinder block 11. The exhaust collecting section 47 of the collecting exhaust port 18 directly faces an inner surface of a side wall 12 of the protrusion 49. Water jackets J2 and J3 for cooling the protrusion 49 are provided in upper and lower surfaces of the protrusion 49 having the collecting exhaust port 18 defined therein. The water jackets J2 and J3 are not provided between the side wall 121 of the protrusion 49 and the exhaust collecting section 47. Thus, the compact cylinder head 12 having the collecting exhaust port 18 integrally provided therein can be formed, while avoiding the complication of the structure of a core.

Abstract: The object of the present invention is to facilitate an appropriate oil supply to the tensioner without a complex apparatus. A valve chamber 3A is formed in a cylinder head 3 which is connected to a cylinder block 2. An opening 23—for discharging the oil in the valve chamber 3A into a chain case 6 which is placed on the side of the cylinder block 2—is formed on a chain case mounting surface 20. Inside the chain case 6 on the chain case mounting surface 20 of the cylinder block 2 are placed a timing chain 15 and a tensioner 30 for applying tension to the timing chain 15. An oil dropping rib 24 for guiding the oil discharged through the opening 23 to the tensioner 30 is provided on the chain case mounting surface 20.

Abstract: A printed circuit board comprises a base substrate including a conductive circuit pattern on a top surface thereof, and at least one photosensitive resin layer positioned on the base substrate. The resin layer exposure is performed through a photomask having light-shielding and exposure amount adjusting portions as part thereof to accommodate for varying resin layer thicknesses.

Abstract: A printing method for printing an ink layer on a can barrel. The method includes picking-up a bright ink containing at least one bright pigment having an average particle size of from 5 to 25 &mgr;m selected from the group consisting of aluminum flake and fine particulate coated pearl pigment from an engraving roller, feeding the picked-up ink to a printing plate directly or via a rubber roller, and applying the ink on the printing plate to a can barrel via a blanket wheel.

Abstract: The present invention provides a thermal stable low elastic modulus material, which has high thermal stability, is little in change in dynamic characteristics such as coefficient of thermal expansion and elastic modulus within a temperature of −50° C. to 300° C., has an elastic modulus at room temperature of 2-0.01 GPa and is high in reliability of electric insulation regardless of a temperature fluctuation, and provides a semiconductor device using the same.

Abstract: A test-assisting device (BOST device) is provided in the vicinity of a testing circuit board that transmits signals to and receive signals from a semiconductor integrated circuit to be tested, and the D/A converter circuit for testing, the A/D converter circuit for testing, the measured-data memory, and the analyzing portion of the test-assisting device are carried by separate circuit boards.

Abstract: The present invention provides a thermal stable low elastic modulus material, which has high thermal stability, is little in change in dynamic characteristics such as coefficient of thermal expansion and elastic modulus within a temperature of −50° C. to 300° C., has an elastic modulus at room temperature of 2-0.01 GPa and is high in reliability of electric insulation regardless of a temperature fluctuation, and provides a semiconductor device using the same.

Abstract: A collecting exhaust port 18 provided in a, cylinder head 12 is comprised of exhaust port sections 46 extending from exhaust valve bores 35 in cylinders 14, and an exhaust collecting section 47 in which the exhaust port sections 46 are collected. The cylinder head 12 includes a protrusion 49 projecting in an arch shape outside a side wall 111 of a cylinder block 11. The exhaust collecting section 47 of the collecting exhaust port 18 directly faces an inner surface of a side wall 121 of the protrusion 49. Water jackets J2 and J3 for cooling the protrusion 49 are provided in upper and lower surfaces of the protrusion 49 having the collecting exhaust port 18 defined therein. The water jackets J2 and J3 are not provided between the side wall 121 of the protrusion 49 and the exhaust collecting section 47. Thus, the compact cylinder head 12 having the collecting exhaust port 18 integrally provided therein can be formed, while avoiding the complication of the structure of a core.

Abstract: A memory tester including an algorithmic pattern generator (ALPG) for generating a test pattern as a digital signal based on vector data is provided with a digital-to-analog converter built in the memory tester or provided outside the memory tester. Thus, the function of a device under test (DUT) having the analog-to-digital converting function can be verified. In other words, an address signal included in the test pattern generated in the ALPG is used for generating an analog signal to be input to the DUT having the analog-to-digital converting function, not for address designation. A control unit compares an output digital signal generated in the DUT with the address signal generated in the ALPG as a test digital signal to detect the degree of agreement between these signals, thereby verifying the analog-to-digital converting function of the DUT.

Abstract: The object of the present invention is to facilitate an appropriate oil supply to the tensioner without a complex apparatus. A valve chamber 3A is formed in a cylinder head 3 which is connected to a cylinder block 2. An opening 23—for discharging the oil in the valve chamber 3A into a chain case 6 which is placed on the side of the cylinder block 2—is formed on a chain case mounting surface 20. Inside the chain case 6 on the chain case mounting surface 20 of the cylinder block 2 are placed a timing chain 15 and a tensioner 30 for applying tension to the timing chain 15. An oil dropping rib 24 for guiding the oil discharged through the opening 23 to the tensioner 30 is provided on the chain case mounting surface 20.

Abstract: According to the present invention, there is provided a low dielectric loss tangent resin composition containing a crosslinking component having a weight average molecular weight of not more than 1,000 and a plurality of styrene groups and represented by the formula [1], 1

Abstract: An external test ancillary device (BOST device) analyzes measured information output from a semiconductor integrated circuit and transmits a result of analysis to a semiconductor test apparatus. The external test ancillary device includes a DAC counter for generating input data; a digital-to-analog converter for converting the data output from the counter from a digital signal into an analog signal; an analog-to-digital converter which receives data output from the digital-to-analog converter by way of a loopback line and converts the data from an analog signal into a digital signal; a DSP analysis section for performing self-diagnostic operation on the basis of data output from the analog-to-digital converter; measured data memory, an address counter, and a data write control circuit.

Abstract: A BOST (built-off self-test) board has a connector, a substrate for use with a BOST board, and an external self-test circuit. The external self-test circuit has an ADC (analog-to-digital converter)/DAC (digital-to-analog converter) measurement section and a DSP (digital signal processor). In accordance with a control signal input by way of a specific terminal provided in a connector, the ADC/DAC measurement section transmits a predetermined test signal to the specific terminal provided in the connector. Further, in response to the test signal, the ADC/DAC measurement section receives a response signal input to the specific terminal provided in the connector. The DSP analysis section analyzes the response signal, thereby determining whether or not the response signal is an appropriate signal. Further, the DSP analysis section transmits, to the specific terminal provided in the connector, a test result signal indicating whether or not the response signal is appropriate.

Abstract: There are provided a test apparatus and a test method for testing a semiconductor integrated circuit which facilitate control of a BOST device and improve the versatility of the BOST device. There is provided an interface for exchanging signals between a BOST device and an external controller. A test control signal and a test result analysis signal are exchanged by means of the interface, thus effecting a test and analysis of the test.

Abstract: A semiconductor test apparatus includes an analog-to-digital converter for converting into a digital signal an analog output from a circuit under test; a test-apparatus-ADC-control-signal generation circuit for generating a control signal for the analog-to-digital converter in accordance with an activation signal entered from the outside; a measured data memory for storing, as measured data for each conversion, a signal output from the analog-to-digital converter; an address counter for generating an address signal for the measured data memory; a DAC counter for generating data to be input to the circuit under test; and a data write control circuit which produces, in response to a flag signal output from the analog-to-digital converter and representing that conversion is being performed, an update signal for the address counter, a memory write signal for the measured data memory, and an update signal for the DAC counter.

Abstract: There are provided a test apparatus and method for testing a semiconductor integrated circuit which enables improvements in the ease of operation and convenience of a BOST device and shortening of a test time. Numeric codes are assigned to tests. A test apparatus is equipped with memory and an analysis section. A test requirement table—in which hardware requirements required for conducting a test are set on a per-numeric-code basis—is stored in the memory. Test requirements corresponding to a numeric code are read from the memory, whereupon a test is performed. The analysis section analyzes a digital test output and sends the result of analysis to an external controller.

Abstract: An external test ancillary device (BOST device) analyzes measured information output from a semiconductor integrated circuit and transmits a result of analysis to a semiconductor test apparatus. The external test ancillary device includes a DAC counter for generating input data; a digital-to-analog converter for converting the data output from the counter from a digital signal into an analog signal; an analog-to-digital converter which receives data output from the digital-to-analog converter by way of a loopback line and converts the data from an analog signal into a digital signal; a DSP analysis section for performing self-diagnostic operation on the basis of data output from the analog-to-digital converter; measured data memory, an address counter, and a data write control circuit.

Abstract: A test ancillary device with data memory and an analysis section is disposed in the vicinity of a test circuit board. The data memory is divided into two memory sections such that, when digital test data are stored in one memory section, the digital test data that have already been stored in the other memory section are loaded for analysis purpose.