Patents by Inventor Shinji Yamada

Shinji Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050020781
    Abstract: There is provided a resin composition suitable for insulating materials for use in electronic parts for handling high frequency signals, low in dielectric constant and low in dielectric dissipation factor, capable of forming thin film by low temperature curing, excellent in the adhesiveness to conductive foil and excellent in flexibility; a cured product derived from the composition; and a film substrate and an electronic part using the composition.
    Type: Application
    Filed: February 26, 2004
    Publication date: January 27, 2005
    Inventors: Masatoshi Sugimasa, Akira Nagai, Shinji Yamada, Satoru Amou
  • Publication number: 20040212432
    Abstract: In a radio communication system wherein the detection of output level required for feedback control of output power is carried out by current detection, the stability of control loop and the response to change in request-to-send level are enhanced. An electronic component for high frequency power amplifier carries out the detection of output level, required for feedback control of the output power of a high frequency power amplification circuit, by current detection. The electronic component has an error amplifier. The error amplifier compares an output level detection signal with an output level instruction signal, and generates a signal for controlling the gain of the high frequency power amplification circuit according to the difference between them. For the error amplifier, a low-pass amplification circuit is used. The amplification circuit is provided with between its output terminal and its inverting input terminal with a phase compensation circuit.
    Type: Application
    Filed: March 29, 2004
    Publication date: October 28, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Kyoichi Takahashi, Shinji Yamada, Masashi Maruyama
  • Publication number: 20040180157
    Abstract: It is an object of the present invention to provide a method capable of massively producing a tubular material, without needing time-consuming procedures, which can be easily made into a thin film or laminate.
    Type: Application
    Filed: March 12, 2004
    Publication date: September 16, 2004
    Inventors: Takao Ishikawa, Shinji Yamada, Satoru Amou, Kishio Hidaka
  • Patent number: 6756441
    Abstract: According to the present invention, there is provided a low dielectric loss tangent resin composition containing a crosslinking component having a weight average molecular weight of not more than 1,000 and a plurality of styrene groups and represented by the formula [1], wherein R is a hydrocarbon skeleton which may have a substituent, R1 is hydrogen, methyl or ethyl, m is an integer of 1-4 and n is an integer of 2 or more, and further containing at least one member selected from a high polymer having a weight average molecular weight of not less than 5,000 and a filler, which resin composition can give a cured product having a good flexibility, high tensile strength and low dielectric constant and dielectric loss tangent.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: June 29, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Amou, Shinji Yamada, Takao Ishikawa, Takao Miwa
  • Patent number: 6714888
    Abstract: There is provided an apparatus and method of testing a semiconductor integrated circuit, which apparatus and method enable testing of various semiconductor integrated circuits having different characteristics, fulfillment of the function of generating DAC data, and adaptation of various analog characteristic tests. An input range of a BOST device is switchable in accordance with the level of a DAC of a DUT, so that the test apparatus can handle DUTs of different types having different analog output levels.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: March 30, 2004
    Assignees: Renesas Technology Corp., Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura
  • Publication number: 20040048965
    Abstract: According to the present invention, there is provided a low dielectric loss tangent resin composition containing a crosslinking component having a weight average molecular weight of not more than 1,000 and a plurality of styrene groups and represented by the formula [1], 1
    Type: Application
    Filed: August 28, 2003
    Publication date: March 11, 2004
    Inventors: Satoru Amou, Shinji Yamada, Takao Ishikawa, Takao Miwa
  • Publication number: 20040038021
    Abstract: A semiconductor device wherein a resin containing as a cross-linking component a compound having a plurality of styrene groups and represented by chemical formula [1] is used as an insulating material: 1
    Type: Application
    Filed: March 28, 2003
    Publication date: February 26, 2004
    Inventors: Akira Nagai, Satoru Amou, Shinji Yamada, Takao Ishikawa, Hiroshi Nakano
  • Publication number: 20040038611
    Abstract: A curing low dielectric loss tangent film using a low dielectric loss tangent composition containing a polyfunctional styrene compound having excellent dielectric characteristics, and a wiring film using the same as an insulating layer are provided.
    Type: Application
    Filed: March 12, 2003
    Publication date: February 26, 2004
    Inventors: Satoru Amou, Shinji Yamada, Takao Ishikawa, Akira Nagai, Masatoshi Sugimasa
  • Publication number: 20040039127
    Abstract: An electronic device for high frequency signals having a small dielectric loss and high efficiency is provided which has a low dielectric loss tangent resin composition for coping with high frequency signals as an insulating layer.
    Type: Application
    Filed: May 9, 2003
    Publication date: February 26, 2004
    Inventors: Satoru Amou, Akira Nagai, Shinji Yamada, Takao Ishikawa, Akio Takahashi
  • Patent number: 6690189
    Abstract: There are provided a test apparatus and method for testing a semiconductor integrated circuit which enables improvements in the ease of operation and convenience of a BOST device and shortening of a test time. Numeric codes are assigned to tests. A test apparatus is equipped with memory and an analysis section. A test requirement table—in which hardware requirements required for conducting a test are set on a per-numeric-code basis—is stored in the memory. Test requirements corresponding to a numeric code are read from the memory, whereupon a test is performed. The analysis section analyzes a digital test output and sends the result of analysis to an external controller.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: February 10, 2004
    Assignees: Renesas Technology Corp., Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura
  • Patent number: 6672296
    Abstract: A collecting exhaust port 18 provided in a cylinder head 12 is comprised of exhaust port sections 46 extending from exhaust valve bores 35 in cylinders 14, and an exhaust collecting section 47 in which the exhaust port sections 46 are collected. The cylinder head 12 includes a protrusion 49 projecting in an arch shape outside a side wall 111 of a cylinder block 11. The exhaust collecting section 47 of the collecting exhaust port 18 directly faces an inner surface of a side wall 12 of the protrusion 49. Water jackets J2 and J3 for cooling the protrusion 49 are provided in upper and lower surfaces of the protrusion 49 having the collecting exhaust port 18 defined therein. The water jackets J2 and J3 are not provided between the side wall 121 of the protrusion 49 and the exhaust collecting section 47. Thus, the compact cylinder head 12 having the collecting exhaust port 18 integrally provided therein can be formed, while avoiding the complication of the structure of a core.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: January 6, 2004
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yasutoshi Ito, Sadao Kojima, Teruo Kobayashi, Masakatsu Honda, Shinji Yamada, Masaki Kanehiro, Naohiro Isogai
  • Patent number: 6661248
    Abstract: A test-assisting device (BOST device) is provided in the vicinity of a testing circuit board that transmits signals to and receive signals from a semiconductor integrated circuit to be tested, and the D/A converter circuit for testing, the A/D converter circuit for testing, the measured-data memory, and the analyzing portion of the test-assisting device are carried by separate circuit boards.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: December 9, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura, Hisayoshi Hanai
  • Patent number: 6653855
    Abstract: A BOST (built-off self-test) board has a connector, a substrate for use with a BOST board, and an external self-test circuit. The external self-test circuit has an ADC (analog-to-digital converter)/DAC (digital-to-analog converter) measurement section and a DSP (digital signal processor). In accordance with a control signal input by way of a specific terminal provided in a connector, the ADC/DAC measurement section transmits a predetermined test signal to the specific terminal provided in the connector. Further, in response to the test signal, the ADC/DAC measurement section receives a response signal input to the specific terminal provided in the connector. The DSP analysis section analyzes the response signal, thereby determining whether or not the response signal is an appropriate signal. Further, the DSP analysis section transmits, to the specific terminal provided in the connector, a test result signal indicating whether or not the response signal is appropriate.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: November 25, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura
  • Patent number: 6651023
    Abstract: A semiconductor test apparatus includes an analog-to-digital converter for converting into a digital signal an analog output from a circuit under test; a test-apparatus-ADC-control-signal generation circuit for generating a control signal for the analog-to-digital converter in accordance with an activation signal entered from the outside; a measured data memory for storing, as measured data for each conversion, a signal output from the analog-to-digital converter; an address counter for generating an address signal for the measured data memory; a DAC counter for generating data to be input to the circuit under test; and a data write control circuit which produces, in response to a flag signal output from the analog-to-digital converter and representing that conversion is being performed, an update signal for the address counter, a memory write signal for the measured data memory, and an update signal for the DAC counter.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: November 18, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura
  • Patent number: 6642736
    Abstract: To provide a tester for semiconductor integrated circuits that can test an A/D converter circuit and a D/A converter circuit in a mixed signal type semiconductor integrated circuit comprising an A/D converter circuit and a D/A converter circuit at high accuracy and at high speed. A test assisting device is provided in the vicinity of a testing circuit board on which a semiconductor integrated circuit to be tested is mounted. The test assisting device comprises a data circuit to supply analog test signals to the A/D converter circuit of the semiconductor integrated circuit to be tested, and digital test signals to the D/A converter circuit thereof, a measured data memory to store test outputs from the semiconductor integrated circuit to be tested, and an analyzer portion to analyze data stored in the measured data memory.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: November 4, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura
  • Patent number: 6638631
    Abstract: The present invention provides a thermal stable low elastic modulus material, which has high thermal stability, is little in change in dynamic characteristics such as coefficient of thermal expansion and elastic modulus within a temperature of −50° C. to 300° C., has an elastic modulus at room temperature of 2-0.01 GPa and is high in reliability of electric insulation regardless of a temperature fluctuation, and provides a semiconductor device using the same. The present invention also provides a thermal stable low elastic modulus resin composition obtained by heat-curing a mixture containing a polyimide, polyamide-imide or polyamide resin or resin precursor, whose cured product has an elastic modulus measured at −50° C. of 2-0.01 GPa, and an oligomer of an organosilicon compound having a functional group capable of causing addition reaction with an NH and/or COOH group.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: October 28, 2003
    Assignee: Hitachi, ltd.
    Inventors: Yuichi Satsu, Morimichi Umino, Takumi Ueno, Akio Takahashi, Akira Nagai, Toshiya Satoh, Shinji Yamada, Kazuhiro Suzuki
  • Patent number: 6638352
    Abstract: The present invention provides a thermal stable low elastic modulus material, which has high thermal stability, is little in change in dynamic characteristics such as coefficient of thermal expansion and elastic modulus within a temperature of −50° C. to 300° C., has an elastic modulus at room temperature of 2-0.01 GPa and is high in reliability of electric insulation regardless of a temperature fluctuation, and provides a semiconductor device using the same. The present invention also provides a thermal stable low elastic modulus resin composition obtained by heat-curing a mixture containing a polyimide, polyamide-imide or polyamide resin or resin precursor, whose cured product has an elastic modulus measured at −50° C. of 2-0.01 GPa, and an oligomer of an organosilicon compound having a functional group capable of causing addition reaction with an NH and/or COOH group.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: October 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yuichi Satsu, Morimichi Umino, Takumi Ueno, Akio Takahashi, Akira Nagai, Toshiya Satoh, Shinji Yamada, Kazuhiro Suzuki
  • Patent number: 6634004
    Abstract: In a threshold analysis method obtaining threshold voltages of all bits in a flash memory through single processing, fail bit map information is examined in order from a smaller voltage applied to the flash memory. As to a bit exhibiting a value, read from the flash memory, first mismatching a determination value, the threshold voltage is settled on the basis of a voltage applied when the bit fails in reading.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: October 14, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Shinji Yamada, Hisaya Mori, Teruhiko Funakura
  • Patent number: 6628137
    Abstract: There are provided a test apparatus and a test method for testing a semiconductor integrated circuit which facilitate control of a BOST device and improve the versatility of the BOST device. There is provided an interface for exchanging signals between a BOST device and an external controller. A test control signal and a test result analysis signal are exchanged by means of the interface, thus effecting a test and analysis of the test.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 30, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hisaya Mori, Shinji Yamada, Teruhiko Funakura
  • Patent number: 6620067
    Abstract: A tensioner device 14 for an engine 1 comprises a support member 16, a blade shoe 17 coming into sliding contact with a timing chain 11 having a base end section 17a held by a cylinder block 3 and a tip end section 17b supported by the support member 16, and a leaf spring 18 held by the blade shoe 1 for pressing the blade shoe 17 against the timing chain 11 elastically. The support member 16 is formed integrally with the cylinder block 3. The tip end section 17b comes into sliding contact with a guide surface 16a formed on the support member 16 to be supported.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: September 16, 2003
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kensuke Nakamura, Sadao Kojima, Atsushi Tanaka, Shinji Yamada, Hajime Maeda, Hidehiko Kamiyama