Patents by Inventor Shinya Morita

Shinya Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8282737
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: October 9, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Patent number: 8264291
    Abstract: Disclosed herein is a resonator including, a vibrating portion having a conductor portion, and three or more insulating portions provided so as to electrically separate the conductor portion into a plurality of blocks, wherein when a potential difference is caused across both ends in each of the three or more insulating portions, the vibrating portion carries out a resonance vibration based on a longitudinal vibration in accordance with a frequency of an A.C. signal inputted to each of corresponding ones of the plurality of blocks in the conductor portion.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 11, 2012
    Assignee: Sony Corporation
    Inventor: Shinya Morita
  • Publication number: 20120006268
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Patent number: 8076615
    Abstract: A substrate processing apparatus comprises: an outer tube; a manifold connected to the outer tube and made of a non-metal material; an inner tube disposed in the manifold at a more inner side than the outer tube and configured to process a substrate therein; a heating device installed at a more outer side than the outer tube and configured to heat the inside of the outer tube; a lid configured to open and close an opening of the manifold, with a seal member intervened therebetween; and a heat absorption member installed in the manifold, with a bottom end of the inner tube intervened therebetween, and configured to absorb heat from the heating device, the heat absorption member being made of a non-metal material.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: December 13, 2011
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Shinya Morita, Koichi Sada, Takayuki Nakada, Tomoyuki Matsuda
  • Patent number: 8057599
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: November 15, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Patent number: 8043431
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: October 25, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Publication number: 20110121297
    Abstract: Provided is a direct contact technology by which a barrier metal layer between a Cu alloy wiring composed of pure Cu or a Cu alloy and a semiconductor layer can be eliminated, and the Cu alloy wiring can be directly and surely connected to the semiconductor layer within a wide process margin. The wiring structure is provided with the semiconductor layer and the Cu alloy film composed of pure Cu or the Cu alloy on a substrate in this order from the substrate side. A laminated structure is included between the semiconductor layer and the Cu alloy film. The laminated structure is composed of an (N, C, F) layer, which contains at least one element selected from among a group composed of nitrogen, carbon and fluorine, and a Cu—Si diffusion layer, which contains Cu and Si, in this order from the substrate side. Furthermore, at least the one element selected from among the group composed of nitrogen, carbon and fluorine is bonded to Si contained in the semiconductor layer.
    Type: Application
    Filed: July 3, 2009
    Publication date: May 26, 2011
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Nobuyuki Kawakami, Shinya Fukuma, Aya Miki, Mototaka Ochi, Shinya Morita, Yoshihiro Yokota, Hiroshi Goto
  • Patent number: 7893783
    Abstract: Disclosed is a resonator including a plurality of resonator elements each including at least oscillation parts and lower electrodes with an intervening space therebetween, in which the plurality of resonator elements are disposed in a closed system and the oscillation parts of the plurality of resonator elements are continuously formed in an integrated manner.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: February 22, 2011
    Assignee: Sony Corporation
    Inventors: Shinya Morita, Akira Akiba
  • Patent number: 7889017
    Abstract: A resonator containing a plurality of resonator elements, respectively having an electrode and an oscillating component opposed while having a space in between, arranged so as to form a closed system. The oscillating component of the plurality of resonator elements is continuously formed in an integrated manner.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: February 15, 2011
    Assignee: Sony Corporation
    Inventors: Shinya Morita, Akira Akiba
  • Publication number: 20110032685
    Abstract: An interposer with which the manufacturing steps are able to be simplified and which shows superior high frequency characteristics is provided. The interposer includes: a substrate having a front face and a rear face; a wiring that is formed on the front face side of the substrate and is electrically connected to a semiconductor chip; an electric device connected to the wiring; and a concave section that is formed from the rear face side of the substrate in a position corresponding to the electric device.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 10, 2011
    Applicant: SONY CORPORATION
    Inventors: Akira Akiba, Shun Mitarai, Koichi Ikeda, Shinya Morita
  • Publication number: 20110024761
    Abstract: Provided is a direct contact technology by which a barrier metal layer between an Al alloy interconnection composed of pure Al or an Al alloy and a semiconductor layer can be eliminated and the Al alloy interconnection can be directly and surely connected to the semiconductor layer within a wide process margin. In an interconnection structure, the semiconductor layer, and the Al alloy film composed of the pure Al or the Al alloy are provided on the substrate in this order from the substrate side. A multilayer structure of an (N, C, F) layer containing at least one type of an element selected from among a group composed of nitrogen, carbon and fluorine, and an Al—Si diffusion layer containing Al and Si is included in this order from the substrate side, between the semiconductor layer and the Al alloy film. At least the one type of the element, i.e., nitrogen, carbon or fluorine contained in the (N, C, F) layer is bonded with Si contained in the semiconductor layer.
    Type: Application
    Filed: April 17, 2009
    Publication date: February 3, 2011
    Applicant: Kabushiki Kaisha Kobe Seiko Shoo (Kobe Steel, Ltd. )
    Inventors: Nobuyuki Kawakami, Mototaka Ochi, Aya Miki, Shinya Morita, Yoshihiro Yokota, Shinya Fukuma, Hiroshi Goto
  • Publication number: 20100321125
    Abstract: Disclosed herein is a resonator including, a vibrating portion having a conductor portion, and three or more insulating portions provided so as to electrically separate the conductor portion into a plurality of blocks, wherein when a potential difference is caused across both ends in each of the three or more insulating portions, the vibrating portion carries out a resonance vibration based on a longitudinal vibration in accordance with a frequency of an A.C. signal inputted to each of corresponding ones of the plurality of blocks in the conductor portion.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 23, 2010
    Applicant: SONY CORPORATION
    Inventor: Shinya Morita
  • Patent number: 7795157
    Abstract: An object of the invention is to provide a substrate treatment device that can lengthen the maintenance cycle, and prevent any by-product from falling on substrates even if it is accumulated, and a manufacturing method of such a substrate treatment device, and an embodiment of the invention is directed, comprising: a treatment chamber that subjects a substrate to a treatment while keeping hold of it by a substrate retention member; a reaction tube that configures the treatment chamber; a heating device that is disposed around the reaction tube for heating the treatment chamber; and an exhaust tube that is linked to the reaction tube on an upper side than the substrate inside of the treatment chamber and is extended downward from the heating device, and exhausts a gas inside of the reaction tube in which an extension portion as a result of the extension is disposed away from the reaction tube.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: September 14, 2010
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Masato Terasaki, Shinya Morita, Manabu Izumi
  • Patent number: 7685733
    Abstract: There is disclosed a micro surface shape measurement probe including a probe shaft 4 having at a distant end thereof a probe member 2 for contacting an object 1 to be measured, a probe body 21 provided with support means for movably supporting the probe shaft 4 in a non-contact manner, a pressing device for pressing and moving the probe shaft 4 toward the object 1 to be measured, a piezoelectric sensor 8a incorporated in the probe body 21 so that a reactive force acts to a pressing force applied to the probe shaft by the pressing device, a load detecting device 8b to measure a load acting on the piezoelectric sensor, a control device 9 for adjusting the pressing force applied by the pressing device based on the load detected by the load detecting device, and a displacement amount measuring device for measuring a position of the probe member 2 in contact with the object 1 to be measured by the pressing force adjusted by the control device 9.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: March 30, 2010
    Assignee: Riken
    Inventors: Hitoshi Ohmori, Yutaka Watanabe, Shinya Morita, Yoshihiro Uehara, Weimin Lin, Kazutoshi Katahira
  • Publication number: 20100050945
    Abstract: When a quartz part is placed on a floor, the inside of a furnace is not polluted by contaminants attached from the floor to a seal surface of the quartz part and entering the inside of the furnace. A substrate processing apparatus includes a reaction tube, a first joining surface, a second joining surface, and a third joining surface. The reaction tube includes a quartz inner tube and a quartz outer tube. The first joining surface is configured to air-tightly join the outer tube and a quartz manifold. The second joining surface is configured to air-tightly join the manifold and a quartz seal cover. The third joining surface is configured to air-tightly join the seal cover and a seal cap. An O-ring is installed at least one of the first, second, and third joining surfaces, and a protrusion is installed outside the O-ring installed at the jointing surface.
    Type: Application
    Filed: August 6, 2009
    Publication date: March 4, 2010
    Inventors: Shinya MORITA, Takayuki NAKADA, Tomoyuki MATSUDA, Keisuke SAKASHITA
  • Publication number: 20100055918
    Abstract: Metal corrosion and substrate contamination can be suppressed, and process quality and yield can be improved. A substrate processing apparatus comprises: a process chamber; a substrate holder; a cover part closing and opening the process chamber; a substrate holder stage; a rotary mechanism rotating the substrate holder stage; a rotation shaft inserted through the cover part and connected to the substrate holder stage and the rotary mechanism so that a first gas ejection port is formed therebetween; a first gas stagnant part surrounded by the rotary mechanism, the cover part, and the rotation shaft; a second gas ejection port formed at the substrate holder stage; a second gas stagnant part formed at the rotation shaft and communicating with the process chamber via the second gas ejection port; and a flow port formed at the rotation shaft for connecting the first and second gas stagnant parts.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 4, 2010
    Inventors: Takayuki Nakada, Tomoyuki Matsuda, Shinya Morita
  • Publication number: 20100051597
    Abstract: A substrate processing apparatus comprises: an outer tube; a manifold connected to the outer tube and made of a non-metal material; an inner tube disposed in the manifold at a more inner side than the outer tube and configured to process a substrate therein; a heating device installed at a more outer side than the outer tube and configured to heat the inside of the outer tube; a lid configured to open and close an opening of the manifold, with a seal member intervened therebetween; and a heat absorption member installed in the manifold, with a bottom end of the inner tube intervened therebetween, and configured to absorb heat from the heating device, the heat absorption member being made of a non-metal material.
    Type: Application
    Filed: August 26, 2009
    Publication date: March 4, 2010
    Inventors: Shinya Morita, Koichi Sada, Takayuki Nakada, Tomoyuki Matsuda
  • Publication number: 20090197409
    Abstract: Provided is a substrate processing apparatus. The substrate processing apparatus comprises a reaction tube; a heating device configured to heat the reaction tube; and a manifold installed outward as compared with the heating device and made of a nonmetallic material. A first thickness of the manifold defined in a direction perpendicular to a center axis of the reaction tube is greater than a second thickness of the manifold defined at a position adjacent to the reaction tube in a direction parallel to the center axis of the reaction tube. The manifold comprises a protrusion part of which at least a portion protrudes inward more than an inner wall of the reaction tube, and a gas supply unit disposed at at least the protrusion part for supplying gas to an inside of the reaction tube.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 6, 2009
    Inventors: Shinya MORITA, Akihiro SATO, Akinori TANAKA, Shigeo NAKADA, Takayuki NAKADA, Shuhei SAIDO, Tomoyuki MATSUDA
  • Publication number: 20090188431
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Application
    Filed: March 9, 2009
    Publication date: July 30, 2009
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Patent number: 7566956
    Abstract: The present invention provides a semiconductor composite device including a semiconductor device formed on or in a substrate, an insulating film formed on the substrate so as to cover the semiconductor device, a micro electro mechanical portion formed on the insulating film, and a wiring layer connected to the semiconductor device and the micro electro mechanical portion.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: July 28, 2009
    Assignee: Sony Corporation
    Inventors: Shun Mitarai, Koichi Ikeda, Masahiro Tada, Akira Akiba, Shinya Morita