Patents by Inventor Shosuke Fujii

Shosuke Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130329485
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections.
    Type: Application
    Filed: August 14, 2013
    Publication date: December 12, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira TAKASHIMA, Hidenori Miyagawa, Shosuke Fujii, Daisuke Matsushita
  • Publication number: 20130306932
    Abstract: According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode, a semiconductor layer and a first layer. The first electrode includes at least one of Ag, Ni, Co, Al, Zn, Ti, and Cu. The semiconductor layer is sandwiched between the first and second electrodes. The first layer is provided between the second electrode and the semiconductor layer and contains an element included in the semiconductor layer and at least one of Ag, Ni, and Co.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 21, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shosuke FUJII, Hidenori MIYAGAWA, Takashi YAMAUCHI
  • Patent number: 8569823
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: October 29, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsunehiro Ino, Masao Shingu, Shosuke Fujii, Akira Takashima, Daisuke Matsushita, Jun Fujiki, Naoki Yasuda, Yasushi Nakasaki, Koichi Muraoka
  • Publication number: 20130240825
    Abstract: According to one embodiment, a first electrode, a second electrode, and a variable resistance layer are provided. The variable resistance layer is arranged between the first electrode and the second electrode and contains a polycrystalline semiconductor as a main component.
    Type: Application
    Filed: February 28, 2011
    Publication date: September 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shosuke Fujii, Daisuke Matsushita, Tomoya Kawai
  • Publication number: 20130234097
    Abstract: According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode, a first layer and a second layer. The second electrode contains at least one metal element selected from Ag, Cu, Ni, Co, Al, and Ti. The first layer is arranged between the first electrode and the second electrode. The second layer is arranged between the first electrode and the first layer. A diffusion coefficient of the metal element in the second layer is larger than a diffusion coefficient of the metal element in the first layer.
    Type: Application
    Filed: September 5, 2012
    Publication date: September 12, 2013
    Inventors: Shosuke FUJII, Hidenori Miyagawa, Reika Ichihara
  • Publication number: 20130228736
    Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode, and a variable resistance film. The variable resistance film is connected between the first electrode and the second electrode. The first electrode includes a metal contained in a matrix made of a conductive material. A cohesive energy of the metal is lower than a cohesive energy of the conductive material. A concentration of the metal at a central portion of the first electrode in a width direction thereof is higher than concentrations of the metal in two end portions of the first electrode in the width direction.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 5, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Daisuke MATSUSHITA, Shosuke Fujii, Yoshifumi Nishi, Akira Takashima, Takayuki Ishikawa, Hidenori Miyagawa, Takashi Haimoto, Yusuke Arayashiki, Hideki Inokuma
  • Publication number: 20130175490
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a fin-type stacked layer structure having memory cells, and a beam connected to an end portion of the structure. Each of the structure and the beam includes semiconductor layers stacked in a perpendicular direction. The beam includes a contact portion provided at one end of the beam, and a low resistance portion provided between the contact portion and the end portion of the structure.
    Type: Application
    Filed: July 12, 2012
    Publication date: July 11, 2013
    Inventors: Haruka KUSAI, Kiwamu Sakuma, Shosuke Fujii, Masumi Saitoh, Masahiro Kiyotoshi
  • Publication number: 20130134372
    Abstract: According to one embodiment, a semiconductor device includes first to n-th semiconductor layers (n is a natural number equal to or more than 2) being stacked in order from a surface of an insulating layer in a first direction perpendicular to the surface of the insulating layer, the first to n-th semiconductor layers extending in a second direction parallel to the surface of the insulating layer, the first to n-th semiconductor layers being insulated from each other, a common electrode connected to the first to n-th semiconductor layers in a first end of the second direction thereof, and a layer select transistor which uses the first to n-th semiconductor layers as channels and which selects one of the first to n-th semiconductor layers.
    Type: Application
    Filed: November 29, 2012
    Publication date: May 30, 2013
    Inventors: Kiwamu SAKUMA, Haruka KUSAI, Shosuke FUJII, Li ZHANG, Masahiro KIYOTOSHI, Masao SHINGU
  • Patent number: 8450709
    Abstract: According to one embodiment a first variable resistance layer which is arranged between a second electrode and a first electrode and in which a first conductive filament is capable of growing based on metal supplied from the second electrode, and an n-th variable resistance layer which is arranged between an n-th electrode and an (n+1)-th electrode and in which an n-th conductive filament whose growth rate is different from the first conductive filament is capable of growing based on metal supplied from the (n+1)-th electrode are included, a configuration in which a plurality of conductive filaments is electrically connected in series between the first electrode layer and the (n+1)-th electrode layer is included, and a resistance is changed in a stepwise manner.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: May 28, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruka Kusai, Shosuke Fujii, Yasushi Nakasaki
  • Publication number: 20130015519
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes first to n-th semiconductor layers which are stacked in a first direction perpendicular to a surface of a semiconductor substrate and which extend in a second direction parallel to the surface of the semiconductor substrate, an electrode which extends in the first direction along side surfaces of the first to n-th semiconductor layers, the side surfaces of the first to n-th semiconductor layers exposing in a third direction perpendicular to the first and second directions, and first to n-th charge storage layers located between the first to n-th semiconductor layers and the electrode respectively. The first to n-th charge storage layers are separated from each other in areas between the first to n-th semiconductor layers.
    Type: Application
    Filed: September 19, 2012
    Publication date: January 17, 2013
    Inventors: Shosuke Fujii, Kiwamu Sakuma, Jun Fujiki, Atsuhiro Kinoshita
  • Publication number: 20120319074
    Abstract: According to one embodiment, a resistance change device includes a first electrode including a metal, a second electrode, and an amorphous oxide layer including Si and O between the first and second electrode, the layer having a concentration gradient of O and a first peak thereof in a direction from the first electrode to the second electrode.
    Type: Application
    Filed: August 29, 2012
    Publication date: December 20, 2012
    Inventors: Shosuke FUJII, Daisuke Matsushita, Yuichiro Mitani
  • Publication number: 20120292586
    Abstract: According to one embodiment, there are provided a first electrode, a second electrode containing a 1B group element having an Al element added thereto, and a variable resistive layer disposed between the first electrode and the second electrode and having a silicon element.
    Type: Application
    Filed: January 27, 2012
    Publication date: November 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi Yamauchi, Shosuke Fujii, Reika Ichihara
  • Publication number: 20120261742
    Abstract: A nonvolatile semiconductor memory apparatus according to an embodiment includes: a semiconductor layer; a first insulating film formed on the semiconductor layer, the first insulating film being a single-layer film containing silicon oxide or silicon oxynitride; a charge trapping film formed on the first insulating film; a second insulating film formed on the charge trapping film; and a control gate electrode formed on the second insulating film. A metal oxide exists in an interface between the first insulating film and the charge trapping film, the metal oxide comprises material which is selected from the group of Al2O3, HfO2, ZrO2, TiO2, and MgO, the material is stoichiometric composition, and the charge trapping film includes material different from the material of the metal oxide.
    Type: Application
    Filed: April 26, 2012
    Publication date: October 18, 2012
    Inventors: Izumi Hirano, Shosuke Fujii, Yuichiro Mitani, Naoki Yasuda
  • Patent number: 8278644
    Abstract: A switching device includes: a first layer including a carbon material having a six-member ring network structure; a first electrode electrically connected to a first portion of the first layer; a second electrode electrically connected to a second portion of the first layer and provided apart from the first electrode; a third electrode including a fourth portion provided opposing a third portion between the first portion and the second portion of the first layer; and a second layer provided between the third portion of the first layer and the fourth portion of the third electrode. The second layer includes: a base portion; and a functional group portion. The functional group portion is provided between the base portion and the first layer. The functional group portion is bonded to the base portion. A ratio of sp2-bonded carbon and sp3-bonded carbon of the first layer is changeable by a voltage applied between the first layer and the third electrode.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: October 2, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shosuke Fujii, Koichi Muraoka
  • Publication number: 20120205608
    Abstract: According to one embodiment, a nonvolatile variable resistance device includes a first electrode, a second electrode, a first layer, and a second layer. The second electrode includes a metal element. The first layer is arranged between the first electrode and the second electrode and includes a semiconductor element. The second layer is inserted between the second electrode and the first layer and includes the semiconductor element. The percentage of the semiconductor element being unterminated is higher in the second layer than in the first layer.
    Type: Application
    Filed: September 15, 2011
    Publication date: August 16, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi YAMAUCHI, Shosuke Fujii, Reika Ichihara
  • Publication number: 20120091420
    Abstract: According to one embodiment a first variable resistance layer which is arranged between a second electrode and a first electrode and in which a first conductive filament is capable of growing based on metal supplied from the second electrode, and an n-th variable resistance layer which is arranged between an n-th electrode and an (n+1)-th electrode and in which an n-th conductive filament whose growth rate is different from the first conductive filament is capable of growing based on metal supplied from the (n+1)-th electrode are included, a configuration in which a plurality of conductive filaments is electrically connected in series between the first electrode layer and the (n+1)-th electrode layer is included, and a resistance is changed in a stepwise manner.
    Type: Application
    Filed: March 21, 2011
    Publication date: April 19, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Haruka KUSAI, Shosuke Fujii, Yasushi Nakasaki
  • Publication number: 20120068250
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.
    Type: Application
    Filed: September 19, 2011
    Publication date: March 22, 2012
    Inventors: Tsunehiro Ino, Masao Shingu, Shosuke Fujii, Akira Takashima, Daisuke Matsushita, Jun Fujiki, Naoki Yasuda, Yasushi Nakasaki, Koichi Muraoka
  • Publication number: 20110240949
    Abstract: According to one embodiment, an information recording device includes first and second electrodes, a variable resistance layer between the first and second electrodes, and a control circuit which controls the variable resistance layer to n (n is a natural number except 1) kinds of resistance. The variable resistance layer comprises a material filled between the first and second electrodes, and particles arranged in a first direction from the first electrode to the second electrode in the material, and each of the particles has a resistance lower than that of the material. A resistance of the variable resistance layer is decided by a short between the first electrode and at least one of the particles.
    Type: Application
    Filed: March 18, 2011
    Publication date: October 6, 2011
    Inventors: Yuichiro MITANI, Daisuke Matsushita, Shosuke Fujii
  • Patent number: 7956405
    Abstract: A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on the charge storage film; a gate electrode provided on the block insulating film; and a region containing a gas molecule, the region provided in a neighborhood of an interface between the charge storage film and the block insulating film.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: June 7, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsunehiro Ino, Shosuke Fujii, Jun Fujiki, Akira Takashima, Masao Shingu, Daisuke Matsushita, Naoki Yasuda, Koichi Muraoka
  • Publication number: 20100213435
    Abstract: A switching device includes: a first layer including a carbon material having a six-member ring network structure; a first electrode electrically connected to a first portion of the first layer; a second electrode electrically connected to a second portion of the first layer and provided apart from the first electrode; a third electrode including a fourth portion provided opposing a third portion between the first portion and the second portion of the first layer; and a second layer provided between the third portion of the first layer and the fourth portion of the third electrode. The second layer includes: a base portion; and a functional group portion. The functional group portion is provided between the base portion and the first layer. The functional group portion is bonded to the base portion. A ratio of sp2-bonded carbon and sp3-bonded carbon of the first layer is changeable by a voltage applied between the first layer and the third electrode.
    Type: Application
    Filed: February 23, 2010
    Publication date: August 26, 2010
    Inventors: Shosuke Fujii, Koichi Muraoka