Patents by Inventor Shriram Shivaraman

Shriram Shivaraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190198675
    Abstract: Embodiments of the present disclosure describe a non-planar gate thin film transistor. An integrated circuit may include a plurality of layers formed on a substrate, and the plurality of layers may include a first one of a source or drain, an inter-layer dielectric (ILD) formed on the first one of the source or drain, and a second one of the source or drain formed on the ILD. A semiconductive layer may be formed on a sidewall of the plurality of layers. A gate dielectric layer formed on the semiconductive layer, and a gate may be in contact with the gate dielectric layer.
    Type: Application
    Filed: September 27, 2016
    Publication date: June 27, 2019
    Inventors: ABHISHEK A. SHARMA, VAN H. LE, GILBERT DEWEY, RAFAEL RIOS, JACK T. KAVALIEROS, YIH WANG, SHRIRAM SHIVARAMAN
  • Publication number: 20190172921
    Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing a high mobility low contact resistance semiconducting oxide in metal contact vias for thin film transistors.
    Type: Application
    Filed: September 30, 2016
    Publication date: June 6, 2019
    Inventors: Gilbert DEWEY, Van H. LE, Rafael RIOS, Jack T. KAVALIEROS, Shriram SHIVARAMAN
  • Publication number: 20190058043
    Abstract: Disclosed herein are transistor gate-channel arrangements, and related methods and devices. For example, in some embodiments, a transistor gate-channel arrangement may include a channel material and a transistor gate stack. The transistor gate stack may include a gate electrode material, a high-k dielectric disposed between the gate electrode material and the channel material, and indium gallium zinc oxide (IGZO) disposed between the high-k dielectric material and the channel material.
    Type: Application
    Filed: March 30, 2016
    Publication date: February 21, 2019
    Applicant: Intel Corporation
    Inventors: Gilbert W. Dewey, Rafael Rios, Shriram Shivaraman, Marko Radosavljevic, Kent E. Millard, Marc C. French, Van H. Le