Patents by Inventor Shu Wu

Shu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FINFET DEVICE AND METHOD
    Publication number: 20210111272
    Abstract: A method includes forming a fin on a substrate, forming an insulating material over the fin, recessing the insulating material to form an isolation region surrounding the fin, wherein an upper portion of the fin protrudes above the isolation region, performing a trimming process to reduce a width of the upper portion of the fin, and forming a gate structure extending over the isolation region and the upper portion of the fin.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 15, 2021
    Inventors: Chung-Shu Wu, Ying-Ya Hsu, Ching-Yu Pan, Hsiu-Hao Tsao, An Chyi Wei, Yuan-Hung Chiu
  • ANTI-CD47 ANTIBODIES THAT DO NOT CAUSE SIGNIFICANT RED BLOOD CELL AGLLUTINATION
    Publication number: 20210070855
    Abstract: Provided are antibodies including monoclonal, human, primate, rodent, mammalian, chimeric, humanized and CDR-grafted antibodies, and antigen binding fragments and antigen binding derivatives thereof. These antibodies bind to CD47 protein, particularly human CD47, modulate, e.g., inhibit, block, antagonize, neutralize or otherwise interfere with CD47 expression, activity and/or signaling, including inhibiting CD47 and SIRPa interaction; do not cause a significant level of hemagglutination of human red blood cells. These antibodies may not enhance RBC phagocytosis.
    Type: Application
    Filed: January 24, 2019
    Publication date: March 11, 2021
    Inventors: Tao Zhao, Huihui Zhang, Shuai Yang, Yun Zhang, Chuan-Chu Chou, Shu Wu
  • SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
    Publication number: 20210066274
    Abstract: A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes a semiconductor structure and an input/output pad. The semiconductor structure includes a first substrate and a conductive layer, in which the first substrate has a first surface and a second surface opposite to each other, the conductive layer is disposed on the first surface of the first substrate, and the conductive layer includes one or more first trace. The first semiconductor structure has a recess penetrating the first substrate and exposing the one or more first trace, and the input/output pad is disposed on the one or more first trace and in the recess.
    Type: Application
    Filed: October 8, 2019
    Publication date: March 4, 2021
    Inventors: He Chen, Zi Qun Hua, Shu Wu, Yong Qing Wang, Liang Xiao
  • SINGLE-DOMAIN ANTIBODIES AND VARIANTS THEREOF AGAINST TIGIT
    Publication number: 20210054071
    Abstract: Provided are constructs comprising a single-domain antibody (sdAb) moiety that specifically recognizes TIGIT. Also provided are methods of making and using these constructs.
    Type: Application
    Filed: December 28, 2018
    Publication date: February 25, 2021
    Inventors: Wang ZHANG, Shu WU, Shuai YANG, Qi PAN, Chuan-Chu CHOU
  • SINGLE-DOMAIN ANTIBODIES AGAINST LAG-3 AND USES THEREOF
    Publication number: 20210017279
    Abstract: The present application provides anti-LAG-3 constructs comprising a single-domain antibody (sdAb) that specifically recognizes LAG-3. Also provided are methods of making and using these constructs.
    Type: Application
    Filed: March 29, 2019
    Publication date: January 21, 2021
    Inventors: Wang Zhang, Shuai YANG, Shu WU, Chuan-Chu CHOU
  • Method of forming semiconductor device and semiconductor device
    Patent number: 10879074
    Abstract: A method of forming a semiconductor device includes removing a top portion of a dielectric layer surrounding a metal gate to form a recess in the dielectric layer; filling the recess with a capping structure; forming a patterned hard mask over the capping structure and over the metal gate, wherein a portion of the metal gate, a portion of the capping structure, and a portion of the dielectric layer are aligned vertically with an opening of the patterned hard mask; and performing an etch process on said portions of the metal gate, the capping structure, and the dielectric layer that are aligned vertically with the opening of the patterned hard mask, wherein the capping structure has an etch resistance higher than an etch resistance of the dielectric layer during the etch process.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Uei Jang, Chien-Hua Tseng, Chung-Shu Wu, Ya-Yi Tsai, Ryan Chia-Jen Chen, An-Chyi Wei
  • FinFET device and method
    Patent number: 10861960
    Abstract: A method includes forming a fin on a substrate, forming an insulating material over the fin, recessing the insulating material to form an isolation region surrounding the fin, wherein an upper portion of the fin protrudes above the isolation region, performing a trimming process to reduce a width of the upper portion of the fin, and forming a gate structure extending over the isolation region and the upper portion of the fin.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Shu Wu, Ying-Ya Hsu, Ching-Yu Pan, Hsiu-Hao Tsao, An Chyi Wei, Yuan-Hung Chiu
  • MULTISPECIFIC ANTIGEN BINDING PROTEINS AND METHODS OF USE THEREOF
    Publication number: 20200369770
    Abstract: Provided are multispecific, such as trispecific, antigen binding proteins comprising a first antigen binding domain comprising a heavy chain variable domain and a light chain variable domain, a second antigen binding domain comprising a first single-domain antibody, and a third antigen binding domain comprising a second single-domain antibody. Pharmaceutical compositions comprising the multispecific antigen binding proteins, kits and methods of use thereof are further provided.
    Type: Application
    Filed: January 8, 2019
    Publication date: November 26, 2020
    Inventors: Yafeng ZHANG, Chuan-Chu CHOU, Qi PAN, Shu WU, Shuai YANG
  • SINGLE-DOMAIN ANTIBODIES AND VARIANTS THEREOF AGAINST PD-1
    Publication number: 20200347135
    Abstract: Provided are constructs comprising a single-domain antibody (sdAb) moiety that specifically recognizes PD-1. Also provided are methods of making and using these constructs.
    Type: Application
    Filed: January 15, 2019
    Publication date: November 5, 2020
    Inventors: Yafeng ZHANG, Shu WU, Shuai YANG, Chuan-Chu CHOU
  • Integrated telephone applications on online social networks
    Patent number: 10812438
    Abstract: In one embodiment, a method includes receiving a unique identifier of a second user from a mobile client system of a first user after the second user requests to communicate with the first user, identifying the second user based on the unique identifier, retrieving multiple items of profile information of the second user, determining whether the unique identifier is in a list of blocked identifiers, and sending to the first user a notification that a communication request form the second user has been declined if the unique identifier is in the list of blocked identifiers. The method also includes sending the first user multiple items of profile information of the second user if the unique identifier is in the list of blocked identifiers.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: October 20, 2020
    Assignee: Facebook, Inc.
    Inventors: Andrea Vaccari, Li Hua, Jia Li, Yimin Chen, Zheng Fang, David James Mason, Shu Wu, Xiaotian Guo, Xiaowei Jiang
  • METHOD OF EXPLOITING A FRACTURED OIL RESERVOIR HAVING A HETEROGENEOUS PORE SIZE
    Publication number: 20200320239
    Abstract: The invention simulates flows in a geological reservoir having a heterogeneous pore size. From laboratory measurements on samples taken in the geological reservoir, pore size distribution classes are determined and a triple-porosity model representative of each class is determined. The flow simulator according to the invention implements the triple-porosity model, a thermodynamic equation of state accounting for an equivalent dimension of the pores of the small-size medium, fluid exchanges exclusively between the large-pore and small-pore media and between the small-pore and fracture media, and the capillary pressure as a function of the saturation in a small-pore medium.
    Type: Application
    Filed: April 6, 2020
    Publication date: October 8, 2020
    Inventors: Carlos NIETO DRAGHI, Didier Yu DING, Nicolas SOBECKI, Yu Shu WU
  • METHOD OF FORMING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
    Publication number: 20200294804
    Abstract: A method of forming a semiconductor device includes removing a top portion of a dielectric layer surrounding a metal gate to form a recess in the dielectric layer; filling the recess with a capping structure; forming a patterned hard mask over the capping structure and over the metal gate, wherein a portion of the metal gate, a portion of the capping structure, and a portion of the dielectric layer are aligned vertically with an opening of the patterned hard mask; and performing an etch process on said portions of the metal gate, the capping structure, and the dielectric layer that are aligned vertically with the opening of the patterned hard mask, wherein the capping structure has an etch resistance higher than an etch resistance of the dielectric layer during the etch process.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Uei JANG, Chien-Hua TSENG, Chung-Shu WU, Ya-Yi TSAI, Ryan Chia-Jen CHEN, An-Chyi WEI
  • Packet processing efficiency based interrupt rate determination
    Patent number: 10684971
    Abstract: Interrupt rate determination can include instructions to determine a quantity of instances of packet processing by an operating system during a first period of time, each instance corresponding to a particular interrupt request sent by a device, determine a quantity of bytes processed during the first period of time by the operating system, determine a speed of the device, determine a first interrupt rate to assign to the device for a second period of time based on the quantity of instances, the quantity of bytes processed, and the speed of the device during the first period of time, and set the interrupt rate to the device.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: June 16, 2020
    Assignee: VMware, Inc.
    Inventors: Shu Wu, Michael Li, Zongyun Lai
  • Method of forming semiconductor structure and semiconductor device
    Patent number: 10672613
    Abstract: A method of forming a semiconductor structure includes forming a metal gate stack over a shallow trench isolation (STI) material in a semiconductor substrate, forming an interlayer dielectric over the STI material, recessing the interlayer dielectric to a height lower than a top surface of the metal gate stack, forming a helmet structure over the recessed interlayer dielectric, and after forming the helmet structure, etching the metal gate stack until reaching the STI material.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Uei Jang, Chien-Hua Tseng, Chung-Shu Wu, Ya-Yi Tsai, Ryan Chia-Jen Chen, An-Chyi Wei
  • Systems and methods for selecting content items and generating multimedia content
    Patent number: 10652075
    Abstract: Systems, methods, and non-transitory computer-readable media can detect a trigger event for generating multimedia content. A set of content items associated with a user account can be identified. Information associated with at least one of the set of content items or the user account can be acquired. A subset of content items can be selected out of the set of content items based on the information. In some embodiments, each content item in the subset can satisfy specified selection criteria. The multimedia content can be generated based on the subset of content items.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: May 12, 2020
    Assignee: Facebook, Inc.
    Inventors: Fabio Miranda Costa, James Cameron Ewing, Joshua Warren Higgins, Nicholas J. Kwiatek, Kyre Madeleine Osborn, Nathaniel Gregory Salciccoli, Skyler J. Vander Molen, Shu Wu
  • METHOD FOR FORMING FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE
    Publication number: 20200135725
    Abstract: A method for forming a FinFET device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate and forming a liner layer over the first fin structure and the second fin structure. The method also includes forming an isolation layer over the liner layer and removing a portion of the liner layer and a portion of the isolation layer, such that the liner layer includes a first liner layer on an outer sidewall surface of the first fin structure and a second liner layer on an inner sidewall surface of the first fin structure, and a top surface of the second liner layer is higher than a top surface of the first liner layer.
    Type: Application
    Filed: December 12, 2019
    Publication date: April 30, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Shu WU, Shu-Uei JANG, Wei-Yeh TANG, Ryan Chia-Jen CHEN, An-Chyi WEI
  • REDUCTION OF ELECTRIC FIELD ENHANCED MOISTURE PENETRATION BY METAL SHIELDING
    Publication number: 20200006469
    Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.
    Type: Application
    Filed: May 13, 2019
    Publication date: January 2, 2020
    Inventors: Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Wen-Chuan Tai, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Anderson Lin, Fu-Chun Huang, Chun-Ren Cheng, Ivan Hua-Shu Wu, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
  • Fin field effect transistor (FinFET) device structure and method for forming the same
    Patent number: 10515952
    Abstract: A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a first fin structure extending above a substrate, and the first fin structure includes a portion made of silicon germanium (SiGe). The FinFET device structure includes a second fin structure adjacent to the first fin structure. The FinFET device structure also includes a first liner layer formed on the outer sidewall surface of the first fin structure and a second liner layer formed on the inner sidewall surface of the first fin structure. The FinFET device structure further includes a first isolation structure formed on the substrate, and the first liner layer is between the first isolation structure and the first fin structure, and a top surface of the second liner layer is higher than a top surface of the first liner layer.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Shu Wu, Shu-Uei Jang, Wei-Yeh Tang, Ryan Chia-Jen Chen, An-Chyi Wei
  • MOTOR STATOR AND PERMANENT MAGNET SYNCHRONOUS SUBMERSIBLE MOTOR
    Publication number: 20190386527
    Abstract: The present invention is a permanent magnet synchronous submersible motor comprised of a motor stator and a rotor core. The motor stator includes a stator core formed by laminating a plurality of stator punching sheets. Each of the stator punching sheets is provided with an odd number of stator slots and any two of a X-phase coil, a Y-phase coil and a Z-phase coil are wound in each of the stator slots. The rotor core is formed by laminating a plurality of rotor punching sheets wherein each of the rotor punching sheets is provided with rotor slots and a permanent magnet inserted into each of the rotor slots. Furthermore, the permanent magnet submersible motor can be started with a conventional V/F controlled (variable frequency) converter.
    Type: Application
    Filed: October 29, 2018
    Publication date: December 19, 2019
    Applicant: AILift (Tianjin) Science Co., Ltd.
    Inventors: Shu WU, Bin WANG
  • Hardening film and method of manufacturing the same, flexible AMOLED display device
    Patent number: 10497899
    Abstract: The present disclosure discloses a hardening film which includes a substrate film layer and a hardening film layer on the substrate film layer, wherein a micro stereo structure layer including a plurality of micro stereo structures is disposed between the substrate film layer and the hardening film layer. A method of manufacturing the abovementioned hardening film includes: providing a substrate film layer; forming a micro stereo structure layer on the substrate film layer using a printing process or a photolithography process; and forming a hardening film layer on the micro stereo structure layer. The present disclosure also discloses a flexible AMOLED display device containing the abovementioned hardening film.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: December 3, 2019
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Jia-Shu Wu