Abstract: A wafer drying method to detect airborne molecular contaminants in a drying gas as a feedback parameter for a single wafer or multi-wafer drying process is provided. For example, the method includes dispensing in a wafer drying station a drying gas over one or more wafers; collecting the drying gas from an exhaust of the wafer drying station; determining the concentration of contaminants in the drying gas; re-dispensing the drying gas over the one or more wafers if the concentration of contaminants is higher than a baseline value; and transferring the one or more wafers out of the wafer drying station if the concentration is equal to or less than the baseline value.

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench including of an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

Abstract: The present invention provides a photomask, comprising: a substrate, a first region, a second region and a third region are defined thereon, wherein the third region is disposed between the first region and the second region, a patterned layer disposed on the substrate, wherein the patterned layer comprises a first patterned layer disposed in the first region, a second patterned layer disposed in the second region, and a third patterned layer disposed in the third region, and wherein a thickness of the first patterned layer is equal to a thickness of the second patterned layer, the thickness of the first patterned layer is different from a thickness of the third patterned layer, and at least one recess disposed in the third region.

Abstract: A semiconductor device includes a substrate having at least a trench formed therein. A conductive material fills a lower portion of the trench. A barrier layer is between the conductive material and the substrate. An insulating layer is in the trench and completely covers the conductive material and the barrier layer, wherein a portion of the insulating layer covering the barrier layer has a bird's peak profile.

Abstract: The present disclosure is directed to a wafer drying method that detects molecular contaminants in a drying gas as a feedback parameter for a multiple wafer drying process. For example, the method includes dispensing, in a wafer drying module, a drying gas over a batch of wafers. Further, the method includes collecting the drying gas from an exhaust of the wafer drying module and determining the concentration of contaminants in the drying gas. The method also includes re-dispensing the drying gas over the batch of wafers if the concentration of contaminants is greater than a baseline value and transferring the batch of wafers out of the wafer drying module if the concentration is equal to or less than the baseline value.

Abstract: A semiconductor device and a method of forming the same are disclosed. First, a substrate having a main surface is provided. At least a trench is formed in the substrate. A barrier layer is formed in the trench and a conductive material is formed on the barrier layer and filling up the trench. The barrier layer and the conductive material are then recessed to be lower than the upper surface of the substrate. After that, an oxidation process is performed to oxidize the barrier layer and the conductive material thereby forming an insulating layer.

Abstract: The present invention provides a semiconductor structure, the semiconductor structure includes a substrate, at least one active area is defined on the substrate, a buried word line is disposed in the substrate, a source/drain region disposed beside the buried word line, a diffusion barrier region, disposed at the top of the source/drain region, the diffusion barrier region comprises a plurality of doping atoms selected from the group consisting of carbon atoms, nitrogen atoms, germanium atoms, oxygen atoms, helium atoms and xenon atoms, a dielectric layer disposed on the substrate, and a contact structure disposed in the dielectric layer, and electrically connected to the source/drain region.

Abstract: The present disclosure describes a wafer cleaning process in which a drained cleaning solution, which is used to remove metal contaminants from the wafer, is sampled and analyzed to determine the concentration of metal ions in the solution. The wafer cleaning process includes dispensing, in a wafer cleaning station, a chemical solution on one or more waters; collecting the dispensed chemical solution; determining a concentration of contaminants in the chemical solution; in response to the concentration of the contaminants being greater than a baseline value, adjusting one or more parameters in the cleaning process; and in response to the concentration of the contaminants being equal to or less than the baseline value, transferring the one or more wafers out of the wafer cleaning station.

Abstract: In an embodiment, a method includes: immersing a wafer in a bath within a cleaning chamber; removing the wafer out of the bath through a solvent and into a gas within the cleaning chamber; determining a parameter value from the gas; and performing remediation within the cleaning chamber in response to determining that the parameter value is beyond a threshold value.

Abstract: The present disclosure is directed to a wafer drying method that detects airborne molecular contaminants in a drying gas as a feedback parameter for a single wafer or multi-wafer drying process. For example, the method includes dispensing in a wafer drying station a drying gas over one or more wafers; collecting the drying gas from an exhaust of the wafer drying station; determining the concentration of contaminants in the drying gas; re-dispensing the drying gas over the one or more wafers if the concentration of contaminants is higher than a baseline value; and transferring the one or more wafers out of the wafer drying station if the concentration is equal to or less than the baseline value.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

Abstract: The present invention provides a photomask, comprising: a substrate, a first region, a second region and a third region are defined thereon, wherein the third region is disposed between the first region and the second region, a patterned layer disposed on the substrate, wherein the patterned layer comprises a first patterned layer disposed in the first region, a second patterned layer disposed in the second region, and a third patterned layer disposed in the third region, and wherein a thickness of the first patterned layer is equal to a thickness of the second patterned layer, the thickness of the first patterned layer is different from a thickness of the third patterned layer, and at least one recess disposed in the third region.

Abstract: In an embodiment, a method includes: receiving a wafer from a first dilution tank; immersing the wafer in a deionization tank, wherein the deionization tank comprises a tank solution that comprises a deionizing solution; determining a metal ion concentration within the tank solution; performing remediation within the deionization tank in response to determining that the metal ion concentration is greater than a threshold value; and moving the wafer to a second dilution tank.

Abstract: A backup power supply system is provided in the present invention. In the backup power supply system, a power supply module is provided to transmit a work electricity to a load module. When a trigger is triggered to be switched on, a backup power module transmits a backup power to a capacitor and the load module through a switch module to make the capacitor store the backup power as a storing power. The load module is provided to receive the at least one of the backup power and the storing power to maintain a working status. The power supply module stops transmitting the work electricity to the load module when the backup power supply system is at a backup status.

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench including of an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

Abstract: The present disclosure provides an elongate culinary press. The press has a receptacle for accommodating foodstuff to be processed, a pressing member for moving towards or away from the receptacle, a pair of handle members extending from the receptacle and the pressing member, respectively, a scraping member for scraping processed foodstuff away from the receptacle, and a transmission mechanism. The press is adapted to assume a first configuration in which the arms are spread apart, the receptacle is exposed to receive foodstuff and the scraper is disposed in one end of the receptacle, and assume a second configuration in which the arms are moved towards each other, the pressing member is pressed against the foodstuff in the receptacle, and the scraping member is moved from one end to the opposite end of the receptacle.

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench including an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

Abstract: A method of manufacturing a semiconductor device is provided, which includes the steps of providing a capacitor structure, forming a conductive layer on the capacitor structure, performing a hydrogen doping process to the conductive layer, forming a metal layer on the conductive layer after the hydrogen doping process, and patterning the metal layer and the conductive layer to forma top electrode plate.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench.