Abstract: A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

Abstract: A mounting device and a method for mounting an object on a circuit board are provided. The mounting device has an abutting portion and at least one pin. The mounting method includes disposing multiple the mounting devices on the circuit board, passing pins of each mounting device through multiple plated holes of the circuit board and soldering the pins in the plated holes, making through holes of the object go through the mounting devices, bending the abutting portion to abut an edge of an opening of the through holes of the object, and thereby mounting the object on the circuit board via the multiple mounting devices as well as grounding the object. Since the mounting device is firmly mounted on the circuit board by soldering; it is easy to assembly because the mounting device is soldered by a solder oven.

Abstract: A method of manufacturing a semiconductor device is provided, which includes the steps of providing a capacitor structure, forming a conductive layer on the capacitor structure, performing a hydrogen doping process to the conductive layer, forming a metal layer on the conductive layer after the hydrogen doping process, and patterning the metal layer and the conductive layer to forma top electrode plate.

Abstract: A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

Abstract: A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench including an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

Abstract: A method of fabricating a buried word line includes forming a trench in a substrate. Next, a deposition process is performed to form a silicon layer on a sidewall and a bottom at the inner side of the trench. After the deposition process, a gate dielectric layer is formed in the trench. Finally, a conductive layer is formed to fill in the trench.

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench penetrating through an active area and a trench isolation region surrounding the active area. The gate trench exposes a sidewall of the active area and a sidewall of the trench isolation region. The sidewall of the trench isolation region includes a void. A first gate dielectric layer conformally covers the sidewall of the active area and the sidewall of the trench isolation region. The void in the sidewall of the trench isolation region is filled with the first gate dielectric layer. A second gate dielectric layer is grown on the sidewall of the active area. A gate is embedded in the gate trench.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region defined thereon; forming a trench in the substrate; performing a first ion implantation process to form a first doped region having a first conductive type in the substrate adjacent to the trench; forming a gate electrode in the trench; and performing a second ion implantation process to form a second doped region having a second conductive type in the substrate above the gate electrode.

Abstract: A method of fabricating a bottom electrode includes providing a dielectric layer. An atomic layer deposition is performed to form a bottom electrode material on the dielectric layer. Then, an oxidation process is performed to oxidize part of the bottom electrode material. The oxidized bottom electrode material transforms into an oxide layer. The bottom electrode material which is not oxidized becomes a bottom electrode. A top surface of the bottom electrode includes numerous hill-like profiles. Finally, the oxide layer is removed.

Abstract: The present disclosure provides an elongate culinary press. The press has a receptacle for accommodating foodstuff to be processed, a pressing member for moving towards or away from the receptacle, a pair of handle members extending from the receptacle and the pressing member, respectively, a scraping member for scraping processed foodstuff away from the receptacle, and a transmission mechanism. The press is adapted to assume a first configuration in which the arms are spread apart, the receptacle is exposed to receive foodstuff and the scraper is disposed in one end of the receptacle, and assume a second configuration in which the arms are moved towards each other, the pressing member is pressed against the foodstuff in the receptacle, and the scraping member is moved from one end to the opposite end of the receptacle.

Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. Storage node contacts are formed on a semiconductor substrate including active regions. Each storage node contact contacts at least one of the active regions. Each storage node contact has a recessed top surface. A first distance exists between a topmost point and a lowest point of the recessed top surface in a vertical direction. A second distance exists between the topmost point and a bottom surface of the storage node contact in the vertical direction. A ratio of the first distance to the second distance ranges from 30% to 70%. The contact resistance between the storage node contact and other conductive structures formed on the storage node contact may be reduced by the storage node contact having the recessed top surface, and the electrical operation condition of the semiconductor memory device may be improved accordingly.

Abstract: A semiconductor device and a method of forming the same are disclosed. First, a substrate having a main surface is provided. At least a trench is formed in the substrate. A barrier layer is formed in the trench and a conductive material is formed on the barrier layer and filling up the trench. The barrier layer and the conductive material are then recessed to be lower than the upper surface of the substrate. After that, an oxidation process is performed to oxidize the barrier layer and the conductive material thereby forming an insulating layer.

Abstract: A semiconductor device and a manufacturing method thereof include providing a substrate including an active region of a conductivity type and an isolation structure, in which the isolation structure surrounds the active region; forming a word line trench on the substrate, the word line trench intersecting the active region; and forming two doped regions in the active region at two sides of the word line trench respectively, in which each doped region and a bottom surface of the word line trench are located in a same level, and each doped region includes dopants of the conductivity type or an intrinsic semiconductor dopants.

Abstract: The present invention provides a semiconductor structure, the semiconductor structure includes a substrate, at least one active area is defined on the substrate, a buried word line is disposed in the substrate, a source/drain region disposed beside the buried word line, a diffusion barrier region, disposed at the top of the source/drain region, the diffusion barrier region comprises a plurality of doping atoms selected from the group consisting of carbon atoms, nitrogen atoms, germanium atoms, oxygen atoms, helium atoms and xenon atoms, a dielectric layer disposed on the substrate, and a contact structure disposed in the dielectric layer, and electrically connected to the source/drain region.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region defined thereon; forming a trench in the substrate; performing a first ion implantation process to form a first doped region having a first conductive type in the substrate adjacent to the trench; forming a gate electrode in the trench; and performing a second ion implantation process to form a second doped region having a second conductive type in the substrate above the gate electrode.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a trench in a substrate; performing an ion implantation process to implant ions into the substrate underneath the trench; performing an in-situ steam generation (ISSG) process to form a gate dielectric layer in the trench; forming a gate electrode on the gate dielectric layer; and forming a doped region in the substrate adjacent to two sides of the gate electrode.

Abstract: A dielectric structure and a manufacturing method thereof and a memory structure are provided. The dielectric structure includes a dielectric layer and a plurality of crystalline grains disposed in the dielectric layer. The dielectric layer includes a first high-K dielectric material with a first dielectric constant. Each crystalline grain includes a second high-K dielectric material with a second dielectric constant greater than the first dielectric constant and greater than 20. Each crystalline grain has a crystal structure, so that each crystalline grain has a third dielectric constant greater than the second dielectric constant. Whole dielectric constant of the dielectric structure can be raised by performing an annealing process to form the crystalline grains in the dielectric layer, and the capacity of the memory structure for storing electric charges can be increased.

Abstract: A backup power supply system is provided in the present invention. In the backup power supply system, a power supply module is provided to transmit a work electricity to a load module. When a trigger is triggered to be switched on, a backup power module transmits a backup power to a capacitor and the load module through a switch module to make the capacitor store the backup power as a storing power. The load module is provided to receive the at least one of the backup power and the storing power to maintain a working status. The power supply module stops transmitting the work electricity to the load module when the backup power supply system is at a backup status.

Abstract: A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.