Patents by Inventor Shuji Nakamura

Shuji Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120187415
    Abstract: A method of controlled p-type conductivity in (Al,In,Ga,B)N semiconductor crystals. Examples include {10 11} GaN films deposited on {100} MgAl2O4 spinel substrate miscut in the <011> direction. Mg atoms may be intentionally incorporated in the growing semipolar nitride thin film to introduce available electronic states in the band structure of the semiconductor crystal, resulting in p-type conductivity. Other impurity atoms, such as Zn or C, which result in a similar introduction of suitable electronic states, may also be used.
    Type: Application
    Filed: April 5, 2012
    Publication date: July 26, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John F. Kaeding, Hitoshi Sato, Michael Iza, Hirokuni Asamizu, Hong Zhong, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8227820
    Abstract: A semiconductor light-emitting diode, and method of fabricating same, wherein an indium (In)-containing light-emitting layer, as well as subsequent device layers, is deposited on a textured surface. The resulting device is a phosphor-free white light source.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: July 24, 2012
    Assignee: The Regents of the University of California
    Inventors: Rajat Sharma, Paul Morgan Pattison, John Francis Kaeding, Shuji Nakamura
  • Patent number: 8227818
    Abstract: A structure using integrated optical elements is comprised of a substrate, a buffer layer grown on the substrate, one or more first patterned layers deposited on top of the buffer layer, wherein each of the first patterned layers is comprised of a bottom lateral epitaxial overgrowth (LEO) mask layer and a LEO nitride layer filling holes in the bottom LEO mask layer, one or more active layers formed on the first patterned layers, and one or more second patterned layers deposited on top of the active layer, wherein each of the second patterned layers is comprised of a top LEO mask layer and a LEO nitride layer filling holes in the top LEO mask layer, wherein the top and/or bottom LEO mask layers act as a mirror, optical confinement layer, grating, wavelength selective element, beam shaping element or beam directing element for the active layers.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: July 24, 2012
    Assignee: The Regents of the University of California
    Inventors: Claude C. A. Weisbuch, Shuji Nakamura
  • Patent number: 8227819
    Abstract: A light emitting diode (LED) having a p-type layer having a thickness of 100 nm or less, an n-type layer, and an active layer, positioned between the p-type layer and the n-type layer, for emitting light, wherein the LED does not include a separate electron blocking layer.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: July 24, 2012
    Assignee: The Regents of the University of California
    Inventors: Hong Zhong, Anurag Tyagi, James Stephen Speck, Steven P. Denbaars, Shuji Nakamura
  • Publication number: 20120180868
    Abstract: A III-nitride photovoltaic device structure and method for fabricating the III-nitride photovoltaic device that increases the light collection efficiency of the III-nitride photovoltaic device. The III-nitride photovoltaic device includes one or more III-nitride device layers, and the III-nitride photovoltaic device functions by collecting light that is incident on the back-side of the III-nitride device layers. The III-nitride device layers are grown on a substrate, wherein the III-nitride device layers are exposed when the substrate is removed and the exposed III-nitride device layers are then intentionally roughened to enhance their light collection efficiency. The collection of the incident light via the back-side of the device simplifies the fabrication of the multiple junctions in the device. The III-nitride photovoltaic device may include grid-like contacts, transparent or semi-transparent contacts, or reflective contacts.
    Type: Application
    Filed: October 21, 2011
    Publication date: July 19, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Robert M. Farrell, Carl J. Neufeld, Nikholas G. Toledo, Steven P. DenBaars, Umesh K. Mishra, James S. Speck, Shuji Nakamura
  • Publication number: 20120175739
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an ?-axis direction comprising a 0.15° or greater miscut angle towards the ?-axis direction and a less than 30° miscut angle towards the ?-axis direction.
    Type: Application
    Filed: March 22, 2012
    Publication date: July 12, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako HIRAI, Zhongyuan JIA, Makoto SAITO, Hisashi YAMADA, Kenji ISO, Steven P. DENBAARS, Shuji NAKAMURA, James S. SPECK
  • Patent number: 8219747
    Abstract: In a storage system including a host computer, and a disk control device connected to the host computer for communications therewith, and performs control over a disk device that stores therein data requested for writing from the host computer, for data transmission from a host interface section or a disk interface section to a memory section, when the data asked by a transmission source for storage is stored in a transmission destination, the transmission destination is put in a first mode for communications of forwarding a response back to the transmission source. With such a configuration, favorably provided is the storage system that offers a guarantee of reliability with the improved processing capabilities thereof.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: July 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Makio Mizuno, Shuji Nakamura, Masanori Takada
  • Patent number: 8211723
    Abstract: A method for fabricating AlxGa1-xN-cladding-free nonpolar III-nitride based laser diodes or light emitting diodes. Due to the absence of polarization fields in the nonpolar crystal planes, these nonpolar devices have thick quantum wells that function as an optical waveguide to effectively confine the optical mode to the active region and eliminate the need for Al-containing waveguide cladding layers.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: July 3, 2012
    Assignee: The Regents of the University of California
    Inventors: Daniel F. Feezell, Mathew C. Schmidt, Kwang-Choong Kim, Robert M. Farrell, Daniel A. Cohen, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8214586
    Abstract: This storage apparatus that provides to a host computer a logical device for storing data sent from the host computer includes a nonvolatile memory for storing the data, a disk-shaped memory device for storing the data, and a controller for controlling the nonvolatile memory and the disk-shaped memory device. The controller redundantly configures the logical device with the nonvolatile memory and the disk-shaped memory device.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: July 3, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Shuji Nakamura, Kazuhisa Fujimoto
  • Publication number: 20120164386
    Abstract: An ammonothermal growth of group-III nitride crystals on starting seed crystals with at least two surfaces making an acute, right or obtuse angle, i.e., greater than 0 degrees and less than 180 degrees, with respect to each other, such that the exposed surfaces together form a concave surface.
    Type: Application
    Filed: October 28, 2011
    Publication date: June 28, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Siddha Pimputkar, James S. Speck, Shuji Nakamura, Shin-Ichiro Kawabata
  • Publication number: 20120161287
    Abstract: A method for growing a semi-polar nitride semiconductor thin film via metalorganic chemical vapor deposition (MOCVD) on a substrate, wherein a nitride nucleation or buffer layer is grown on the substrate prior to the growth of the semi-polar nitride semiconductor thin film.
    Type: Application
    Filed: January 17, 2012
    Publication date: June 28, 2012
    Applicants: JAPAN SCIENCE AND TECHNOLOGY AGENCY, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Michael Iza, Troy J. Baker, Benjamin A. Haskell, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8209595
    Abstract: The present invention provides means for effectively reducing the amount of data by means of de-duplication in a disk array apparatus having a data guarantee code. A control means for the disk array apparatus that adds a data guarantee code to each logical data block and checks the data guarantee code when reading data has a de-duplication performing function and control means for: generating LA substitution information for a function checking the data guarantee code or read data location address substitution information when performing the de-duplication and storing data; performing the de-duplication using the above-mentioned information when reading data; and thereby avoiding false diagnosis of the data guarantee code check.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 26, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Arai, Kentaro Shimada, Shuji Nakamura
  • Publication number: 20120153297
    Abstract: Ohmic cathode electrodes are formed on the backside of nonpolar m-plane (1-100) and semipolar (20-21) bulk gallium nitride (GaN) substrates. The GaN substrates are thinned using a mechanical polishing process. For m-plane GaN, after the thinning process, dry etching is performed, followed by metal deposition, resulting in ohmic I-V characteristics for the contact. For (20-21) GaN, after the thinning process, dry etching is performed, followed by metal deposition, followed by annealing, resulting in ohmic I-V characteristics for the contact as well.
    Type: Application
    Filed: August 1, 2011
    Publication date: June 21, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Chia-Lin Hsiung, You-Da Lin, Hiroaki Ohta, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8203159
    Abstract: A method of fabricating an optoelectronic device, comprising growing an active layer of the device on an oblique surface of a suitable material, wherein the oblique surface comprises a facetted surface. The present invention also discloses a method of fabricating the facetted surfaces. One fabrication process comprises growing an epitaxial layer on a suitable material, etching the epitaxial layer through a mask to form the facets having a specific crystal orientation, and depositing one or more active layers on the facets. Another method comprises growing a layer of material using a lateral overgrowth technique to produce a facetted surface, and depositing one or more active layers on the facetted surfaces. The facetted surfaces are typically semipolar planes.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: June 19, 2012
    Assignee: The Regents of the University of California
    Inventors: Hong Zhong, John F. Kaeding, Rajat Sharma, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20120138986
    Abstract: A method of fabricating an (Al, In, Ga)N based optoelectronic device, comprising forming an n-type ohmic contact on an (Al, In, Ga)N surface of the device, wherein the surface comprises an Nitrogen face (N-face) and a N-rich face of the (Al, In, Ga)N, the n-type contact is on the N-face and the N-rich face, and the current spreading of the n-type ohmic contact is enhanced by a combination of a lower and a higher contact resistance on the surface.
    Type: Application
    Filed: October 28, 2011
    Publication date: June 7, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: ROY B. CHUNG, HUNG TSE CHEN, CHIH-CHIEN PAN, JAMES S. SPECK, STEVEN P. DENBAARS, SHUJI NAKAMURA
  • Publication number: 20120138891
    Abstract: A method for reduction of efficiency droop using an (Al, In, Ga)N/AlxIn1-xN superlattice electron blocking layer (SL-EBL) in nitride based light emitting diodes.
    Type: Application
    Filed: October 27, 2011
    Publication date: June 7, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Roy B. Chung, Changseok Han, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 8193079
    Abstract: A method of controlled p-type conductivity in (Al,In,Ga,B)N semiconductor crystals. Examples include {10 11} GaN films deposited on {100} MgAl2O4 spinel substrate miscut in the <011> direction. Mg atoms may be intentionally incorporated in the growing semipolar nitride thin film to introduce available electronic states in the band structure of the semiconductor crystal, resulting in p-type conductivity. Other impurity atoms, such as Zn or C, which result in a similar introduction of suitable electronic states, may also be used.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 5, 2012
    Assignee: The Regents of the University of California
    Inventors: John F. Kaeding, Hitoshi Sato, Michael Iza, Hirokuni Asamizu, Hong Zhong, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8188458
    Abstract: A method for forming non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices. Non-polar (11 20) a-plane GaN layers are grown on an r-plane (1 102) sapphire substrate using MOCVD. These non-polar (11 20) a-plane GaN layers comprise templates for producing non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: May 29, 2012
    Assignee: The Regents of the University of California
    Inventors: Michael D. Craven, Stacia Keller, Steven P. DenBaars, Tal Margalith, James S. Speck, Shuji Nakamura, Umesh K. Mishra
  • Publication number: 20120126283
    Abstract: A III-nitride light emitting diode grown on a semipolar {20-2-1} plane of a substrate and characterized by high power, high efficiency and low efficiency droop.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 24, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Yuji Zhao, Junichi Sonoda, Chih-Chien Pan, Shinichi Tanaka, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20120126198
    Abstract: A light emitting diode (LED) device structure with a reduced Droop effect, and a method for fabricating the LED device structure. The LED is a III-nitride-based LED having an active layer or emitting layer comprised of a multi-quantum-well (MQW) structure, wherein there are eight or more quantum wells (QWs) in the MQW structure, and more preferably, at least nine QWs in the MQW structure. Moreover, the QWs in the MQW structure are grown at temperatures different from barrier layers in the MQW structure, wherein the barrier layers in the MQW structure are grown a temperatures at least 40° C. higher than the QWs in the MQW structure.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 24, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Junichi Sonoda, Hung Tse Chen, Chih-Chien Pan