Patents by Inventor Shuji Nakamura

Shuji Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8183557
    Abstract: A nitride light emitting diode, on a patterned substrate, comprising a nitride interlayer having at least two periods of alternating layers of InxGa1?xN and InyGa1?yN where 0<x<1 and 0?y<1, and a nitride based active region having at least one quantum well structure on the nitride interlayer.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: May 22, 2012
    Assignee: The Regents of the University of California
    Inventors: Michael Iza, Hitoshi Sato, Eu Jin Hwang, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8178373
    Abstract: A method of device growth and p-contact processing that produces improved performance for non-polar III-nitride light emitting diodes and laser diodes. Key components using a low defect density substrate or template, thick quantum wells, a low temperature p-type III-nitride growth technique, and a transparent conducting oxide for the electrodes.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: May 15, 2012
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: Mathew C. Schmidt, Kwang Choong Kim, Hitsohi Sato, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Publication number: 20120107991
    Abstract: A III-nitride-based light emitting device having a multiple quantum well (MQW) structure and a method for fabricating the device, wherein at least one barrier in the MQW structure is doped with magnesium (Mg). The Mg doping of the barrier is accomplished by introducing a bis(cyclopentadienyl)magnesium (Cp2Mg) flow during growth of the barrier using metalorganic chemical vapor deposition (MOCVD). The barriers of the MQW structure may be undoped, fully Mg-doped or partially Mg-doped. When the barrier is partially Mg-doped, only portions of the barrier are Mg-doped to prevent Mg diffusion into quantum wells of the MQW structure. The Mg-doped barriers preferably are high Al composition AlGaN barriers in nonpolar or semipolar devices.
    Type: Application
    Filed: October 21, 2011
    Publication date: May 3, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Chia-Yen Huang, Shuji Nakamura, Steven P. DenBaars, James S. Speck
  • Publication number: 20120104360
    Abstract: An (AlInGaN) based semiconductor device, comprising a first layer that is a semipolar or nonpolar nitride (AlInGaN) layer having a lattice constant that is partially or fully relaxed, deposited on a substrate or a template, wherein there are one or more dislocations at a heterointerface between the first layer and the substrate or the template; one or more strain compensated layers on the first layer, for defect reduction and stress engineering in the device, that is lattice matched to a larger lattice constant of the first layer; and one or more nonpolar or semipolar (AlInGaN) device layers on the strain compensated layers.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 3, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Matthew T. Hardy, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Publication number: 20120103419
    Abstract: A group-III nitride solar cell is grown on a thin piece of a group-III nitride crystal that has been mounted on a carrier comprised of a foreign material. The thin piece is a thin layer with a thickness that ranges from approximately 5 microns to approximately 300 microns.
    Type: Application
    Filed: October 25, 2011
    Publication date: May 3, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Siddha Pimputkar, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20120104412
    Abstract: A III-nitride light emitting diode (LED) and method of fabricating the same, wherein at least one surface of a semipolar or nonpolar plane of a III-nitride layer of the LED is textured, thereby forming a textured surface in order to increase light extraction. The texturing may be performed by plasma assisted chemical etching, photolithography followed by etching, or nano-imprinting followed by etching.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 3, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Hong Zhong, Anurag Tyagi, Kenneth J. Vampola, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20120104411
    Abstract: A method for fabricating a III-nitride semiconductor film, comprising depositing or growing a III-nitride semiconductor film in a semiconductor light absorbing or light emitting device structure; and growing a textured or structured surface of the III-nitride nitride semiconductor film in situ with the growing or the deposition of the III-nitride semiconductor film, by controlling the growing of the III-nitride semiconductor film to obtain a texture of the textured surface, or one or more structures of the structured surface, that increase output power of light from the light emitting device, or increase absorption of light in the light absorbing device.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 3, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Michael Iza, Carl J. Neufeld, Samantha C. Cruz, Robert M. Farrell, James S. Speck, Shuji Nakamura, Steven P. DenBaars, Umesh K. Mishra
  • Publication number: 20120100650
    Abstract: A method for fabricating a semi-polar III-nitride substrate for semi-polar III-nitride device layers, comprising providing a vicinal surface of the III-nitride substrate, so that growth of relaxed heteroepitaxial III-nitride device layers on the vicinal surface compensates for epilayer tilt of the III-nitride device layers caused by one or more misfit dislocations at one or more heterointerfaces between the device layers.
    Type: Application
    Filed: October 26, 2011
    Publication date: April 26, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: James S. Speck, Anurag Tyagi, Alexey E. Romanov, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20120097919
    Abstract: A method of fabricating a substrate for a semipolar III-nitride device, comprising patterning and forming one or more mesas on a surface of a semipolar III-nitride substrate or epilayer, thereby forming a patterned surface of the semipolar III-nitride substrate or epilayer including each of the mesas with a dimension/along a direction of a threading dislocation glide, wherein the threading dislocation glide results from a III-nitride layer deposited heteroepitaxially and coherently on a non-patterned surface of the substrate or epilayer.
    Type: Application
    Filed: October 26, 2011
    Publication date: April 26, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: James S. Speck, Anurag Tyagi, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20120096970
    Abstract: In a shift lever device, a first-link is held at a permitting-position due to a release button being operated. Therefore, when a shift lever is operated from a “P” shift position, when a second-link is pushed toward a vehicle right side by the shift lever, even if a magnet is not energized, the second-link is rotated in a state where sliding of the first-link toward a vehicle right is impeded. Operation of the shift lever from the “P” shift position is thereby forcibly permitted. Here, the first-link is disposed at the permitting-position that is an initial-position, and, due to the release button being operated, the first-link is held at the permitting-position. Therefore, there is no need to move the first-link by operation of the release button, and the operation load and operation stroke of the release button can be made to be small.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 26, 2012
    Applicant: KABUSHIKI KAISHA TOKAI-RIKA-DENKI-SEISAKUSHO
    Inventors: Shuji NAKAMURA, Hideaki ITO
  • Patent number: 8166270
    Abstract: A storage control apparatus according to the present invention includes a plurality of connecting units connected to one or more host computers and one or more hard disk drives as storage media for storing data, one or more non-volatile storage media which are of a different type from the hard disk drives and which store data WRITE requested from the host computer, a plurality of processing units for processing WRITE and READ requests from the host computer by using the hard disk drives or the non-volatile storage media and, a plurality of memory units for storing control information to be by the processing units.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: April 24, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Shuji Nakamura
  • Patent number: 8158497
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: April 17, 2012
    Assignee: The Regents of the University of California
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20120086106
    Abstract: A method for fabricating a high quality freestanding nonpolar and semipolar nitride substrate with increased surface area, comprising stacking multiple films by growing the films one on top of each other with different and non-orthogonal growth directions.
    Type: Application
    Filed: December 15, 2011
    Publication date: April 12, 2012
    Applicant: The Regents of the University of California
    Inventors: Asako Hirai, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8156279
    Abstract: This storage device performs deduplication of eliminating duplicated data by storing a logical address of one or more corresponding logical unit memory areas in a prescribed management information storage area of a physical unit memory area defined in the storage area provided by the flash memory chip, and executes a reclamation process of managing a use degree as the total number of the logical addresses used stored in the management information storage area and a duplication degree as the number of valid logical addresses corresponding to the physical unit memory area for each of the physical unit memory areas, and returning the physical unit memory area to an unused status when the difference of the use degree and the duplication degree exceeds a default value in the physical unit memory area.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: April 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Shuji Nakamura, Makio Mizuno
  • Patent number: 8148244
    Abstract: A lateral growth method for defect reduction of semipolar nitride films. The process steps include selecting a semipolar nitride plane and composition, selecting a suitable substrate for growth of the semipolar nitride plane and composition, and applying a selective growth process in which the semipolar nitride nucleates on some areas of the substrate at the exclusion of other areas of the substrate, wherein the selective growth process includes lateral growth of nitride material by a lateral epitaxial overgrowth (LEO), sidewall lateral epitaxial overgrowth (SLEO), cantilever epitaxy or nanomasking.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: April 3, 2012
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: Troy J. Baker, Benjamin A. Haskell, James S. Speck, Shuji Nakamura
  • Patent number: 8148713
    Abstract: A yellow Light Emitting Diode (LED) with a peak emission wavelength in the range 560-580 nm is disclosed. The LED is grown on one or more III-nitride-based semipolar planes and an active layer of the LED is composed of indium (In) containing single or multi-quantum well structures. The LED quantum wells have a thickness in the range 2-7 nm. A multi-color LED or white LED comprised of at least one semipolar yellow LED is also disclosed.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: April 3, 2012
    Assignee: The Regents of the University of California
    Inventors: Hitoshi Sato, Hirohiko Hirasawa, Roy B. Chung, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Publication number: 20120074525
    Abstract: A method for improved growth of a semipolar (Al,In,Ga,B)N semiconductor thin film using an intentionally miscut substrate. Specifically, the method comprises intentionally miscutting a substrate, loading a substrate into a reactor, heating the substrate under a flow of nitrogen and/or hydrogen and/or ammonia, depositing an InxGa1-xN nucleation layer on the heated substrate, depositing a semipolar nitride semiconductor thin film on the InxGa1-xN nucleation layer, and cooling the substrate under a nitrogen overpressure.
    Type: Application
    Filed: December 6, 2011
    Publication date: March 29, 2012
    Applicants: JAPAN SCIENCE AND TECHNOLOGY AGENCY, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John F. Kaeding, Dong-Seon Lee, Michael Iza, Troy J. Baker, Hitoshi Sato, Benjamin A. Haskell, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20120076165
    Abstract: A light emitting active region between a first cladding layer and a second cladding layer, wherein the first cladding layer has a lower refractive index than a refractive index of the second cladding layer, and the first cladding layer and the second cladding layer are III-nitride based.
    Type: Application
    Filed: June 7, 2010
    Publication date: March 29, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Arpan Chakraborty, You-Da Lin, Shuji Nakamura, Steven P. Denbaars
  • Publication number: 20120074524
    Abstract: A lateral growth method for defect reduction of semipolar nitride films. The process steps include selecting a semipolar nitride plane and composition, selecting a suitable substrate for growth of the semipolar nitride plane and composition, and applying a selective growth process in which the semipolar nitride nucleates on some areas of the substrate at the exclusion of other areas of the substrate, wherein the selective growth process includes lateral growth of nitride material by a lateral epitaxial overgrowth (LEO), sidewall lateral epitaxial overgrowth (SLEO), cantilever epitaxy or nanomasking.
    Type: Application
    Filed: December 1, 2011
    Publication date: March 29, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Troy J. Baker, Benjamin A. Haskell, James S. Speck, Shuji Nakamura
  • Publication number: 20120074429
    Abstract: A method of growing non-polar m-plane III-nitride film, such as GaN, AlN, AlGaN or InGaN, wherein the non-polar m-plane III-nitride film is grown on a suitable substrate, such as an m-SiC, m-GaN, LiGaO2 or LiAlO2 substrate, using metalorganic chemical vapor deposition (MOCVD). The method includes performing a solvent clean and acid dip of the substrate to remove oxide from the surface, annealing the substrate, growing a nucleation layer, such as aluminum nitride (AlN), on the annealed substrate, and growing the non-polar m-plane III-nitride film on the nucleation layer using MOCVD.
    Type: Application
    Filed: December 7, 2011
    Publication date: March 29, 2012
    Applicants: JAPAN SCIENCE AND TECHNOLOGY AGENCY, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Bilge M. Imer, James S. Speck, Steven P. DenBaars, Shuji Nakamura