Abstract: A semiconductor device having favorable display quality is provided. The semiconductor device is provided with a display portion, a line-of-sight sensor portion, a control portion, and an arithmetic portion. The line-of-sight sensor portion has a function of obtaining first information showing a direction of a user's line of sight. The arithmetic portion has a function of determining a first region including a gaze point of the user on the display portion with use of the first information and a function of increasing a definition of an image displayed on the first region. Light emitted from the display portion may be used to obtain the first information showing the direction of the line of sight.

Abstract: A multifunctional display apparatus with high resolution is provided. The display apparatus includes a first pixel; the first pixel includes a first light-emitting device, a second light-emitting device, and a first light-receiving device; the first light-emitting device includes a first light-emitting layer; the second light-emitting device includes a second light-emitting layer; the second light-emitting device has a function of emitting white light; the first light-emitting device has a function of emitting visible light of a color different from that of the second light-emitting device; the first light-receiving device has a function of sensing light emitted from the first light-emitting device; a side surface of the first light-emitting layer faces a side surface of the second light-emitting layer; and the distance between the side surface of the first light-emitting layer and the side surface of the second light-emitting layer is less than or equal to 8 ?m.

Abstract: A high-resolution display device is provided. A display device having both high display quality and high resolution is provided. The display device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode. The second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. An insulating layer containing an inorganic insulating material is provided between the first pixel electrode and the second pixel electrode. The insulating layer includes a first region overlapping with the first EL layer, a second region overlapping with the second EL layer, and a third region positioned between the first region and the second region. A side surface of the first EL layer and a side surface of the second EL layer are positioned over the insulating layer to face each other.

Abstract: A display device includes a display panel mounted on a curved surface, and driver circuits including circuit elements which are mounted on a plurality of plane surfaces provided on the back of the curved surface in a stepwise shape along the curved surface.

Abstract: A display device in which a peripheral circuit portion has high operation stability is provided. The display device includes a first substrate and a second substrate. A first insulating layer is provided over a first surface of the first substrate. A second insulating layer is provided over a first surface of the second substrate. The first surface of the first substrate and the first surface of the second substrate face each other. An adhesive layer is provided between the first insulating layer and the second insulating layer. A protective film in contact with the first substrate, the first insulating layer, the adhesive layer, the second insulating layer, and the second substrate is formed in the vicinity of a peripheral portion of the first substrate and the second substrate.

Abstract: A novel semiconductor device formed with single-polarity circuits using OS transistors is provided. Thus, connection between different layers in a memory circuit is unnecessary. This can reduce the number of connection portions and improve the flexibility of circuit layout and the reliability of the OS transistors. In particular, many memory cells are provided; thus, the memory cells are formed with single-polarity circuits, whereby the number of connection portions can be significantly reduced. Further, by providing a driver circuit in the same layer as the cell array, many wirings for connecting the driver circuit and the cell array can be prevented from being provided between layers, and the number of connection portions can be further reduced. An interposer provided with a plurality of integrated circuits can function as one electronic component.

Abstract: A display apparatus having both a personal authentication function and a high resolution is provided. The display apparatus includes a display portion and a sensor portion. The display portion includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first EL layer. The second light-emitting element includes a second EL layer. The sensor portion includes a light-receiving element. The first light-emitting element has a function of emitting infrared light. The light-receiving element has a function of detecting infrared light. A distance between the first EL layer and the second EL layer is less than or equal to 6 ?m.

Abstract: A display device having a function of detecting an object that is in contact with or approaches a display portion is provided. The display device includes a light-emitting element and a light-receiving element. The light-emitting element includes a first pixel electrode, a first functional layer, a light-emitting layer, a common layer, and a common electrode. The light-receiving element includes a second pixel electrode, a second functional layer, a light-receiving layer, the common layer, and the common electrode. The first functional layer includes one of a hole-injection layer and an electron-injection layer. The second functional layer includes one of a hole-transport layer and an electron-transport layer. The common layer has a function of the other of the hole-injection layer and the electron-injection layer in the light-emitting element and has a function of the other of the hole-transport layer and the electron-transport layer in the light-receiving element.

Abstract: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a first insulator over the second oxide, a first conductor over the first insulator, and a second conductor and a third conductor over the second oxide. The second conductor includes a first region and a second region, the third conductor includes a third region and a fourth region, the second region is positioned above the first region, the fourth region is positioned above the third region, and each of the second conductor and the third conductor contains tantalum and nitrogen. The atomic ratio of nitrogen to tantalum in the first region is higher than the atomic ratio of nitrogen to tantalum in the second region, and the atomic ratio of nitrogen to tantalum in the third region is higher than the atomic ratio of nitrogen to tantalum in the fourth region.

Abstract: A semiconductor device with high reliability is provided. The present invention relates to a method for manufacturing a transistor including an oxide semiconductor. A stacked-layer structure of an oxide semiconductor and an insulator functioning as a gate insulator is subjected to microwave-excited plasma treatment, whereby the carrier concentration of the oxide semiconductor is reduced and the barrier property of the gate insulator is improved. In addition, a conductor functioning as an electrode and the insulator functioning as a gate insulator are formed in contact with the oxide semiconductor and then the microwave-excited plasma treatment is performed, whereby a high-resistance region and a low-resistance region can be formed in the oxide semiconductor in a self-aligned manner. Moreover, the microwave-excited plasma treatment is performed under an atmosphere containing oxygen with a high pressure, whereby a transistor having favorable electrical characteristics can be provided.

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.

Abstract: An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

Abstract: A novel oxide semiconductor, a novel oxynitride semiconductor, a transistor including them, or a novel sputtering target is provided. A composite target includes a first region and a second region. The first region includes an insulating material and the second region includes a conductive material. The first region and the second region each include a microcrystal whose diameter is greater than or equal to 0.5 nm and less than or equal to 3 nm or a value in the neighborhood thereof. A semiconductor film is formed using the composite target.

Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.

Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+?Ga1??O3(ZnO)m (0<?<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).

Abstract: A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.

Abstract: A novel memory device is provided. The memory device includes a plurality of memory cells, and one memory cell includes a first transistor and a second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor through a node SN. Data written through the first transistor is retained at the node SN. When an OS transistor is used as the first transistor, formation of a storage capacitor is not needed. A region with a low dielectric constant is provided outside the memory cell, whereby noise from the outside is reduced and stable operation is achieved.

Abstract: A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are provided over the first transistor so as to overlap with a gate of the first transistor. A semiconductor layer of the second transistor and a dielectric layer of the capacitor are directly connected to the gate of the first transistor. The second transistor is a vertical transistor, where its channel direction is perpendicular to an upper surface of a semiconductor layer of the first transistor.

Abstract: A battery protection circuit with a novel configuration and a power storage device including the battery protection circuit are provided. The battery protection circuit includes a switch circuit for controlling charge and discharge of a battery cell; the switch circuit includes a mechanical relay, a first transistor, and a second transistor; the switch circuit has a function of controlling electrical connection between a first terminal and a second terminal; the mechanical relay has a function of breaking electrical connection between the first terminal and the second terminal; the first transistor has a function of supplying first current between the first terminal and the second terminal; the second transistor has a function of supplying second current between the first terminal and the second terminal; and the first current is higher than the second current.