Patents by Inventor Soichi Inoue

Soichi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040115541
    Abstract: A mask defect inspecting method comprises preparing detection sensitivities of defects on a plurality of portions of a mask pattern on a photomask, the detection sensitivities being determined according to influences of the defects upon a wafer, and inspecting defects on the plurality of portions based on the detection sensitivities.
    Type: Application
    Filed: September 4, 2003
    Publication date: June 17, 2004
    Inventors: Shinji Yamaguchi, Soichi Inoue, Satoshi Tanaka, Mari Inoue
  • Patent number: 6727028
    Abstract: In a pattern forming method, a cell pattern of each of memory cells is separated into a first pattern group provided at a predetermined position inside from an endmost portion of a cell and a second pattern group excluding the first pattern group. A mask size of the second pattern group is determined such that the second pattern group secures a sufficient process margin relative to a given size and size accuracy. A mask size of the first pattern group is optimized according to a peripheral pattern environment such that the first pattern group has a desired size under the above condition. A mask pattern of the memory cell is formed according to the mask size of the second pattern group and the first pattern group. The cell pattern is formed on a semiconductor wafer, using the mask pattern.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: April 27, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiya Kotani, Satoshi Tanaka, Soichi Inoue
  • Publication number: 20040058256
    Abstract: There is disclosed a dose monitor method comprising illuminating a mask with illumination light, which is disposed in a projection exposure apparatus and in which a dose monitor pattern is formed, passing only a 0th-order diffracted light through a pupil surface of the projection exposure apparatus in diffracted lights of the dose monitor pattern, and transferring a 0th-order diffracted light image of the dose monitor pattern onto a substrate to measure dose, wherein during the illuminating, a center of gravity of the 0th-order diffracted light image passed through the dose monitor pattern on the pupil surface of the projection exposure apparatus is shifted from an optical axis of the projection exposure apparatus.
    Type: Application
    Filed: July 2, 2003
    Publication date: March 25, 2004
    Inventors: Tadahito Fujisawa, Soichi Inoue, Takashi Sato, Masafumi Asano
  • Patent number: 6701512
    Abstract: According to a focus monitoring method, an exposure mask on which a focus monitor pattern comprising at least two types of pattern groups is formed is prepared. A pattern group A of the at least two pattern groups is illuminated with illumination light while a barycenter of an illumination light source of illumination optics is in an off-axis state. At least a pattern group B of the at least two pattern groups is illuminated with illumination light while the barycenter of the illumination light source is in an on-axis state. A positional deviation between the pattern groups A and B transferred onto a substrate is measured. An effective focus position can be monitored from this positional deviation.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: March 2, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takumichi Sutani, Tadahito Fujisawa, Takashi Sato, Takashi Sakamoto, Masafumi Asano, Soichi Inoue
  • Publication number: 20040033448
    Abstract: A method for manufacturing a semiconductor device including, forming a photosensitive-film on a substrate, carrying the substrate on which the photosensitive-film is formed, to an exposure device provided with a mask in which an on-mask-inspection-mark and an on-mask-device-pattern are formed, selectively exposing the photosensitive-film to light to transfer the on-mask-inspection-mark to the photosensitive-film to form a latent-image of the inspection-mark on the photosensitive-film, heating at least that area of the photosensitive-film in which the latent-image of the inspection-mark is formed, measuring the inspection-mark, changing set-values for the exposure device used for the selective exposure, on the basis of result of the measurement so that exposure conditions conform to the set-values, exposing the photosensitive-film on the basis of the changed set-values to transfer the on-mask-device-pattern to the photosensitive-film to form a latent image of the device-pattern on the photosensitive-film, heat
    Type: Application
    Filed: March 4, 2003
    Publication date: February 19, 2004
    Inventors: Shinichi Ito, Tatsuhiko Higashiki, Katsuya Okumura, Kenji Kawano, Soichi Inoue
  • Publication number: 20040015794
    Abstract: Disclosed is a method of setting a process parameter for use in manufacturing a semiconductor integrated circuit, comprising correcting a first pattern by using process parameter information to obtain a second pattern, the first pattern being one which corresponds to a design layout of the semiconductor integrated circuit, predicting a third pattern by using the process parameter information, the third pattern being one which corresponds to the second pattern and which is to be formed on a semiconductor wafer in an etching process, obtaining an evaluation value by comparing the third pattern with the first pattern, determining whether the evaluation value satisfies a preset condition, and changing the process parameter information when the evaluation value is found not to satisfy the preset condition.
    Type: Application
    Filed: March 12, 2003
    Publication date: January 22, 2004
    Inventors: Toshiya Kotani, Satoshi Tanaka, Koji Hashimoto, Soichi Inoue, Ichiro Mori
  • Publication number: 20040010385
    Abstract: An inspection method, includes obtaining a first optical characteristic of a projection optical system by transferring an image of an aberration measurement unit of a photomask on a first resist film coated on a first wafer by use of a first polarized exposure light; obtaining a second optical characteristic of the projection optical system by transferring the image of the aberration measurement unit on a second resist film coated on a second wafer by use of a second exposure light having a polarization state different from the first exposure light; and calculating a difference between the first and second optical characteristics.
    Type: Application
    Filed: July 9, 2003
    Publication date: January 15, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya Fukuhara, Satoshi Tanaka, Soichi Inoue
  • Publication number: 20030219655
    Abstract: A photomask has a device pattern, which has an opening portion and a mask portion, and either a focus monitor pattern or an exposure dose monitor pattern, which has an opening portion and a mask portion and which has the same plane pattern shape as at least a partial region of a device pattern. The phase difference in transmitted exposure light between the opening portion and the mask portion of the focus monitor pattern is different from that between the opening portion and the mask portion of the device pattern. The opening portion of the exposure dose monitor pattern has a different exposure dose transmittance from that of the opening portion of the device pattern.
    Type: Application
    Filed: March 26, 2003
    Publication date: November 27, 2003
    Inventors: Takumichi Sutani, Kyoko Izuha, Tadahito Fujisawa, Soichi Inoue
  • Publication number: 20030215724
    Abstract: A monitoring method, includes: delineating a monitor resist pattern on an underlying film, the monitor resist pattern having a tilted sidewall slanted to a surface of the underlying film at least at one edge of the monitor resist pattern; measuring a width of the monitor resist pattern in an orthogonal direction to a cross line of the tilted sidewall intersecting with the underlying film; delineating a monitor underlying film pattern by selectively etching the underlying film using the monitor resist pattern as a mask; measuring a width of the monitor underlying film pattern in the orthogonal direction; and obtaining a shift width in the monitor underlying film pattern from a difference between the width of the monitor resist pattern and the width of the monitor underlying film pattern.
    Type: Application
    Filed: March 24, 2003
    Publication date: November 20, 2003
    Inventors: Masafumi Asano, Nobuhiro Komine, Soichi Inoue
  • Patent number: 6622296
    Abstract: An exposure mask pattern correction method comprises preparing a unit process group which includes a plurality of unit processes to form a pattern on a substrate by using an exposure mask, the plurality of unit processes including a unit process concerning manufacture of the exposure mask, a unit process concerning lithography using the exposure mask, and a unit process concerning etching of the substrate, setting a correction rule/model to perform an optical proximity effect correction for the exposure mask by using first and second optical proximity effects data when a change is arisen in at least one of the plurality of unit processes, the first and second optical proximity effect data being data respectively concerning an optical proximity effect caused by the at least one unit process before and after the change, and performing the optical proximity effect correction for the exposure mask by using the correction rule/model.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: September 16, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hashimoto, Soichi Inoue, Satoshi Tanaka, Satoshi Usui
  • Patent number: 6610448
    Abstract: When an alignment mark and first and second overlay deviation inspection marks as well as a device pattern are successively formed on a wafer using a first photomask and a second photomask, each of the alignment mark and the overlay deviation inspection marks are formed to have a part of the device pattern or marks having sizes and shapes similar to those of the device pattern, whereby these marks receive a deviation error caused by the influence given by the aberration of the light projection optical lens used for performing the pattern transfer and an error in the following processing steps in substantially the same degree as the device pattern, and an amount of the overlay deviation error is measured correctly so as to achieve an alignment of the photomasks in a high accuracy.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: August 26, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Sato, Soichi Inoue
  • Publication number: 20030140330
    Abstract: A computer implemented method for correcting a mask pattern, includes: preparing a designed mask pattern; obtaining a rough corrected mask pattern from the designed mask pattern by applying a rough correction; and obtaining a precision corrected mask pattern from the rough corrected mask pattern by applying a precision correction using a model based correction method with a precision model that simulates a transferred image of an exposure apparatus.
    Type: Application
    Filed: December 3, 2002
    Publication date: July 24, 2003
    Inventors: Satoshi Tanaka, Soichi Inoue
  • Publication number: 20030117627
    Abstract: There is here disclosed a method for inspecting an exposure apparatus, comprising illuminating a mask, in which a mask-pattern including at least a set of a first mask-pattern and a second mask-pattern mutually different in shape is formed, from a direction in which a point located off an optical axis of an exposure apparatus is a center of illumination, and exposing and projecting an image of the mask-pattern toward an image-receiving element, and measuring a mutual relative distance between images of the first and second mask-patterns exposed and projected on the image-receiving element, thereby inspecting a state of an optical system of the exposure apparatus.
    Type: Application
    Filed: November 5, 2002
    Publication date: June 26, 2003
    Inventors: Takashi Sato, Shoji Mimotogi, Takahiro Ikeda, Soichi Inoue
  • Patent number: 6567972
    Abstract: A method for correcting a mask pattern comprising the steps of inputting a layout pattern, extracting mask patterns from this layout pattern in a range on which the optical proximity effects exert, classifying the patterns so extracted into to-be-corrected patterns subjected to a pattern correction together with an interest pattern edge correction and reference patterns whose edges are not moved, correcting only the to-be-corrected patterns collectively according to a set exposure condition so that dimensions of the transferred patterns are identical to those of the layout pattern, calculating the exposure dose at a focal position necessary for ensuring the depth of focus, and modifying a correction amount of each of the above-mentioned to-be-corrected patterns by comparing the exposure dose according to the set exposure dose condition and the exposure dose calculated by the calculation step.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: May 20, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Tanaka, Soichi Inoue
  • Publication number: 20030074646
    Abstract: A mask pattern generation method of generating a mask pattern from a designed pattern, comprising preparing the designed pattern, preparing a correction parameter, preparing a first correction library in which a plurality of pairs of an edge coordinate group and a correction value group to correct the edge coordinate group is registered, acquiring edge coordinate groups of the designed patterns, generating a second correction library in which only the plurality of pairs of an edge coordinate group agreeing with the acquired edge coordinate group and the correction value group is registered in the first correction library and simulation using the correction parameter, and correcting the designed pattern using the second correction library.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 17, 2003
    Inventors: Toshiya Kotani, Satoshi Tanaka, Soichi Inoue, Sachiko Kobayashi, Hirotaka Ichikawa
  • Patent number: 6542237
    Abstract: An exposure method forms a plurality of patterns on a substrate, which is set on a stage of an exposure apparatus, through at least one mask. The method equalizes first positional linear error components of a pattern to be formed by the mask on a first coordinate system defined on the substrate to second positional linear error components of the pattern on a second coordinate system on which the stage is moved, by correcting coordinates for moving the stage on the second coordinate system. The method is capable of aligning the boundaries of patterns with each other on the substrate, to leave only positional linear error components on the patterns. These positional linear error components are removable to leave minimum random residual errors on the patterns, and therefore, the patterns on the substrate are precisely at specified positions.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: April 1, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Suigen Kyoh, Iwao Higashikawa, Soichi Inoue
  • Patent number: 6536032
    Abstract: Disclosed herein is a method of processing exposure mask-pattern data. The method comprises the steps of performing a re-sizing process of adding a prescribed positive bias &Dgr; to design data of an exposure mask pattern, thereby forming first mask-pattern data, performing a corner process on each corner represented by the first mask-pattern data, thereby forming second mask-pattern data, and performing a re-sizing process of adding a prescribed negative bias &Dgr;′ to the second mask-pattern data, thereby forming third mask-pattern data.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: March 18, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Tanaka, Soichi Inoue
  • Patent number: 6507931
    Abstract: A method for designing a semiconductor integrated circuit is provided which comprises compacting a design layout of a semiconductor integrated circuit on the basis of a given design rule to obtain a compacted pattern, predicting a pattern to be formed at a surface area of a wafer for forming the semiconductor integrated circuit on the basis of the compacted pattern, obtaining an evaluated value by comparing the predicted pattern with the compacted pattern, deciding whether the evaluated value satisfies a predetermined condition, and modifying the design rule when the evaluated value is decided as not satisfying the predetermined condition.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: January 14, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiya Kotani, Satoshi Tanaka, Soichi Inoue
  • Publication number: 20030001155
    Abstract: A pattern forming method includes determining an allowable value of an etching conversion difference, obtaining a maximum distance between patterns generating the etching conversion difference within the allowable value, the patterns including main patterns or both main patterns and a dummy pattern, preparing a first design layout in which a first distance between the main patterns is smaller than the maximum distance, or a second design layout in which a second distance between the main patterns and the dummy pattern is smaller than the maximum distance, performing a design data conversion based on the first or second design layout to form first or second design data, and forming the main patterns by using the first design data, or forming both the main patterns and the dummy pattern by using the second design data.
    Type: Application
    Filed: June 28, 2002
    Publication date: January 2, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiya Kotani, Satoshi Tanaka, Soichi Inoue
  • Publication number: 20020192578
    Abstract: An inspection method of a mask pattern for exposure comprises using substantially the same inspection wavelength as an exposure wavelength for use in the exposure apparatus and using a detection optical system of the inspection apparatus having a numerical aperture larger than a numerical aperture of a projection optical system of the exposure apparatus to prepare image data of the mask pattern for exposure using the detection optical system and reconstructing low-ordered diffracted light distribution obtained from the mask pattern for exposure by using the image data based on information of the detection optical system. The inspection method comprises using transfer simulation in the projection optical system of the exposure apparatus to obtain an image intensity distribution obtained on a wafer from the low-ordered diffracted light distribution and judging acceptance/rejection of inspection based on the obtained image intensity distribution.
    Type: Application
    Filed: April 25, 2002
    Publication date: December 19, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Tanaka, Soichi Inoue