Patents by Inventor Srinivas D. Nemani
Srinivas D. Nemani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11934103Abstract: A method and apparatus for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes is provided herein. The method and apparatus include a transfer device and a plurality of modules. The transfer device is configured to rotate a plurality of substrates between each of the modules, wherein one module includes a heating pedestal and another module includes a cooling pedestal. One module is utilized for inserting and removing the substrates from the system. At least the heating module is able to be sealed and filled with a process volume before applying the electric field.Type: GrantFiled: February 9, 2022Date of Patent: March 19, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Douglas A. Buchberger, Jr., Dmitry Lubomirsky, John O. Dukovic, Srinivas D. Nemani
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Publication number: 20240085810Abstract: A method and apparatus for performing post-exposure bake operations is described herein. After exposure of photoresist on a substrate, the substrate is heated during a baking process to facilitate protection of the resist. The baking process is performed in a vacuum environment at sub-atmospheric pressures. After baking at reduced pressure, the substrate is cooled. The cooling process is performed at sub-atmospheric pressures. Further development of the resist is performed at ambient pressures.Type: ApplicationFiled: September 7, 2023Publication date: March 14, 2024Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Chih-An HSU, Srinivas D. NEMANI, Dmitry LUBOMIRSKY, Ellie Y. YIEH
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Patent number: 11914299Abstract: A method for enhancing the depth of focus process window during a lithography process includes applying a photoresist layer comprising a photoacid generator on a material layer disposed on a substrate, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and dynamically changing a frequency of the electric field as generated while providing the thermal energy to the photoresist layer.Type: GrantFiled: August 29, 2022Date of Patent: February 27, 2024Assignee: Applied Materials, Inc.Inventors: Huixiong Dai, Mangesh Ashok Bangar, Srinivas D. Nemani, Christopher S. Ngai, Ellie Y. Yieh
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Patent number: 11899366Abstract: Embodiments described herein relate to methods and apparatus for performing immersion field guided post exposure bake processes. Embodiments of apparatus described herein include a chamber body defining a processing volume. A pedestal may be disposed within the processing volume and a first electrode may be coupled to the pedestal. A moveable stem may extend through the chamber body opposite the pedestal and a second electrode may be coupled to the moveable stem. In certain embodiments, a fluid containment ring may be coupled to the pedestal and a dielectric containment ring may be coupled to the second electrode.Type: GrantFiled: September 7, 2021Date of Patent: February 13, 2024Assignee: Applied Materials, Inc.Inventors: Viachslav Babayan, Douglas A. Buchberger, Jr., Qiwei Liang, Ludovic Godet, Srinivas D. Nemani, Daniel J. Woodruff, Randy Harris, Robert B. Moore
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Patent number: 11901222Abstract: Generally, examples described herein relate to methods and processing systems for performing multiple processes in a same processing chamber on a flowable gap-fill film deposited on a substrate. In an example, a semiconductor processing system includes a processing chamber and a system controller. The system controller includes a processor and memory. The memory stores instructions, that when executed by the processor cause the system controller to: control a first process within the processing chamber performed on a substrate having thereon a film deposited by a flowable process, and control a second process within the process chamber performed on the substrate having thereon the film. The first process includes stabilizing bonds in the film to form a stabilized film. The second process includes densifying the stabilized film.Type: GrantFiled: February 17, 2020Date of Patent: February 13, 2024Assignee: Applied Materials, Inc.Inventors: Maximillian Clemons, Nikolaos Bekiaris, Srinivas D. Nemani
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Publication number: 20240038527Abstract: A method includes depositing a flowable film on a substrate by providing a first input flow, the first input flow including plasma effluents of a first precursor, removing a portion of the flowable film from a sidewall of a feature defined within the substrate to obtain a remaining portion of the flowable film by providing a second input flow, the second input flow including plasma effluents of a second precursor, reducing hydrogen content of the remaining portion of the flowable film to obtain a densified film by providing a third input flow, the third input flow including plasma effluents of a third precursor, and treating the densified film in accordance with a film treatment process.Type: ApplicationFiled: July 26, 2022Publication date: February 1, 2024Inventors: Bhargav S. Citla, Srinivas D. Nemani, Purvam Modi, Ellie Y. Yieh
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Patent number: 11880137Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.Type: GrantFiled: March 23, 2023Date of Patent: January 23, 2024Assignee: Applied Materials, Inc.Inventors: Huixiong Dai, Mangesh Ashok Bangar, Srinivas D. Nemani, Ellie Y. Yieh, Steven Hiloong Welch, Christopher S. Ngai
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Patent number: 11881411Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.Type: GrantFiled: May 4, 2021Date of Patent: January 23, 2024Assignee: Applied Materials, Inc.Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
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Patent number: 11862458Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.Type: GrantFiled: September 8, 2021Date of Patent: January 2, 2024Assignee: Applied Materials, Inc.Inventors: Bhargav S. Citla, Soham Asrani, Joshua Rubnitz, Srinivas D. Nemani, Ellie Y. Yieh
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Publication number: 20230386829Abstract: Embodiments of the disclosure relate to methods for forming silicon based gapfill within substrate features. A flowable silicon film is formed within the feature with a greater thickness on the bottom and top surfaces than the sidewall surface. An etch plasma removes the silicon film from the sidewall surface. A conversion plasma is used to convert the silicon film to a silicon based gapfill (e.g., silicon oxide). In some embodiments, the silicon film is preferentially converted on the top and bottom surface before being etched from the sidewall surface.Type: ApplicationFiled: May 27, 2022Publication date: November 30, 2023Applicant: Applied Materials, Inc.Inventors: Soham Asrani, Bhargav S. Citla, Srinivas D. Nemani, Ellie Y. Yieh
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Publication number: 20230377875Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.Type: ApplicationFiled: August 2, 2023Publication date: November 23, 2023Applicant: Applied Materials, Inc.Inventors: Bhargav S. Citla, Soham Asrani, Joshua Rubnitz, Srinivas D. Nemani, Ellie Y. Yieh
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Publication number: 20230377958Abstract: Methods for forming a transition metal material on a substrate and thermal processing such metal containing material in a cluster processing system are provided. In one embodiment, a method for a device structure for semiconductor devices includes forming a two-dimensional transition metal dichalcogenide layer on a substrate in a first processing chamber disposed in a cluster processing system, thermally treating the two-dimensional transition metal dichalcogenide layer to form a treated metal layer in a second processing chamber disposed in the cluster processing system, and forming a capping layer on the treated metal layer in a third processing chamber disposed in the cluster processing system.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Inventors: Keith Tatseun WONG, Srinivas D. NEMANI, Ellie Y. YIEH
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Patent number: 11815816Abstract: A method and apparatus for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes is provided herein. The method and apparatus include an electrode assembly and a base assembly. The electrode assembly includes a permeable electrode. The base assembly includes one or more process fluid channels disposed around a circumference of the substrate support surface and configured to fill a process volume with a process fluid. The electrode assembly is configured to apply an electric field to a substrate disposed within the process volume.Type: GrantFiled: February 15, 2021Date of Patent: November 14, 2023Assignee: Applied Materials, Inc.Inventors: Douglas A Buchberger, Jr., Dmitry Lubomirsky, John O. Dukovic, Srinivas D. Nemani
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Patent number: 11798606Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.Type: GrantFiled: May 24, 2021Date of Patent: October 24, 2023Assignee: APPLIED MATERIALS, INC.Inventors: John O. Dukovic, Srinivas D. Nemani, Ellie Y. Yieh, Praburam Gopalraja, Steven Hiloong Welch, Bhargav S. Citla
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Patent number: 11756828Abstract: Methods for forming a transition metal material on a substrate and thermal processing such metal containing material in a cluster processing system are provided. In one embodiment, a method for a device structure for semiconductor devices includes forming a two-dimensional transition metal dichalcogenide layer on a substrate in a first processing chamber disposed in a cluster processing system, thermally treating the two-dimensional transition metal dichalcogenide layer to form a treated metal layer in a second processing chamber disposed in the cluster processing system, and forming a capping layer on the treated metal layer in a third processing chamber disposed in the cluster processing system.Type: GrantFiled: November 20, 2018Date of Patent: September 12, 2023Assignee: Applied Materials, Inc.Inventors: Keith Tatseun Wong, Srinivas D. Nemani, Ellie Y. Yieh
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Patent number: 11756803Abstract: A high-pressure processing system for processing a layer on a substrate includes a first chamber, a support to hold the substrate in the first chamber, a second chamber adjacent the first chamber, a foreline to remove gas from the second chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, a gas delivery system configured to increase the pressure within the first chamber to at least 10 atmospheres while the first chamber is isolated from the second chamber, an exhaust system comprising an exhaust line to remove gas from the first chamber, and a common housing surrounding both the first gas delivery module and the second gas delivery module.Type: GrantFiled: November 29, 2022Date of Patent: September 12, 2023Assignee: Applied Materials, Inc.Inventors: Qiwei Liang, Srinivas D. Nemani, Sean S. Kang, Adib Khan, Ellie Y. Yieh
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Patent number: 11749555Abstract: Embodiments of the disclosure relate to an apparatus and method for processing semiconductor substrates. In one embodiment, a processing system is disclosed. The processing system includes an outer chamber that surrounds an inner chamber. The inner chamber includes a substrate support upon which a substrate is positioned during processing. The inner chamber is configured to have an internal volume that, when isolated from an internal volume of the outer chamber, is changeable such that the pressure within the internal volume of the inner chamber may be varied.Type: GrantFiled: December 6, 2019Date of Patent: September 5, 2023Assignee: Applied Materials, Inc.Inventors: Sultan Malik, Srinivas D. Nemani, Qiwei Liang, Adib M. Khan
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Patent number: 11725274Abstract: Embodiments described herein relate to apparatus and methods for processing a substrate. In one embodiment, a cluster tool apparatus is provided having a transfer chamber and a pre-clean chamber, a self-assembled monolayer (SAM) deposition chamber, an atomic layer deposition (ALD) chamber, and a post-processing chamber disposed about the transfer chamber. A substrate may be processed by the cluster tool and transferred between the pre-clean chamber, the SAM deposition chamber, the ALD chamber, and the post-processing chamber. Transfer of the substrate between each of the chambers may be facilitated by the transfer chamber which houses a transfer robot.Type: GrantFiled: June 6, 2019Date of Patent: August 15, 2023Assignee: Applied Materials, Inc.Inventors: Tobin Kaufman-Osborn, Srinivas D. Nemani, Ludovic Godet, Qiwei Liang, Adib Khan
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Publication number: 20230229089Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.Type: ApplicationFiled: March 23, 2023Publication date: July 20, 2023Applicant: Applied Materials, Inc.Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Srinivas D. NEMANI, Ellie Y. YIEH, Steven Hiloong WELCH, Christopher S. NGAI
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Patent number: 11682556Abstract: A method of forming graphene layers is disclosed. A method of improving graphene deposition is also disclosed. Some methods are advantageously performed at lower temperatures. Some methods advantageously provide graphene layers with lower resistance. Some methods advantageously provide graphene layers in a relatively short period of time.Type: GrantFiled: February 15, 2022Date of Patent: June 20, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Jie Zhou, Erica Chen, Qiwei Liang, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh