Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.

Abstract: A method and apparatus for delivering gases to a semiconductor processing system are provided. In some embodiments, the apparatus includes a gas inlet line having an inlet valve; a gas outlet line having an outlet valve; a gas flow controller arranged to control the flow through the inlet valve; an orifice contained within at least one of the gas outlet line, the outlet valve, a chemical ampoule outlet valve, or outlet isolation valve; a chemical ampoule fluidly coupled to at least one of the gas inlet line and the gas outlet line; and a processing chamber. In some embodiments, the apparatus further includes a check valve, one or more orifices, and/or a heated divert line.

Abstract: Embodiments of the present disclosure provide a sputtering chamber with in-situ ion implantation capability. In one embodiment, the sputtering chamber comprises a target, an RF and a DC power supplies coupled to the target, a support body comprising a flat substrate receiving surface, a bias power source coupled to the support body, a pulse controller coupled to the bias power source, wherein the pulse controller applies a pulse control signal to the bias power source such that the bias power is delivered either in a regular pulsed mode having a pulse duration of about 100-200 microseconds and a pulse repetition frequency of about 1-200 Hz, or a high frequency pulsed mode having a pulse duration of about 100-300 microseconds and a pulse repetition frequency of about 200 Hz to about 20 KHz, and an exhaust assembly having a concentric pumping port formed through a bottom of the processing chamber.

Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. A method of processing a substrate is provided. The method includes applying a photoresist layer that includes a photoacid generator to a multi-layer disposed on the substrate. The multi-layer includes an underlayer. Further, the method includes exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process. A thermal energy is provided to the photoresist layer and the multi-layer in a post-exposure baking process. The multi-layer is disposed beneath the photoresist layer. An electric field or a magnetic field is applied to photoresist layer and the multi-layer while performing the post-exposure baking process. An additive within the underlayer is driven in a vertical direction into the photoresist layer. The additive assist in distribution of a photoacid throughout the photoresist layer during the post-exposure baking process.

Abstract: A graphene barrier layer is disclosed. Some embodiments relate to a graphene barrier layer capable of preventing diffusion from a fill layer into a substrate surface and/or vice versa. Some embodiments relate to a graphene barrier layer that prevents diffusion of fluorine from a tungsten layer into the underlying substrate. Additional embodiments relate to electronic devices which contain a graphene barrier layer.

Abstract: Embodiments of the present disclosure relate to forming a two-dimensional crystalline dichalcogenide by positioning a substrate in an annealing apparatus. The substrate includes an amorphous film of a transition metal and a chalcogenide. The film is annealed at a temperature from 500° C. to 1200° C. In response to the annealing, a two-dimensional crystalline structure is formed from the film. The two-dimensional crystalline structure is according to a formula MX2, M includes one or more of molybdenum (Mo) or tungsten (W) and X includes one or more of sulfur (S), selenium (Se), or tellurium (Te).

Abstract: Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10° and about 50°.

Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.

Abstract: Embodiments herein provide methods of plasma treating an amorphous silicon layer deposited using a flowable chemical vapor deposition (FCVD) process. In one embodiment, a method of processing a substrate includes plasma treating an amorphous silicon layer by flowing a substantially silicon-free hydrogen treatment gas into a processing volume of a processing chamber, the processing volume having the substrate disposed on a substrate support therein, forming a treatment plasma of the substantially silicon-free hydrogen treatment gas, and exposing the substrate having the amorphous silicon layer deposited on a surface thereof to the treatment plasma. Herein, the amorphous silicon layer is deposited using an FCVD process.

Abstract: Methods for depositing desired materials formed on certain locations of a substrate with desired materials using a selective deposition process for semiconductor applications are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes supplying a first gas comprising a hydroxy terminated hydrocarbon containing material to a surface of a substrate, selectively forming a passivation layer on a first material of the substrate, selectively forming self assembled monolayers on a second material of the substrate, and selectively forming a material layer on the passivation layer.

Abstract: An electrostatic chucking force tool is described that may be used on workpiece carriers for micromechanical and semiconductor processing. One example includes a workpiece fitting to hold a workpiece when gripped by an electrostatic chucking force by an electrostatic chuck, an arm coupled to the workpiece fitting to pull the workpiece through the workpiece fitting laterally across the chuck, and a force gauge coupled to the arm to measure an amount of force with which the workpiece fitting is pulled by the arm in order to move the workpiece.

Abstract: A deposited amorphous carbon film includes at least 95% carbon. A percentage of sp3 carbon-carbon bonds present in the amorphous carbon film exceeds 30%, and a hydrogen content of the amorphous carbon film is less than 5%. A process of depositing amorphous carbon on a workpiece includes positioning the workpiece within a process chamber and positioning a magnetron assembly adjacent to the process chamber. The magnetron assembly projects a magnetic field into the process chamber. The method further includes providing a carbon target such that the magnetic field extends through the carbon target toward the workpiece. The method further includes providing a source gas to the process chamber, and providing pulses of DC power to a plasma formed from the source gas within the process chamber. The pulses of DC power are supplied in pulses of 40 microseconds or less, that repeat at a frequency of at least 4 kHz.

Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal, the metal cap comprising one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.

Abstract: Methods and systems relating to processes for treating a silicon nitride film on a workpiece including supporting the workpiece in a chamber, introducing an amine gas into the chamber and establishing a pressure of at least 5 atmospheres, and exposing the silicon nitride film on the workpiece to the amine gas while the pressure in the chamber is at least 5 atmospheres.

Abstract: A high-pressure processing system for processing a layer on a substrate includes a first chamber, a support to hold the substrate in the first chamber, a second chamber adjacent the first chamber, a foreline to remove gas from the second chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, a gas delivery system configured to increase the pressure within the first chamber to at least 10 atmospheres while the first chamber is isolated from the second chamber, an exhaust system comprising an exhaust line to remove gas from the first chamber, and a common housing surrounding both the first gas delivery module and the second gas delivery module.

Abstract: Embodiments of the disclosure include apparatus and methods for modifying a surface of a substrate using a surface modification process. The process of modifying a surface of a substrate generally includes the alteration of a physical or chemical property and/or redistribution of a portion of an exposed material on the surface of the substrate by use of one or more energetic particle beams while the substrate is disposed within a particle beam modification apparatus. Embodiments of the disclosure also provide a surface modification process that includes one or more pre-modification processing steps and/or one or more post-modification processing steps that are all performed within one processing system.

Abstract: The present disclosure relates to high pressure processing apparatus for semiconductor processing. The apparatus described herein include a high pressure process chamber and a containment chamber surrounding the process chamber. A high pressure fluid delivery module is in fluid communication with the high pressure process chamber and is configured to deliver a high pressure fluid to the process chamber.

Abstract: Methods for depositing silicon nitride films with higher nitrogen content are described. Certain methods comprise exposing a substrate to a silicon-nitrogen precursor and ammonia plasma to form a flowable polymer, and then curing the polymer to form a silicon nitride film. Certain methods cure the flowable polymer without the use of a UV-cure process. Also described is the film generated by the methods described above.

Abstract: A plasma reactor includes a processing chamber having a lower processing portion having an axis of symmetry and an array of cavities extending upwardly from the lower processing portion. A gas distributor couples plural gas sources to a plurality of gas inlets of the cavities, and the gas distributor includes a plurality of valves with each valve selectively connecting a respective gas inlet to one of the plural gas sources. Power is applied by an array of conductors that includes a respective conductor for each respective cavity with each conductor adjacent and surrounding a cavity. A power distributor couples a power source and the array of conductors, and the power distributor includes a plurality of switches with a switch for each respective conductor.

Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one example, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a carboxylic acid to the surface of the substrate, and forming a metal containing material selectively on a first material of the substrate. In another example, a method of forming a metal containing material on a substrate includes selectively forming a metal containing layer on a silicon material or a metal material on a substrate than on an insulating material on the substrate by an atomic layer deposition process by alternatively supplying a metal containing precursor and a water free precursor to the substrate.