Abstract: A wafer-scale x-ray detector and a method of manufacturing the same are provided. The wafer-scale x-ray detector includes: a seamless silicon substrate electrically connected to a printed circuit substrate; a chip array having a plurality of pixel pads formed on a central region thereof and a plurality of pin pads formed at edges thereof on the seamless silicon substrate; a plurality of pixel electrodes formed to correspond to the pixel pads; vertical wirings and horizontal wirings formed to compensate a difference of regions expanded towards the pixel electrodes from the pixel pads between the chip array and the pixel electrodes; a redistribution layer having an insulating layer to separate the vertical wirings and the horizontal wirings; and a photoconductor layer and a common electrode which cover the pixel electrodes on the redistribution layer.

Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate.

Abstract: A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.

Abstract: An active optical device is provided. The active optical device includes an optically variable layer having a refractive index which changes according to temperature; and a temperature control unit that controls a temperature of one or more regions of the optically variable layer.

Abstract: A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.

Abstract: A transistor may include: a gate insulting layer; a gate electrode formed on the gate insulating layer; a channel layer formed on the gate insulating layer; and source and drain electrodes that contact the channel layer. The channel layer may have a double-layer structure, including upper and lower layers. The upper layer may have a carrier concentration lower than the lower layer. A method of manufacturing a transistor may include: forming a channel layer on a substrate; forming source and drain electrodes on the substrate; forming a gate insulating layer on the substrate; and forming a gate electrode on the gate insulating layer above the channel layer. A method of manufacturing a transistor may include: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate; forming a channel layer on the gate insulating layer; and forming source and drain electrodes on the gate insulating layer.

Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate, whereby the etched bottom is made uniformly even in a deep step, the edge curvature is minimized, and a T-shape is prevented from being formed on the etched wall face to thereby improve the etching quality.

Abstract: The inverter includes a driving transistor and a loading transistor having channel regions with different thicknesses. The channel region of the driving transistor may be thinner than the channel region of the load transistor. A channel layer of the driving transistor may have a recessed region between a source and a drain which contact both ends of the channel layer. The driving transistor may be an enhancement mode transistor and the load transistor may be a depletion mode transistor.

Abstract: Large-scale X-ray detectors and methods of manufacturing the same are provided, the large-scale X-ray detectors include a photoconductor layer configured to generate electrical charges according to an incident X-ray using an entire area of the photoconductor layer, a common electrode on an upper surface of the photoconductor layer, a plurality of pixel electrodes, configured to convert the electrical charges into electrical signals, on a lower surface of the photoconductor layer and divided into a plurality of groups, and a plurality of application-specific integrated circuits (ASICs) each corresponding to one of the groups. Each ASIC is configured to process the electrical signals conveyed via the pixel electrodes in the corresponding group. The ASICs process the electrical signals so that seamless image information is collectively generated by the ASICs with respect to the entire area of the photoconductor layer.

Abstract: A nano-resonator including a beam having a composite structure may include a silicon carbide beam and/or a metal conductor. The metal conductor may be vapor-deposited on the silicon carbide beam. The metal conductor may have a density lower than a density of the silicon carbide beam.

Abstract: Example embodiments are directed to X-ray detectors including double photoconductors. According to example embodiments, the X-ray detector includes a first photoconductor on which X-rays are incident, and a second photoconductor on which X-rays transmitted through the first photoconductor are incident. The first photoconductor and the second photoconductor include a tandem structure. The first photoconductor is formed of silicon and absorbs X-rays in a low energy band, and the second photoconductor is formed of a material that absorbs X-rays in an energy band higher than the low energy band of the X-rays absorbed by silicon.

Abstract: Example embodiments are directed an X-ray detector including an oxide semiconductor transistor. The X-ray detector including the oxide semiconductor transistor includes an oxide semiconductor transistor and a signal storage capacitor in parallel to each other on a substrate. The oxide semiconductor transistor includes a channel formed of an oxide semiconductor material, and a photoconductor. A pixel electrode and a common electrode are formed on opposite surfaces of the photoconductor. The channel includes ZnO, or a compound including ZnO and at least one selected from a group consisting of gallium (Ga), indium (In), hafnium (Hf), and tin (Sn).

Abstract: Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter.

Abstract: Example embodiments provide a nonvolatile memory device that may be integrated through stacking, a stack module, and a method of fabricating the nonvolatile memory device. In the nonvolatile memory device according to example embodiments, at least one bottom gate electrode may be formed on a substrate. At least one charge storage layer may be formed on the at least one bottom gate electrode, and at least one semiconductor channel layer may be formed on the at least one charge storage layer.

Abstract: Transistors, methods of manufacturing a transistor, and electronic devices including a transistor are provided, the transistor includes a channel layer, a source and a drain respectively contacting opposing ends of the channel layer, a gate corresponding to the channel layer, a gate insulating layer between the channel layer and the gate, and a first passivation layer and a second passivation layer sequentially disposed on the gate insulating layer. The first passivation layer covers the source, the drain, the gate, the gate insulating layer and the channel layer. The second passivation layer includes fluorine (F).

Abstract: Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter.

Abstract: Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a gate insulator of which at least one surface is treated with plasma. The surface of the gate insulator may be an interface that contacts a channel layer. The interface may be treated with plasma by using a fluorine (F)-containing gas, and thus may include fluorine (F). The interface treated with plasma may suppress the characteristic variations of the transistor due to light.

Abstract: An optical touch panel may include a plurality of light-sensing areas. The plurality of light-sensing areas may be integrally formed with pixels in a display panel or may be formed on the display panel, in order to sense incident light from outside the optical touch panel. A method of driving an optical touch panel may include sensing a change in an output from a plurality of light-sensing areas between two time points and determining that there is an optical input when the change in the output is greater than or equal to a first reference value that is defined in advance. The light-sensing areas may be integrally formed with pixels in a display panel or formed on a surface of the display panel, for sensing incident light from outside the optical touch panel.

Abstract: A thin film transistor (TFT) may include a channel layer, a source electrode, a drain electrode, a protective layer, a gate electrode, and/or a gate insulating layer. The channel layer may include an oxide semiconductor material. The source electrode and the drain electrode may face each other on the channel layer. The protective layer may be under the source electrode and the drain electrode and/or may cover the channel layer. The gate electrode may be configured to apply an electric field to the channel layer. The gate insulating layer may be interposed between the gate electrode and the channel layer.

Abstract: Transistors, electronic devices including a transistor and methods of manufacturing the same are provided, the transistor includes an oxide semiconductor layer (as a channel layer) having compositions that vary in one direction. The channel layer may be an oxide layer including a first element, a second element, and Zn, which are metal elements. The amount of at least one of the first element, the second element, and Zn may change in a deposition direction of the channel layer. The first element may be any one of hafnium (Hf), yttrium (Y), tantalum (Ta), zirconium (Zr), gallium (Ga), aluminum (Al) or combinations thereof. The second element may be indium (In). The channel layer may have a multi-layered structure including at least two layers with different compositions.