Patents by Inventor Sushil Kumar

Sushil Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210019738
    Abstract: Systems and methods to perform a foreign exchange transaction between a buyer and a seller associated with an exchange network includes a request management circuit configured to receive an exchange request comprising a requested currency amount associated with a buyer, identify one or more exchange proposals comprising a second currency amount associated with one or more sellers, and perform the foreign exchange transaction based, at least in part, on the one or more exchange proposals, wherein funds from a repository associated with the exchange request are transferred to a repository associated with the one or more exchange proposals.
    Type: Application
    Filed: February 5, 2016
    Publication date: January 21, 2021
    Inventors: Kristin K. Koppelman, Carine P. Gursky, Naga Adapala, Gregg R. Napoli, Sushil Kumar Vyas
  • Patent number: 10826511
    Abstract: A pipeline analog-to-digital converter (ADC) includes a hybrid multiplying digital-to-analog converter (MDAC) that includes multiple digital-to-analog converters (DACs), an amplifier, and a conversion circuit. The multiple DACs function in a pipelined manner such that each DAC receives an analog input signal in different cycles of a clock signal and generates a corresponding analog output signal. The amplifier amplifies each analog output signal to generate a corresponding amplified analog signal in different cycles of the clock signal. The conversion circuit successively approximates each analog output signal to generate multiple digital signals. Thus, a digital output signal of the pipeline ADC is generated based on the corresponding amplified analog signal and at least one of the multiple digital signals. The pipeline ADC utilizes one cycle for performing each of sampling, conversion, and amplification operations, which results into low power consumption by the pipeline ADC.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: November 3, 2020
    Assignee: NXP B.V.
    Inventors: Sushil Kumar Gupta, Pankaj Agrawal, Ashish Panpalia
  • Publication number: 20200123630
    Abstract: A process for producing dual phase steel sheet including steps of making a liquid steel having a chemical composition in wt % of C: 0.03-0.12. Mn: 0.8-1.5. Si: <0.1, Cr: 0.3-0.7, S: 0.008 maximum, P: 0.025 maximum, Al: 0.01 to 0.1, N: 0.007 maximum. Nb: 0.005-0.035. and V: 0.06 maximum, remainder Fe; continuous casting the liquid steel into a slab; hot rolling the slab into a hot rolled sheet at finish rolling temperature (FRT) 840±30 ° C.; cooling the hot rolled sheet on the run out table at a cooling rate 40 ?70° C./s to an intermediate temperature (Tint) of 720° C.?Tint?650° C.; natural cooling the hot rolled sheet for a duration of 5-7 seconds and rapidly cooling the hot rolled sheet to transform remaining carbon enriched austenite to martensite, at cooling rate of 40-70 ° C./s to a coiling temperature below 400° C.
    Type: Application
    Filed: May 10, 2017
    Publication date: April 23, 2020
    Inventors: Appa Rao Chintha, Kundu Saurabh, Prashant Pathak, Sushil Kumar Giri, Soumendu Monia, Subhankar Das Bakshi, G. Senthil Kumar, Vinay V. Mahashabde
  • Patent number: 10630304
    Abstract: A sub-ranging analog-to-digital converter (ADC) converts an analog input signal to a digital output signal. The sub-ranging ADC includes a coarse ADC, a fine ADC, and an error correction circuit (ECC). The fine ADC includes at least three digital-to-analog converters (DACs) that are connected in a pipeline architecture. The coarse and fine ADCs receive the analog input signal in a first half cycle of a clock signal. The coarse ADC converts the analog input signal to a first digital signal in a second half cycle of the clock signal. At least one of the first through third DACs converts the analog input signal to a second digital signal in a full cycle of the clock signal. The ECC receives the first and second digital signals and generates the digital output signal.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: April 21, 2020
    Assignee: NXP B.V.
    Inventors: Ronak Prakashchandra Trivedi, Sushil Kumar Gupta, Pankaj Agrawal
  • Publication number: 20200113599
    Abstract: According to a general aspect, an insertion device includes an elongate member defining a lumen, a handle member movably coupled to the elongate member, a plunger member, at least a portion of the plunger member being disposed within the lumen defined by the elongate member, and an actuation member operatively coupled to the plunger member, the plunger member being configured to move from a first position within the lumen to a second location within the lumen in response to the actuation member being actuated.
    Type: Application
    Filed: October 9, 2019
    Publication date: April 16, 2020
    Inventors: Subodh Morey, Rajivkumar Singh, Sumit Malik, Rohit Bhardwaj, Junaid Mohammed Shaikh, Siddharth Mishra, Sushil Nagpal, Sushil Kumar, Amit Chaudhary, Arun Adhikarath Balan
  • Patent number: 10615750
    Abstract: A preamplifier circuit includes a first transconductor and a floating transconductor. The first transconductor receives a differential voltage from a sample-and-hold circuit and drives the floating transconductor. The first and floating transconductors output amplified versions of the differential voltage that are not affected by capacitive division, which makes the preamplifier circuit fast. The preamplifier circuit also has a low input capacitance because the floating transconductor is not connected to any external circuitry.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: April 7, 2020
    Assignee: NXP B.V.
    Inventors: Sushil Kumar Gupta, Hitesh Kumar Garg
  • Patent number: 10438677
    Abstract: A sample-and-hold circuit is broken down into multiple parallel modules, and an output switch, where each module includes a switch and a capacitor. Each of the switches in the modules and the output switch are controlled by different phases of a clock signal. The sample-and-hold circuit receives an input signal and operates in sample and hold modes to generate a sampled output signal.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: October 8, 2019
    Assignee: NXP B.V.
    Inventors: Sushil Kumar Gupta, Hitesh Kumar Garg
  • Patent number: 10387649
    Abstract: According to an aspect of the present disclosure, a kernel space and a user space for execution of instructions is provided in a computer system. A process executes in the user space and multiple modules execute in the kernel space, with the modules also generating events. It is then determined whether the generated events includes a set of events matching a pre-specified pattern representing a malicious process. If such as set of events is determined to be present, the process is notified as a malicious process. The steps of determining and notifying are performed in user space.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: August 20, 2019
    Assignee: Quick Heal Technologies Private Limited
    Inventors: Rohan Kumbhar, Sushil Kumar Kuchan
  • Patent number: 10382083
    Abstract: An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier. The receiver circuit of the e-band transceiver includes a receiver-side SMT module on which is mounted a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: August 13, 2019
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Andrea Betti-Berutto, Sushil Kumar, Shawn Parker, Jonathan L. Kennedy, Christopher Saint, Michael Shaw, James Little, Jeff Illgner
  • Patent number: 10281069
    Abstract: Flange technologies are described for a flange comprising a first and second side. Each side may include a knife edge surface disposed circumferentially around a base surface and a periphery section disposed around the knife edge surface. The knife edge surface and the periphery section are effective to define grooves therebetween. The flange may include an alloy with a relatively high thermal conductivity and yield strength. The flange may include water channels to remove heat.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: May 7, 2019
    Assignee: Brookhaven Science Associates, LLC
    Inventors: Sushil Kumar Sharma, Lewis Garth Doom, Jr., Christopher Amundsen, Muhammad Aftab Hussain, Frank A. DePaola, Frank Charles Lincoln, Charles Hetzel, Charles S. De La Parra, Paul Edward Palecek, Jr.
  • Publication number: 20190007656
    Abstract: A camera router application on a router or wireless access point can receive video streams from one more cameras in a home, office, factory or other environment having cameras. The camera router application can receive or detect an event associated with a camera. In response to detecting the event, the camera router application can determine an active screen. The camera router application can router a video stream from the camera to the active screen.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 3, 2019
    Inventors: Shaul Levi, Sushil Kumar Jha, Ana Silvia Medeira Cabrita
  • Publication number: 20180375543
    Abstract: An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifer. The receiver circuit of the e-band transceiver includes a receiver-side SMT module on which is mounted a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.
    Type: Application
    Filed: August 30, 2018
    Publication date: December 27, 2018
    Inventors: Andrea BETTI-BERUTTO, Sushil KUMAR, Shawn PARKER, Jonathan L. Kennedy, Christopher Saint, Michael Shaw, James Little, Jeff Illgner
  • Patent number: 10137887
    Abstract: A method for controlling at least one safety function for a motor vehicle includes: a step of determining seat occupancy information, which indicates whether a seat of the vehicle is occupied by a child or not, based on sensor signals originating from a seat belt buckle sensor of the seat and from a weight sensor in the seat; and a step of applying a control signal, which includes child safety settings, depending on the seat occupancy information, to an interface for at least one vehicle safety device.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: November 27, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventor: Sushil Kumar Upadhyay
  • Patent number: 10075207
    Abstract: An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier. The receiver circuit of the e-band transceiver includes a receiver-side SMT module on which is mounted a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: September 11, 2018
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Andrea Betti-Berutto, Sushil Kumar, Shawn Parker, Jonathan L. Kennedy, Christopher Saint, Michael Shaw, James Little, Jeff Illgner
  • Patent number: 10010874
    Abstract: In accordance with the present subject matter there is provided a process for catalytic decomposition of lower hydrocarbons to produce carbon oxides free hydrogen and bamboo shaped carbon nanotubes over a catalyst composition. The process for catalytic decomposition of lower hydrocarbons comprises contacting lower hydrocarbon over a catalyst composition, where the catalyst composition comprising, a catalyst, at least one modifying agent and a support material.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: July 3, 2018
    Assignees: Hindustan Petroleum Corporation Ltd., Indian Institute of Technology (IIT Delhi), Centre for High Technology (CHT)
    Inventors: Kamal Kishore Pant, Sushil Kumar Saraswat, Annaji Rajiv Kumar Tompala, Kanaparthi Ramesh, Venkata Chalapathi Rao Peddy, Venkateswarlu Choudary Nettem, Sri Ganesh Gandham
  • Patent number: 9703811
    Abstract: This disclosure relates to assessing database migrations to cloud computing systems. On example method includes determining, by a migration server including one or more hardware processors, a set of possible transactions associated with a database application based at least in part on a set of application attributes associated with the database application; generating, by the migration server, a set of application requirements associated with the set of possible transactions; and creating, by the migration server, a set of migration recommendations associated with the database application based on the set of application requirements, the set of migration recommendations configured to allow the database application to be migrated to a cloud computing system and to allow the database application to comply with the set of application requirements when executed in the cloud computing system.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: July 11, 2017
    Assignee: Accenture Global Services Limited
    Inventors: Shubhashis Sengupta, Vibhu Saujanya Sharma, Venkatesh Subramanian, Subani Bhasha Nure, Aditya Bhola, Sushil Kumar Shah, Chiranjeevi Nalam
  • Patent number: 9684586
    Abstract: An apparatus includes a memory and a processor. The memory stores a test plan, a plurality of performed steps, a configuration for a test environment in which the test was performed, and a result of the test. The processor compares the plurality of performed steps to the plurality of planned steps, compares the configuration for a first test environment and the configuration for the second test environment, and determines whether an action of the plurality of actions resulted in a failure. The processor presents a first chart, a second chart, and a third chart the results of the comparisons and determination. The processor deploys an application corresponding to the test plan if each step of the plurality of planned steps was performed during the test, if the second test environment was configured according to the configuration for the first test environment, and if the failure was fixed.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: June 20, 2017
    Assignee: Bank of America Corporation
    Inventors: Mandeep Singh Anand, Sushil Kumar, Hitendra Kumar
  • Publication number: 20170160171
    Abstract: Immunohistochemical (IHC) techniques that enable the sequential evaluation of at least seven biomarkers in one formalin-fixed paraffin-embedded (FFPE) tissue section are disclosed. The methods involve high-throughput multiplexed, quantitative IHC imaging, sequential IHC with iterative labeling, digital scanning, image coregistration and merging, and subsequent stripping of sections.
    Type: Application
    Filed: November 18, 2016
    Publication date: June 8, 2017
    Inventors: Takahiro Tsujikawa, Lisa M. Coussens, Rohan Borkar, Vahid Azimi, Sushil Kumar, Ganapati Srinivasa
  • Patent number: 9660416
    Abstract: A distributed antenna-coupling feedback scheme and specially designed distributed feedback (DFB) metallic cavity and grating for laser application and in particular to plasmonic lasers ensuring a predesigned phase condition such that a mode traveling inside a waveguide is coupled/phase-locked to a mode traveling on the top metal improving the beam quality of the laser.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 23, 2017
    Assignee: Lehigh University
    Inventors: Sushil Kumar, Chongzhao Wu
  • Publication number: 20170124327
    Abstract: According to an aspect of the present disclosure, a kernel space and a user space for execution of instructions is provided in a computer system. A process executes in the user space and multiple modules execute in the kernel space, with the modules also generating events. It is then determined whether the generated events includes a set of events matching a pre-specified pattern representing a malicious process. If such as set of events is determined to be present, the process is notified as a malicious process. The steps of determining and notifying are performed in user space.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 4, 2017
    Inventors: Rohan Kumbhar, Sushil Kumar Kuchan