Patents by Inventor Tadashi Hattori
Tadashi Hattori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 5466303Abstract: A semiconductor device, which can easily form hyper abrupt junction type junction having a desired depletion layer width or transition region width, is disclosed. A silicon oxide film is formed on the mirror polished side surface of a P-type semiconductor substrate. Then, a P-type diffusion layer is formed by means of heat treatment. In this process, impurity concentration distribution is formed in such a way that the impurity concentration distribution can abruptly decrease from the mirror polished side surface of the substrate. Following this, the oxide film is removed by etching, and hyper abrupt type PN junction is obtained by sticking the mirror polished side surface of a high impurity concentration N-type semiconductor substrate and the high impurity concentration diffusion side of the above P-type semiconductor substrate to each other in the same surface direction as that of the above P-type semiconductor substrate.Type: GrantFiled: March 24, 1995Date of Patent: November 14, 1995Assignee: Nippondenso Co., Ltd.Inventors: Hitoshi Yamaguchi, Seiji Fujino, Tadashi Hattori
-
Patent number: 5461253Abstract: A semiconductor circuit structure including a semiconductor substrate portion and at least one region provided on one main surface thereof insulatedly isolated from other regions provided on the same surface, by burying means made of an oxide film, the burying means including a bottom flat portion and at least one side wall portion provided at least in the vicinity of an edge portion of and integrally formed with the bottom flat portion, thereby a semiconductor circuit structure provided with a plurality of insulatedly isolated regions on a main surface thereof and having a high withstand voltage can be obtained in a short production process.Type: GrantFiled: July 7, 1994Date of Patent: October 24, 1995Assignee: Nippon Steel Inc.Inventors: Kazuhiro Tsuruta, Seizi Huzino, Mitutaka Katada, Tadashi Hattori, Masami Yamaoka
-
Patent number: 5449928Abstract: A pseudomorphic HEMT of a structure which prevents the distribution of 2DEG in the channel layer from being concentrated near the hetero-interface relative to a doping layer and which, at the same time, enables the thickness of the channel layer to which distortion is imparted to be decreased. In an n-InAlAs/InGaAs pseudomorphic structure grown on an InP substrate 1, an InGaAs spacer layer 4 having an In composition ratio smaller than that of an InGaAs channel layer 3 is inserted in an InAlAs/InGaAs hetero-interface. The InGaAs channel layer 3 has an In composition ratio of 0.80 to exhibit a high mobility. Another InAlAs buffer layer 2, spacer layer 5 and doping layer 6 have an In composition ratio of 0.52 which is in lattice-match with the substrate, and InGaAs spacer layer 4 and cap layer 7 have an In composition ratio of 0.53 which is in lattice-match with the substrate. This constitution makes it possible to control the two-dimensional electron gas and to further increase the mobility.Type: GrantFiled: September 14, 1993Date of Patent: September 12, 1995Assignee: Nippondenso Co., Ltd.Inventors: Kazuoki Matsugatani, Takashi Taguchi, Yoshiki Ueno, Tadashi Hattori
-
Patent number: 5421953Abstract: Bodies of at least one material are held in a contacting holder 12 in a vacuum chamber. The surfaces of the bodies are cleaned by a low energy ion etching. Water vapor from a pure water bottle is supplied through a nozzle as a water molecule beam so that water molecules and hydroxide groups are chemically adsorbed on the surfaces of the bodies. A plasma beam or microwaves are applied to the surfaces of the bodies to remove the water molecules and leave only hydroxide groups remaining on the surfaces. The holder is operated to bring the surfaces of the bodies into contact with each other, to thereby obtain direct bonding of the bodies.Type: GrantFiled: February 16, 1994Date of Patent: June 6, 1995Assignee: Nippondenso Co., Ltd.Inventors: Masao Nagakubo, Seiji Fujino, Kouji Senda, Tadashi Hattori
-
Patent number: 5420546Abstract: A digitally controllable oscillator is provided with a variable-frequency ring oscillator including an odd number of inverting circuits connected together in a ring formation. The oscillator has a pulse circulation device to circulate a pulse signal through the inverters to introduce some delay in the signal. Digital data is produced by a data controller device. A counter is connected to the pulse circulation device and counts the number of times the pulse signal circulates through the inverters. A pulse is generated at a desired frequency based upon the counter's output and the introduced delay. A control device determines which of a plurality of delay signals is applied to the circuit that generates the pulse at the desired frequency.Type: GrantFiled: May 27, 1994Date of Patent: May 30, 1995Assignee: Nippondenso Co., Ltd.Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Tadashi Hattori
-
Patent number: 5397420Abstract: A micro machining apparatus forms a high-aspect structure having an optional depth in a workpiece at low cost. The apparatus applies high-frequency electric power to the workpiece and a machining electrode, to form a plasma zone in the vicinity of the leading end of the machining electrode. The apparatus guides a reactive gas into the plasma zone to activate the gas. The activated gas is adsorbed by the surface of the workpiece that faces the leading end of the machining electrode. The adsorbed gas reacts with the material of the workpiece and locally etches off the surface of the workpiece. A feed mechanism of the apparatus feeds the machining electrode toward the workpiece according to the progress of the etching, thereby forming a trench in the workpiece.Type: GrantFiled: August 27, 1992Date of Patent: March 14, 1995Assignee: Nippondenso Co., Ltd.Inventors: Nobuyoshi Sakakibara, Takayuki Tominaga, Michio Hisanaga, Tadashi Hattori, Yoshitaka Gotoh, Naohito Mizuno
-
Patent number: 5396247Abstract: A pulse circulating circuit includes inverting circuits each for inverting an input signal and outputting an inversion of the input signal. A time of signal inversion by each of the inverting circuits varies in accordance with a power supply voltage applied thereto. One of the inverting circuits constitutes an inverting circuit for starting which is controllable in inversion operation. The pulse circulating circuit circulates a pulse signal therethrough after the inverting circuit for starting starts to operate. An input terminal subjected to an analog voltage signal is connected to power supply lines of the respective inverting circuits for applying the analog voltage signal to the inverting circuits as a power supply voltage fed thereto. A counter serves to count a number of times of complete circulation of the pulse signal through the pulse circulating circuit.Type: GrantFiled: March 15, 1993Date of Patent: March 7, 1995Assignee: Nippondenso Co., Ltd.Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Tadashi Hattori
-
Patent number: 5369333Abstract: A thin film EL display element that excels in luminous efficiency, is stable, and has a superior service life, is provided. The thin film EL display element comprises a lower electrode, a first insulating film, a luminescent film, a second insulating layer, and an upper electrode formed on an insulating base substrate in this order; the second insulating layer comprises a thin film that is adjacent to the luminescent layer. The thin film comprises a sulfide or a selenide that does not form any sulfate or selenate.Type: GrantFiled: September 29, 1992Date of Patent: November 29, 1994Assignees: Nippondenso Co., Ltd., Research Development Corporation of JapanInventors: Kazuhiro Inoguchi, Masayuki Suzuki, Nobuei Ito, Tadashi Hattori
-
Patent number: 5357073Abstract: An electrode for electrical discharge machining. This spark-machining electrode improves the accuracy at which the workpiece is machined by electrical discharge machining. The electrode can dispense with a mechanism which scans the spark-machining electrode or the workpiece. A plurality of needlelike electrodes are formed on the surface of the spark-machining electrode. The needlelike electrodes are so arranged that they are present in craters created by their respective adjacent needlelike electrodes. The plural electrodes form a group. The shape of the surface of this group is formed according to the desired shape to be formed in the workpiece. Art electric discharge occurs mainly at the tips of the needlelike electrodes and so the capacitance is smaller than the capacitance of the prior art flat-plate electrode. Also, the energy of a single electric discharge can be reduced.Type: GrantFiled: March 8, 1993Date of Patent: October 18, 1994Assignee: Nippondenso Co., Ltd.Inventors: Takayuki Tominaga, Michio Hisanaga, Tadashi Hattori
-
Patent number: 5334870Abstract: A CMIS transistor suitable for device miniaturization, elimination of degradation of operational characteristics by hot carrier effect, and elimination of decrease of threshold voltage caused by short channel effect, includes a laterally spreading N-type diffusion region having an impurity concentration level higher than P-type and N-type wells but lower than source and drain regions, such that the N-type diffusion region extends laterally into a part located immediately below an edge of an insulating gate and has a depth smaller than a depth of the source and drain regions. The device is thereby capable of increasing the width of depletion layer at the bottom of the source and drain regions while maintaining effectiveness as a punch-through stopper. Thereby, the junction capacitance at the source and drain regions is reduced and the operational speed of the device improved in the P-channel transistor part in the device.Type: GrantFiled: April 16, 1993Date of Patent: August 2, 1994Assignee: Nippondenso Co. Ltd.Inventors: Mitsutaka Katada, Hidetoshi Muramoto, Seizi Fuzino, Tadashi Hattori, Katsunori Abe
-
Patent number: 5331294Abstract: A digitally controllable oscillator is provided with a variable-frequency ring oscillator comprising an odd number of inverting circuits connected to each other in a ring. The frequency of the output signal of the ring oscillator is determined by a digital input signal specifying the frequency of the output signal of the ring oscillator. The number of times of circulation of a pulse signal through the ring oscillator is counted. A pulse generator generates a pulse signal upon the coincidence of the counted number of times of circulation of the pulse signal through the ring oscillator with a number corresponding to the digital input signal. A series of these operations is repeated to make the pulse generator generate pulse signals successively at a period corresponding to the digital input signal.Type: GrantFiled: October 2, 1992Date of Patent: July 19, 1994Assignee: Nippondenso Co., Ltd.Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Tadashi Hattori
-
Patent number: 5311041Abstract: A thin film transistor having an inverted stagger type structure is formed on a substrate. A gate film having a gate electrode portion is formed on the substrate. A gate insulating film is formed on the gate electrode portion of the gate film such that the gate insulating film is located entirely inside a perimeter defied by the outer edges of the gate electrode portion. A polycrystalline semiconductor film, which is an active layer of the transistor, is formed on the gate insulating film such that it is entirely inside a perimeter defined by the outer edges of the gate insulating layer. The polycrystalline semiconductor film, gate insulating film and gate film are selectively photoetched after being formed on the substrate. Source and drain electrode films are formed so that the electrode films electrically connect with the polycrystalline semiconductor film.Type: GrantFiled: March 5, 1992Date of Patent: May 10, 1994Assignee: Nippondenso Co., Ltd.Inventors: Takayuki Tominaga, Nobuyoshi Sakakibara, Yuji Hasebe, Tadashi Hattori
-
Patent number: 5304899Abstract: A system for supplying energy to a microrobot disposed within a piping system for inspection or repair. The system comprises a microwave transmission section for transmitting as energy a microwave to the robot within the piping system. The microwave transmission section is arranged to transmit the microwave having a frequency equal to or higher than a frequency determined in correspondence with an inner diameter of a pipe of the piping system in which the microrobot is disposed. The microrobot receives the transmitted microwave to convert it into an electric power for operation. This arrangement can ensure a smooth operation of the microrobot within a small-sized pipe because the microrobot is not connected to the transmission section through an electric connection.Type: GrantFiled: August 28, 1992Date of Patent: April 19, 1994Assignee: Nippondenso Co., Ltd.Inventors: Kunihiko Sasaki, Masao Kodera, Tadashi Hattori
-
Patent number: 5204282Abstract: A semiconductor circuit structure including a semiconductor substrate portion and at least one region provided on one main surface thereof insulatedly isolated from other regions provided on the same surface, by an burying means made of an oxide film, the burying means including a bottom flat portion and at least one side wall portion provided at least in the vicinity of an edge portion of and integrally formed with the bottom flat portion, thereby a semiconductor circuit structure provided with a plurality of insulatedly isolated regions on a main surface thereof and having a high withstand voltage can be obtained in a short production process.Type: GrantFiled: June 29, 1990Date of Patent: April 20, 1993Assignee: Nippon Soken, Inc.Inventors: Kazuhiro Tsuruta, Seizi Huzino, Mitutaka Katada, Tadashi Hattori, Masami Yamaoka
-
Patent number: 5153700Abstract: Semiconductor chips are mounted in a supporting semiconductor substrate, with matching anisotropic (crystal plane) faces on the chips and substrate. The chips may extend above the substrate to facilitate connection together.Type: GrantFiled: January 22, 1991Date of Patent: October 6, 1992Assignees: Nippondenso Co., Ltd., Nippon Soken Inc.Inventors: Fumio Ohara, Toshiyuki Kawai, Nobuyoshi Sakakibara, Seizi Huzino, Tadashi Hattori, Kazunori Kawamoto
-
Patent number: 5134371Abstract: A magnetic detection device including at least one oscillator circuit having a magnetoresistance element which converts a change of magnetism detected into a digital signal and a comparator for comparing the digitalized oscillating frequency of the oscillator circuit with another digitalized oscillating frequency generated from another oscillating circuit by taking a ratio thereof or by detecting a phase difference between the pulse signals. Utilizing the magnetic detection device, the amount of change of magnetism can be stably detected with a high accuracy within a wide range of ambient usage temperatures.Also, a physical quantity detection device including the magnetic detection device which can detect any physical quantity with a high accuracy.Type: GrantFiled: January 18, 1990Date of Patent: July 28, 1992Assignees: Nippondenso Co., Ltd., Nippon Soken, Inc.Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Muneaki Matsumoto, Tadashi Hattori, Kouichi Hoshino, Masanori Ohsawa, Katsumi Nakamura
-
Patent number: 5099788Abstract: A method and apparatus for forming a diamond film, has a casing in which vacuum is maintained at a predetermined value. A substrate is disposed within the casing so that the diamond film is formed thereon. A gas plasma generator for generating a gas plasma near the substrate from a plasma source gas and a carbon source gas by an arc discharge is provided within the casing. A detector detects a factor which is related to a change in a surface temperature of the diamond film, and an electronic controller controls in response to the detected factor the surface temperature of the diamond film so as to maintain such temperature near a predetermined optimal value for forming the diamond film. As the surface temperature is maintained near the optimal value by a feedback control, high purity diamond film is obtained irrespective of the thickness or the forming time thereof.Type: GrantFiled: July 3, 1990Date of Patent: March 31, 1992Assignee: Nippon Soken, Inc.Inventors: Nobuei Ito, Minoru Yamamoto, Satoshi Nakamura, Tadashi Hattori
-
Patent number: 5094878Abstract: A device for synthesizing a diamond at a high synthesis speed and obtaining an improved purity of diamond is provided, and is characterized by having a vacuum vessel maintained under a predetermined vacuum; a positive electrode and a negative electrode arranged within the vacuum vessel so as to be opposed to each other; an arc discharge power source electrically connected to the positive electrode and the negative electrode and applying a predetermined power to cause an arc discharge in a space between the positive electrode and the negative electrode; a gas supply source which generates a gas plasma by flowing a plasma source gas over the arc discharge, and blowing a resulting gas plasma containing a carbon source gas over a substrate arranged downstream thereof; an electrical field application power source for applying an electrical field between an area at which the gas plasma is generated and the substrate, to give the substrate a higher potential and thereby provide a flow of a predetermined amount of cuType: GrantFiled: June 19, 1990Date of Patent: March 10, 1992Assignee: Nippon Soken, Inc.Inventors: Minoru Yamamoto, Satoshi Nakamura, Nobuei Ito, Tadashi Hattori
-
Patent number: 5008149Abstract: A ceramic substrate and a metallic layer formed thereon are bonded closely by means of a bonding layer formed between the ceramic substrate and the metallic layer. The ceramic substrate comprises either alumina or a ceramic containing alumina, and the metallic layer comprises either molybdenum (Mo) or an alloy composed of molybdenum (Mo) and at least one of titanium (Ti), zirconium (Zr) and niobium (Nb).Type: GrantFiled: November 22, 1988Date of Patent: April 16, 1991Assignees: Kabushiki Kaisha Toyota Chuo Kenkyusho, Nippon Soken Inc.Inventors: Yasunori Taga, Hideya Yamadera, Keiji Aoki, Tadashi Hattori
-
Patent number: 4992846Abstract: In a method of producing a semiconductor device, an amorphous silicon layer is deposited on a polycrystalline silicon layer formed on an insulator layer (SiO.sub.2). Ions are implanted into the amorphous silicon layer while heat treating the amorphous silicon layer at a low temperature thereby forming a solid-phase growth layer, and a transistor is formed of the solid-phase growth layer.Type: GrantFiled: July 9, 1990Date of Patent: February 12, 1991Assignee: Nippon Soken, Inc.Inventors: Nobuyoshi Sakakibara, Mitutaka Katada, Seizi Huzino, Tadashi Hattori