Patents by Inventor Tae-Hoon Yang

Tae-Hoon Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160326553
    Abstract: The invention is directed to a non-naturally occurring microbial organism comprising a first attenuation of a succinyl-CoA synthetase or transferase and at least a second attenuation of a succinyl-CoA converting enzyme or a gene encoding a succinate producing enzyme within a multi-step pathway having a net conversion of succinyl-CoA to succinate.
    Type: Application
    Filed: December 23, 2014
    Publication date: November 10, 2016
    Applicant: GENOMATICA, INC.
    Inventors: Anthony P. BURGARD, Robin E. OSTERHOUT, Stephen J. VAN DIEN, Priti PHARKYA, Tae Hoon YANG, Jungik CHOI
  • Patent number: 9411376
    Abstract: A display module may include a flexible panel that is bent in a direction such that a compressive stress is exerted on a display unit within a housing.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: August 9, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Tae-Hyeog Jung, Tae-Hoon Yang, Ki-Yong Lee, Sang-Wol Lee
  • Publication number: 20160079338
    Abstract: An organic light emitting diode display includes: a substrate including a first and a second gate electrode formed over a first and a second region, respectively, a first and a second gate insulator formed on the first and the second gate electrode, respectively, a first and a second semiconductor layer formed on the first and the second gate insulator, respectively, the first semiconductor layer including a first channel region, the second semiconductor layer including a second channel region, an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers, a first and a second etching stop layer formed over the first and second channel regions, respectively, and surrounded by the interlayer insulator, and a first and a second source electrode and a first and a second drain electrode contacting the first and the second semiconductor layer, respectively, through the interlayer insulator.
    Type: Application
    Filed: November 19, 2015
    Publication date: March 17, 2016
    Inventors: Kyu-Sik Cho, Won-Kyu Lee, Tae-Hoon Yang, Byoung-Kwon Choo, Sang-Ho Moon, Bo-Kyung Choi, Yong-Hwan Park, Joon-Hoo Choi, Min-Chul Shin, Yun-Gyu Lee
  • Publication number: 20160048169
    Abstract: A display device includes a display panel having a bendable part and flat parts, at least one flat part disposed at each side of the bendable part; and a panel guide attached to surfaces of the flat parts of the display panel, in which the display panel is attached to the panel guide when the bendable part is in a state of being tensioned at a reference strain included in an elastic range.
    Type: Application
    Filed: April 22, 2015
    Publication date: February 18, 2016
    Inventors: Tae-Hoon YANG, So-Youn JUNG, Jae-Wan JUNG, Ki-Yong LEE, Sang-Wol LEE
  • Publication number: 20150325815
    Abstract: A display device including: a substrate configured to include a first region and a second region formed at an outer periphery of the first region; an emission layer disposed on the first region and the second region of the substrate; a polarizer disposed on the emission layer; a touch panel disposed on the polarizer; a window disposed on the touch panel; and a light blocking layer covering side surfaces of the polarizer and the touch panel and a top surface of the emission layer disposed on the second region of the substrate. The polarizer and the touch panel cover the first region of the substrate and expose the second region of the substrate.
    Type: Application
    Filed: September 18, 2014
    Publication date: November 12, 2015
    Inventors: Sung Ku KANG, Sang Wol LEE, Tae Hoon YANG
  • Publication number: 20150255282
    Abstract: A method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventors: Dong-Hyun LEE, Ki-Yong LEE, Jin-Wook SEO, Tae-Hoon YANG, Yun-Mo CHUNG, Byoung-Keon PARK, Kil-Won LEE, Jong-Ryuk PARK, Bo-Kyung CHOI, Byung-Soo SO
  • Patent number: 9117798
    Abstract: A thin film transistor, a method of fabricating the same, and an organic light emitting diode (OLED) display device including the same. The thin film transistor includes a substrate; a semiconductor layer disposed on the substrate and including a channel region; source/drain regions including ions and an offset region; a gate insulating layer disposed on the semiconductor layer; a gate electrode disposed on the gate insulating layer; a first insulating layer disposed on the gate electrode; a second insulating layer disposed on the first insulating layer; and source/drain electrodes disposed on the second insulating layer, and electrically connected to the source/drain regions of the semiconductor layer, respectively. The sum of thicknesses of the gate insulating layer and the first insulating layer that are on the source/drain regions is less than the vertical dispersion depth of the ions included in the source/drain regions.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: August 25, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Hyun-Gue Kim, Maxim Lisachenko, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi
  • Publication number: 20150234431
    Abstract: A display module may include a flexible panel that is bent in a direction such that a compressive stress is exerted on a display unit within a housing.
    Type: Application
    Filed: June 16, 2014
    Publication date: August 20, 2015
    Inventors: Tae-Hyeog JUNG, Tae-Hoon YANG, Ki-Yong LEE, Sang-Wol LEE
  • Patent number: 9070717
    Abstract: A method of fabricating an organic light emitting diode (OLED) display device having a thin film transistor including a polysilicon layer. The method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: June 30, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Yun-Mo Chung, Byoung-Keon Park, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Byung-Soo So
  • Patent number: 9070904
    Abstract: An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: June 30, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyu-Sik Cho, Joon-Hoo Choi, Byoung-Kwon Choo, Min-Chul Shin, Tae-Hoon Yang, Won-Kyu Lee, Yun-Gyu Lee, Bo-Kyung Choi, Yong-Hwan Park, Sang-Ho Moon
  • Patent number: 9035311
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
  • Patent number: 9034156
    Abstract: Provided is a sputtering apparatus which deposits a metal catalyst on an amorphous silicon layer at an extremely low concentration in order to crystallize amorphous silicon, and particularly minimizes non-uniformity of the metal catalyst caused by a pre-sputtering process without reducing process efficiency. This sputtering apparatus improves the uniformity of the metal catalyst deposited on the amorphous silicon layer at an extremely low concentration. The sputtering apparatus includes a process chamber having first and second regions, a metal target located inside the process chamber, a target transfer unit moving the metal target and having a first shield for controlling a traveling direction of a metal catalyst discharged from the metal target, and a substrate holder disposed in the second region to be capable of facing the metal target.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park, Yun-Mo Chung, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Byung-Soo So, Jong-Won Hong, Min-Jae Jeong, Heung-Yeol Na, Ivan Maidanchuk, Eu-Gene Kang, Seok-Rak Chang
  • Patent number: 8992749
    Abstract: Provided is a sputtering apparatus which deposits a metal catalyst on an amorphous silicon layer at an extremely low concentration in order to crystallize amorphous silicon, and particularly minimizes non-uniformity of the metal catalyst caused by a pre-sputtering process without reducing process efficiency. This sputtering apparatus improves the uniformity of the metal catalyst deposited on the amorphous silicon layer at an extremely low concentration. The sputtering apparatus includes a process chamber having first and second regions, a metal target located inside the process chamber, a target transfer unit moving the metal target and having a first shield for controlling a traveling direction of a metal catalyst discharged from the metal target, and a substrate holder disposed in the second region to be capable of facing the metal target.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: March 31, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park, Yun-Mo Chung, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Byung-Soo So, Jong-Won Hong, Min-Jae Jeong, Heung-Yeol Na, Ivan Maidanchuk, Eu-Gene Kang, Seok-Rak Chang
  • Patent number: 8980663
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are disclosed.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: March 17, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Won-Kyu Lee, Kyu-Sik Cho, Tae-Hoon Yang, Byoung-Kwon Choo, Sang-Ho Moon, Bo-Kyung Choi, Yong-Hwan Park, Joon-Hoo Choi, Min-Chul Shin, Yun-Gyu Lee
  • Patent number: 8963153
    Abstract: A thin film transistor (TFT) and an organic light emitting display device having the same are disclosed. In one embodiment, a TFT includes a gate electrode formed on a substrate. A gate insulating layer is formed on the substrate having the gate electrode. An active layer is formed on the gate insulating layer. A source electrode is formed over the active layer. A drain electrode is formed to substantially surround at least three surfaces of the source electrode on the active layer.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: February 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Kwon Choo, Kyu-Sik Cho, Won-Kyu Lee, Yong-Hwan Park, Sang-Ho Moon, Tae-Hoon Yang, Joon-Hoo Choi, Min-Chul Shin, Bo-Kyung Choi, Yun-Gyu Lee
  • Patent number: 8927991
    Abstract: An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: January 6, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyu-Sik Cho, Joon-Hoo Choi, Byoung-Kwon Choo, Min-Chul Shin, Tae-Hoon Yang, Won-Kyu Lee, Yun-Gyu Lee, Bo-Kyung Choi, Yong-Hwan Park, Sang-Ho Moon
  • Publication number: 20140363936
    Abstract: A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, and source and drain electrodes insulated from the gate electrode and partially connected to the semiconductor layer, wherein the semiconductor layer is formed from a polycrystalline silicon layer crystallized by a metal catalyst and the metal catalyst is removed by gettering using an etchant. In addition, the OLED display device includes an insulating layer disposed on the entire surface of the substrate, a first electrode disposed on the insulating layer and electrically connected to one of the source and drain electrodes, an organic layer, and a second electrode.
    Type: Application
    Filed: June 12, 2014
    Publication date: December 11, 2014
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Maxim Lisachenko, Bo-Kyung Choi, Dae-Woo Lee, Kil-Won Lee, Dong-Hyun Lee, Jong-Ryuk Park, Ji-Su Ahn, Young-Dae Kim, Heung-Yeol Na, Min-Jae Jeong, Yun-Mo Chung, Jong-Won Hong, Eu-Gene Kang, Seok-RaK Chang, Jae-Wan Jung, Sang-Yon Yoon
  • Patent number: 8894768
    Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Heung-Yeol Na, Tae-Hoon Yang, Yun-Mo Chung, Eu-Gene Kang, Seok-Rak Chang, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Ivan Maidanchuk, Byung-Soo So, Jae-Wan Jung
  • Patent number: 8890165
    Abstract: A method of forming a polycrystalline silicon layer, a thin film transistor (TFT), an organic light emitting diode (OLED) display device having the same, and methods of fabricating the same. The method of forming a polycrystalline silicon layer includes providing a substrate, forming a buffer layer on the substrate, forming an amorphous silicon layer on the buffer layer, forming a groove in the amorphous silicon layer, forming a capping layer on the amorphous silicon layer, forming a metal catalyst layer on the capping layer, and annealing the substrate and crystallizing the amorphous silicon layer into a polycrystalline silicon layer.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 18, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Maxim Lisachenko, Byoung-Keon Park, Kil-Won Lee, Jae-Wan Jung
  • Publication number: 20140308445
    Abstract: A deposition apparatus, and a canister for the deposition apparatus capable of maintaining a predetermined amount of source material contained in a reactive gas supplied to a deposition chamber when the source material is deposited on a substrate by atomic layer deposition includes a main body, a source storage configured to store a source material, a heater disposed outside the main body, and a first feed controller configured to control the source material supplied to the main body from the source storage.
    Type: Application
    Filed: June 27, 2014
    Publication date: October 16, 2014
    Inventors: Heung-Yeol Na, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Eu-Gene Kang, Seok-Rak Chang, Tae-Hoon Yang, Yun-Mo Chung, Byung-Soo So, Byoung-Keon Park, Ivan Maidanchuk, Dong-Hyun Lee, Kii-Won Lee, Won-Bong Baek, Jong-Ryuk Park, Bo-Kyung Choi, Jae-Wan Jung