Patents by Inventor Tai Lin

Tai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11917322
    Abstract: An optical module including a light source and an optical sensor is provided. The optical sensor includes a pixel matrix and an opaque layer. The pixel matrix includes a plurality of unblocked pixels, a plurality of first pixels and a plurality of second pixels. The opaque layer covers upon a first region, which is a part of each first pixel, and upon a second region, which is a part of each second pixel, but does not cover upon the unblocked pixels, wherein the first region and the second region are symmetrically arranged in a first direction, and uncovered regions of the first pixels and the second pixels are arranged to be larger at a pixel edge than at a pixel center.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: February 27, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Jung-Tai Lin, En-Feng Hsu
  • Patent number: 11908939
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen
  • Publication number: 20240033512
    Abstract: An external neurostimulator includes a housing including a base housing and a top housing, a power source, a pulse generator, and a first and second series of spring-loaded pins electrically coupled to the pulse generator. The top housing includes a central portion, a first side door hingedly coupled to a first side of the central portion, and a second side door hingedly coupled to a second side of the central portion. Each of the first side door and the second side door include a channel formed thereon that is configured to directly receive a proximal end portion of an implantable lead. Each channel includes a series of longitudinally spaced-apart openings formed on the first side door and the second side door, respectively. The first and second series of spring-loaded pins extend through the series of longitudinally spaced-apart openings of the channel on the first and second side doors, respectively.
    Type: Application
    Filed: March 25, 2022
    Publication date: February 1, 2024
    Inventors: Apratim DIXIT, Ivan TZVETANOV, Cameron KARAMIAN, Ivan Wei Tai LIN
  • Publication number: 20240030073
    Abstract: In a method of patterning an integrated circuit, test layer thickness variation data is received when a test layer with a known thickness disposed over a test substrate undergoes tilted angle plasma etching. Overlay offset data per substrate locations caused by the tilted angle plasma etching is determined. The overlay offset data is determined based on the received thickness variation data. The overlay offset data is associated with an overlay between first circuit patterns of a first layer on the semiconductor substrate and corresponding second circuit patterns of a second layer disposed over the first layer on the substrate. A location of the substrate is adjusted based on the overlay offset data during a lithography operation to pattern a resist layer over the second layer. The second layer is patterned based on the projected layout patterns of the reticle and using the tilted angle plasma etching.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 25, 2024
    Inventors: Wei-De HO, Pei-Sheng Tang, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin, Chen-Jung Wang
  • Patent number: 11846881
    Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, a photo catalytic layer disposed on the capping layer, and an absorber layer disposed on the photo catalytic layer and carrying circuit patterns having openings. Part of the photo catalytic layer is exposed at the openings of the absorber layer, and the photo catalytic layer includes one selected from the group consisting of titanium oxide (TiO2), tin oxide (SnO), zinc oxide (ZnO) and cadmium sulfide (CdS).
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Huang Chen, Chi-Yuan Sun, Hua-Tai Lin, Hsin-Chang Lee, Ming-Wei Chen
  • Publication number: 20230402277
    Abstract: A method includes depositing a dielectric layer over a semiconductor substrate; forming a first photoresist layer over the dielectric layer; patterning the first photoresist layer to form through holes, such that a first portion of the first photoresist layer between a first one and a second one of the through holes has a less height than a second portion of the first photoresist layer between the first one and a third one of the through holes; forming a spacer on the first portion of the first photoresist layer; performing an etching process on the dielectric layer to form via holes while the spacer remains covering the first portion of the first photoresist layer; forming a plurality of metal vias in the via holes.
    Type: Application
    Filed: June 12, 2022
    Publication date: December 14, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta CHEN, Han-Wei WU, Yuan-Hsiang LUNG, Hua-Tai LIN
  • Patent number: 11832897
    Abstract: A surgical navigation method includes selecting one or more two-dimensional images from a three-dimensional image. The method further includes adjusting a portion of the two-dimensional images along a viewing direction. The method also includes superimposing the portion of the two-dimensional images along the viewing direction to form a two-dimensional superimposed image. The method further incudes guiding movement of a virtual surgical instrument into the two-dimensional superimposed image.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: December 5, 2023
    Assignee: Remex Medical Corp.
    Inventors: Chen-Tai Lin, Shan-Chien Cheng, Ying-Yi Cheng
  • Patent number: 11804410
    Abstract: A method for evaluation of thin film non-uniform stress using high order wafer warpage, the steps including measuring a net wafer warpage across a wafer area due to thin film deposition, fitting a two dimensional low-order polynomial to the wafer warpage measurements and subtracting the low-order polynomial from the net wafer warpage across the wafer area.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: October 31, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-De Ho, Han-Wei Wu, Pei-Sheng Tang, Meng-Jung Lee, Hua-Tai Lin, Szu-Ping Tung, Lan-Hsin Chiang
  • Publication number: 20230298901
    Abstract: A method for forming a semiconductor structure includes forming a pattern having first and second line features extending in a first direction on a substrate. After depositing a photoresist layer on the substrate to cover the pattern, the photoresist layer is patterned to form a cut pattern including first and second cut features exposing portions of the respective first and second line features. In a top view, at least one of the first and second cut features is asymmetrically arranged with respect to a central axis of a corresponding first or second line feature. At least one angled ion implantation is performed to enlarge the first and second cut features in at least one direction perpendicular to the first direction. The portions of the first and second line features exposed by the respective first and second cut features are then removed.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Inventors: Tzung-Hua LIN, Yi-Ko CHEN, Chia-Chu LIU, Hua-Tai LIN
  • Patent number: 11765071
    Abstract: A method for facilitating a flow from a sending end to a receiving end by multi-path transmission is introduced. The method is applied to a network controller of a software-defined network. The software-defined network includes a plurality of switches. The switches execute packet forwarding from the sending end to the receiving end. The method includes: executing, by the network controller, operations, so as for a flow from the sending end to reach the receiving end by multi-path transmission using a plurality of network paths, so as to enable the multi-path transmission to be transparent to the sending end and the receiving end. The network controller is, according to the method, configured to facilitate a transmission mechanism for multi-path stochastic switching or a transmission mechanism for multi-path stochastic switching with network coding, so as to enable multi-path transmission of the packets in one single flow and thus enhance transmission performance.
    Type: Grant
    Filed: December 13, 2020
    Date of Patent: September 19, 2023
    Assignee: NATIONAL TAIPEI UNIVERSITY OF EDUCATION
    Inventors: Yeong-Sheng Chen, Chih-Heng Ke, Tai-Lin Chin
  • Patent number: 11749570
    Abstract: In a method of patterning an integrated circuit, test layer thickness variation data is received when a test layer with a known thickness disposed over a test substrate undergoes tilted angle plasma etching. Overlay offset data per substrate locations caused by the tilted angle plasma etching is determined. The overlay offset data is determined based on the received thickness variation data. The overlay offset data is associated with an overlay between first circuit patterns of a first layer on the semiconductor substrate and corresponding second circuit patterns of a second layer disposed over the first layer on the substrate. A location of the substrate is adjusted based on the overlay offset data during a lithography operation to pattern a resist layer over the second layer. The second layer is patterned based on the projected layout patterns of the reticle and using the tilted angle plasma etching.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-De Ho, Pei-Sheng Tang, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin, Chen-Jung Wang
  • Patent number: 11748549
    Abstract: Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Min Huang, Bo-Han Chen, Cherng-Shyan Tsay, Chien-Wen Lai, Hua-Tai Lin, Chia-Cheng Chang, Lun-Wen Yeh, Shun-Shing Yang
  • Publication number: 20230260843
    Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Inventors: Ryan Chia-Jen Chen, Yih-Ann Lin, Chia Tai Lin, Chao-Cheng Chen
  • Patent number: 11688610
    Abstract: A method for forming a semiconductor structure includes forming a pattern having first and second line features extending in a first direction on a substrate. After depositing a photoresist layer on the substrate to cover the pattern, the photoresist layer is patterned to form a cut pattern including first and second cut features exposing portions of the respective first and second line features. In a top view, at least one of the first and second cut features is asymmetrically arranged with respect to a central axis of a corresponding first or second line feature. At least one angled ion implantation is performed to enlarge the first and second cut features in at least one direction perpendicular to the first direction. The portions of the first and second line features exposed by the respective first and second cut features are then removed.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzung-Hua Lin, Yi-Ko Chen, Chia-Chu Liu, Hua-Tai Lin
  • Patent number: 11670552
    Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ryan Chia-Jen Chen, Yih-Ann Lin, Chia Tai Lin, Chao-Cheng Chen
  • Publication number: 20230154021
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: obtaining a first spatial parameter of a first registered virtual camera, wherein the first registered virtual camera is positioned corresponding to a first two-dimensional image of the two-dimensional image data set; and adjusting a second spatial parameter of the first unregistered virtual camera with the first spatial parameter of the first registered virtual camera, wherein the first unregistered virtual camera is failed to be positioned corresponding to the first two-dimensional image of the two-dimensional image data set.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230149083
    Abstract: A method for registering a two-dimensional image data set of a body of interest with a three-dimensional image data set of the body of interest is discloses herein. The method includes the following steps: generating a first reconstructed image from the three-dimensional image data set with a first spatial parameter; calculating a reference similarity value according to the first reconstructed image and the two-dimensional image data set; generating a second reconstructed image from the three-dimensional image data set with a second spatial parameter; calculating a comparison similarity value according to the second reconstructed image and the two-dimensional image data set; comparing the comparison similarity value with the reference similarity value; and registering the two-dimensional image data set to the three-dimensional image data set if the comparison similarity value is not greater than the reference similarity value.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230154019
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: adjusting a first virtual camera according to a distance parameter calculated corresponding to the two-dimensional image data set and the body of interest; rotating the first virtual camera according to an angle difference between a first vector and a second vector; and rotating the first virtual camera according to an angle which is corresponding to a maximum similarity value of a plurality of similarity values calculated in accordance with reconstructed images of the three-dimensional image data set which includes one generated by the first virtual camera and the others generated by other virtual cameras with different angles or different pixels from the one generated by the first virtual camera and the two-dimensional image data set.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Publication number: 20230154018
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: defining a first vector of a registered virtual camera in a coordinate system of the three-dimensional image data et; obtaining a first transformed vector of an unregistered virtual camera in the coordinate system of the three-dimensional image data set by transforming the first vector of the registered virtual camera through at least one transforming matrix; defining a focal point of the unregistered virtual camera at a reference point of the two-dimensional image data set in the coordinate system of the three-dimensional image data set; and repositioning the unregistered virtual camera according to the first transformed vector and the focal point of the unregistered virtual camera.
    Type: Application
    Filed: July 1, 2022
    Publication date: May 18, 2023
    Applicant: Remex Medical Corp.
    Inventors: Sheng-Fang LIN, Ying-Yi CHENG, Chen-Tai LIN, Shan-Chien CHENG
  • Car
    Patent number: D1003197
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: October 31, 2023
    Assignee: Foxtron Vehicle Technologies Co., Ltd.
    Inventors: Feng-Shuen Jiang, Wen-Tai Lin, Chia-Yi Cho