Patents by Inventor Tai Lin

Tai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11392045
    Abstract: A method for manufacturing a structure on a substrate includes projecting an image of a reference pattern onto a substrate having a first patterned layer, the first patterned layer including first alignment marks and first overlay measurement marks, and the reference pattern including second alignment marks and second overlay measurement marks, aligning, based on the first alignment marks and the second alignment marks, the first patterned layer to the image of the reference pattern, obtaining a pre-overlay mapping of the first overlay measurement marks and the second overlay measurement marks, and determining compensation data indicative of information of the pre-overlay mapping of the first overlay measurement marks and the second overlay measurement marks.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: July 19, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Yun Wang, Hua-Tai Lin, Chia-Chu Liu
  • Patent number: 11392745
    Abstract: A method of manufacturing an integrated circuit (IC) includes receiving a layout of the IC having a first region interposed between two second regions. The layout includes a first layer having first features and second and third layer having second and third features in the first region. The second and third features collectively form cut patterns for the first features. The method further includes modifying the second and third features by a mask house tool, resulting in modified second and third features, which collectively form modified cut patterns for the first features. The modifying of the second and third features meets at least one of following conditions: total spacing between adjacent modified second (third) features is greater than total spacing between adjacent second (third) features, and total length of the modified second (third) features is smaller than total length of the second (third) features.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: July 19, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Lin Wu, Cheng-Cheng Kuo, Chia-Ping Chiang, Chih-Wei Hsu, Hua-Tai Lin, Kuei-Shun Chen, Yuan-Hsiang Lung, Yan-Tso Tsai
  • Publication number: 20220203615
    Abstract: A 3D printing device includes a platform, an active rotating base, a passive rotating base, and a printing head. The platform includes a first and a second moving mechanism, and the second moving mechanism further includes a bracket. The second moving mechanism is moved on the first moving mechanism, and the bracket is moved on the second mechanism. A vessel-supporting rod sleeved with a vessel is disposed between an active rotating base and a passive rotating base, the vessel-supporting rod is rotated by a motor through the active rotating base, and the printing head connected to a third moving mechanism is disposed upon the vessel-supporting rod. The bracket is moved by the first moving mechanism and the second moving mechanism to keep a pitch remain fixed between the bracket and the printing head when the printing head is moved by the third moving mechanism to execute a printing step.
    Type: Application
    Filed: April 19, 2021
    Publication date: June 30, 2022
    Inventors: CIN-HE CHANG, YUNG-TAI LIN
  • Publication number: 20220184341
    Abstract: A tube structure includes a tube body formed by polyurethane elastomer and a wire. The tube body includes an outer surface, a first end, and a second end opposite to the first end. The outer surface is connected to the first end and the second end and the outer surface is surrounded around by the wire to form a plurality of wire gaps. A first implanting section, a connecting section, and a second implanting section are sequentially disposed from the first end to the second end of the tube body. So the plurality of wire gaps respectively form with a first wire-surrounding density, a third wire-surrounding density, and a second wire-surrounding density at the first implanting section, the connecting section and the second implanting section, wherein the first wire-surrounding density is less than the third wire-surrounding density, and the second wire-surrounding density is also less than the third wire-surrounding density.
    Type: Application
    Filed: April 12, 2021
    Publication date: June 16, 2022
    Inventors: Cin-He CHANG, Yung-Tai LIN
  • Publication number: 20220102162
    Abstract: A method for forming a semiconductor structure includes forming a pattern having first and second line features extending in a first direction on a substrate. After depositing a photoresist layer on the substrate to cover the pattern, the photoresist layer is patterned to form a cut pattern including first and second cut features exposing portions of the respective first and second line features. In a top view, at least one of the first and second cut features is asymmetrically arranged with respect to a central axis of a corresponding first or second line feature. At least one angled ion implantation is performed to enlarge the first and second cut features in at least one direction perpendicular to the first direction. The portions of the first and second line features exposed by the respective first and second cut features are then removed.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 31, 2022
    Inventors: Tzung-Hua LIN, Yi-Ko CHEN, Chia-Chu LIU, Hua-Tai LIN
  • Publication number: 20220092015
    Abstract: The present specification describes a method. The method including: detection of at least one General Purpose Input Output (GPIO) pin on a Peripheral Component Interconnect Express (PCIe) device; and presenting, on the at least one GPIO pin, during a Basic Input Output System (BIOS) phase prior to a DXE phase, a signal indicating a presence of a card on the PCIe device.
    Type: Application
    Filed: June 10, 2019
    Publication date: March 24, 2022
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Ming-Chang Hung, Chia-Cheng Lin, Tai-An Lin, Tsue-yi Huang
  • Publication number: 20220094627
    Abstract: A method for facilitating a flow from a sending end to a receiving end by multi-path transmission is introduced. The method is applied to a network controller of a software-defined network. The software-defined network includes a plurality of switches. The switches execute packet forwarding from the sending end to the receiving end. The method includes: executing, by the network controller, operations, so as for a flow from the sending end to reach the receiving end by multi-path transmission using a plurality of network paths, so as to enable the multi-path transmission to be transparent to the sending end and the receiving end. The network controller is, according to the method, configured to facilitate a transmission mechanism for multi-path stochastic switching or a transmission mechanism for multi-path stochastic switching with network coding, so as to enable multi-path transmission of the packets in one single flow and thus enhance transmission performance.
    Type: Application
    Filed: December 13, 2020
    Publication date: March 24, 2022
    Inventors: YEONG-SHENG CHEN, CHIH-HENG KE, TAI-LIN CHIN
  • Patent number: 11254902
    Abstract: A cell culture module, a cell culture system and a cell culture method are provided. The cell culture module includes a casing, a first fixer, a second fixer and a sheet-shaped carrier member. The casing has a chamber and at least one inlet/outlet. The inlet/outlet communicates with the chamber. The first fixer is fixed to the casing and located in the chamber. The second fixer is disposed in the chamber and is movable relative to the first fixer. The sheet-shaped carrier member is formed by arranging a plurality of cell culture carriers, and two opposite ends of the sheet-shaped carrier member are respectively fixed to the first fixer and the second fixer. The sheet-shaped carrier member is in an open state or a folded state according to a variation in a distance between the first fixer and the second fixer due to a movement of the second fixer.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: February 22, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Ing-Kae Wang, Ying-Wen Shen, Yea-Tzy Deng, Den-Tai Lin, Yu-Bing Liou, Sing-Ying Hsieh, Wei-Zhou Yeh, Meng-Hua Yang, Hsiang-Chun Hsu, Ying-Chun Chien
  • Publication number: 20210395696
    Abstract: There is disclosed patient derived xenograft (PDXs) cells/systems/models and/or derivatives, parental (unlabelled) and/or labelled, expressing a fluorescent protein or a luciferase, or a combination thereof; for evaluating therapies comprising nasopharyngeal carcinoma (EBV positive and/or EBV negative). In another embodiment, there is disclosed a method of evaluating the efficacy of an agent used to treat nasopharyngeal carcinoma (NPC) comprising: preparing a non-human model; whereby the non-human model carries cells from NPC xenograft; labelling the cells from the NPC xenograft with gfp-luc2 marker using a lentiviral vector system; and growing the cells in short term in vitro culture; including adaptation of said culture into multi-well plates for use in further screening and/or evaluation assays; wherein the NPC xenograft is PDX.
    Type: Application
    Filed: May 29, 2019
    Publication date: December 23, 2021
    Applicant: INSTITUTE FOR MEDICAL RESEARCH
    Inventors: Alan Soo Beng KHOO, Norazlin ABDUL AZIZ, Sin Yeang TEOW, Mohd Firdaus CHE MAT, Marini MARZUKI, Tai Lin CHU, Munirah AHMAD
  • Publication number: 20210376141
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 2, 2021
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen
  • Publication number: 20210364510
    Abstract: A photonic biosensor including a biological probe disposed on a mid-infrared-transparent waveguide can be used to detect biological analytes in biological samples, using specific binding of the analyte to the probe in conjunction with absorption spectroscopy. In various embodiments, the biosensor is used for molecular diagnostics, e.g., to detect oligonucleotides or proteins associated with a coronavirus.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 25, 2021
    Inventor: Pao Tai Lin
  • Publication number: 20210364442
    Abstract: Raman spectroscopy of chemical and biological samples can be accomplished with photonic sensors amenable to chip-scale integration. In various embodiments, such a photonic sensor includes first and second optical waveguides coupled via an optical ring resonator, the ring resonator configured to resonantly enhance, and selectively couple into the second optical waveguide, a Raman scattering signal generated, when the first waveguide and/or resonator are exposed to a sample, by interaction of an analyte in the sample with excitation light coupled into the first optical waveguide.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 25, 2021
    Inventor: Pao Tai Lin
  • Patent number: 11122355
    Abstract: A headset controller takes a first touch sensor, a second touch sensor, a first pressure sensor, and a second pressure sensor as a control medium for users. The headset controller can generate four different output instructions by the users touching or pressing the operating interface. The headset controller integrates various sensing methods to generate the needed output instructions.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: September 14, 2021
    Assignee: PIXART IMAGING INC.
    Inventors: Jung-Tai Lin, En-Feng Hsu, Han-Chang Lin
  • Publication number: 20210270751
    Abstract: In a method for inspecting pattern defects, a plurality of patterns are formed over an underlying layer. The plurality of patterns are electrically isolated from each other. A part of the plurality of patterns are scanned with an electron beam to charge the plurality of patterns. An intensity of secondary electrons emitted from the scanned part of the plurality of patterns is obtained. One or more of the plurality of patterns that show an intensity of the secondary electrons different from others of the plurality of patterns are searched.
    Type: Application
    Filed: October 29, 2020
    Publication date: September 2, 2021
    Inventors: Ju-Ying CHEN, Che-Yen LEE, Chia-Fong CHANG, Hua-Tai LIN, Te-Chih HUANG, Chi-Yuan SUN, Jiann Yuan HUANG
  • Patent number: 11094825
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: August 17, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen
  • Publication number: 20210242088
    Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.
    Type: Application
    Filed: April 26, 2021
    Publication date: August 5, 2021
    Inventors: Ryan Chia-Jen Chen, Yih-Ann Lin, Chia Tai Lin, Chao-Cheng Chen
  • Publication number: 20210240907
    Abstract: Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Inventors: Chin-Min Huang, Bo-Han Chen, Cherng-Shyan Tsay, Chien-Wen Lai, Hua-Tai Lin, Chia-Cheng Chang, Lun-Wen Yeh, Shun-Shing Yang
  • Patent number: 11066412
    Abstract: Disclosed herein are novel bifunctional compounds and their uses for the treatment and/or prophylaxis of cancers.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: July 20, 2021
    Assignee: Academia Sinica
    Inventors: Te-Chang Lee, Tsann-Long Su, Tai-Lin Chen
  • Publication number: 20210203863
    Abstract: An image sensor including a pixel matrix and an opaque layer is provided. The pixel matrix includes a plurality of unblocked pixels, a plurality of first pixels and a plurality of second pixels. The opaque layer covers upon a first region, which is a part of each first pixel, and upon a second region, which is a part of each second pixel, but does not cover upon the unblocked pixels, wherein the first region and the second region are symmetrically arranged in a first direction, and uncovered regions of the first pixels and the second pixels are arranged to be larger at a pixel edge than at a pixel center.
    Type: Application
    Filed: March 10, 2021
    Publication date: July 1, 2021
    Inventors: JUNG-TAI LIN, EN-FENG HSU
  • Publication number: 20210143662
    Abstract: In one example, an electronic device may include a battery, a measuring unit to record a plurality of temperature readings associated with an operation of the battery at particular time intervals, and a control unit coupled to the measuring unit. The control unit may retrieve a set of temperature readings corresponding to a period from the plurality of temperature readings, analyze the set of temperature readings corresponding to the period to determine whether a temperature of the battery exceeds a threshold, and reduce a charging voltage of the battery in response to a determination that the temperature of the battery exceeds the threshold.
    Type: Application
    Filed: July 27, 2018
    Publication date: May 13, 2021
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jen-Hao Tai, Chien-Kun Wang, Chang-Tai Lin, Xiao-Kai Mao