Patents by Inventor Takahiro Naito

Takahiro Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170264200
    Abstract: [Object] To reduce power consumption of a DC-DC converter. [Solution] A voltage conversion circuit includes a voltage generation unit, a stop control unit, a current supply unit, and an intermittent control unit. The voltage generation unit generates an output voltage on the basis of a current when the current is supplied. The stop control unit outputs a signal for stopping the supply of the current. The current supply unit supplies the current to the voltage generation unit until the signal is output. The intermittent control unit operates the stop control unit during a supply period of the current and stops the stop control unit when the signal is output.
    Type: Application
    Filed: October 7, 2015
    Publication date: September 14, 2017
    Inventor: Takahiro Naito
  • Patent number: 9758172
    Abstract: A status determination apparatus determining a driver status in a movable body is provided. The status determination apparatus includes a behavior acquisition portion, a check portion, a determination portion, and a range change portion. The behavior acquisition portion obtains behavior information as present behavior information. The behavior information represents behavior of the movable body. The check portion collates the present behavior information with a threshold region representing a range of the behavior information at time when a driver drives absentmindedly. When the threshold region includes the present behavior information, the determination portion determines that the driver drives absentmindedly. The range change portion changes the threshold region.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: September 12, 2017
    Assignee: DENSO CORPORATION
    Inventors: Takahiro Naito, Katsuyoshi Nishii, Yoshinori Watanabe
  • Patent number: 9691739
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: June 27, 2017
    Assignee: Tessera Advanced Technologies, Inc.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 9613922
    Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: April 4, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshiyuki Kado, Takahiro Naito, Toshihiko Sato, Hikaru Ikegami, Takafumi Kikuchi
  • Publication number: 20160190102
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Application
    Filed: March 4, 2016
    Publication date: June 30, 2016
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 9318418
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: April 19, 2016
    Assignee: TESSERA ADVANCED TECHNOLOGIES, INC.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 9260013
    Abstract: An awareness level improvement device has an input portion, a determination portion, and a controller. Data related to the awareness level of the driver is input into the input portion. The determination portion determines whether the driver is in a absentminded state based on the data input into the input portion. The controller controls an execution portion to execute an application improving the awareness level of the driver when the determination portion determines that the driver is driving in the absentminded state. The application includes a body motion application that prompts the driver to perform a body motion.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: February 16, 2016
    Assignee: DENSO CORPORATION
    Inventors: Takuya Kume, Takahiro Naito, Yukari Ito, Shinya Matsunaga, Kiyotaka Taguchi, Hiroshi Morimoto
  • Publication number: 20160016589
    Abstract: A status determination apparatus determining a driver status in a movable body is provided. The status determination apparatus includes a behavior acquisition portion, a check portion, a determination portion, and a range change portion. The behavior acquisition portion obtains behavior information as present behavior information. The behavior information represents behavior of the movable body. The check portion collates the present behavior information with a threshold region representing a range of the behavior information at time when a driver drives absentmindedly. When the threshold region includes the present behavior information, the determination portion determines that the driver drives absentmindedly. The range change portion changes the threshold region.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 21, 2016
    Inventors: Takahiro NAITO, Katsuyoshi NISHII, Yoshinori WATANABE
  • Publication number: 20150294547
    Abstract: A driver condition detection apparatus, which detects a condition of a driver during a driving of a vehicle, includes a position detection unit detecting a present position of the vehicle, a position determination unit determining whether the present position of the vehicle is equal to a detection target position that is preliminarily set, a driving behavior detection unit detecting a driving behavior of the driver or a driving behavior of the vehicle when the present position of the vehicle is equal to the detection target position, and a condition detection unit detecting a condition of the driver based on the driving behavior.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 15, 2015
    Inventors: Yukari ITO, Takahiro NAITO, Takuya KUME
  • Publication number: 20150255374
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 10, 2015
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 9076700
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: July 7, 2015
    Assignee: Tessera Advanced Technologies, Inc.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20150108639
    Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
    Type: Application
    Filed: December 24, 2014
    Publication date: April 23, 2015
    Inventors: Yoshiyuki Kado, Takahiro Naito, Toshihiko Sato, Hikaru Ikegami, Takafumi Kikuchi
  • Patent number: 8952527
    Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: February 10, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshiyuki Kado, Takahiro Naito, Toshihiko Sato, Hikaru Ikegami, Takafumi Kikuchi
  • Publication number: 20150001711
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Application
    Filed: August 20, 2014
    Publication date: January 1, 2015
    Inventors: Michihiro KAWASHITA, Yasuhiro YOSHIMURA, Naotaka TANAKA, Takahiro NAITO, Takashi AKAZAWA
  • Publication number: 20140300478
    Abstract: An awareness level improvement device has an input portion, a determination portion, and a controller. Data related to the awareness level of the driver is input into the input portion. The determination portion determines whether the driver is in a absentminded state based on the data input into the input portion. The controller controls an execution portion to execute an application improving the awareness level of the driver when the determination portion determines that the driver is driving in the absentminded state. The application includes a body motion application that prompts the driver to perform a body motion.
    Type: Application
    Filed: April 4, 2014
    Publication date: October 9, 2014
    Applicant: DENSO CORPORATION
    Inventors: Takuya KUME, Takahiro NAITO, Yukari ITO, Shinya MATSUNAGA, Kiyotaka TAGUCHI, Hiroshi MORIMOTO
  • Patent number: 8816506
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: August 26, 2014
    Assignee: Tessera Advanced Technologies, Inc.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 8793060
    Abstract: A control apparatus controls an automatic stop of an engine mounted on a vehicle so as to automatically stop the engine if a predetermined stop condition is satisfied, the stop condition including a condition that a running speed of the vehicle is a prescribed speed or less. The control apparatus includes a prediction unit and a prohibition unit. The prediction unit predicts whether or not the next automatic stop time of the engine is less than a prescribed time capable of obtaining a fuel saving benefit based on a history of a vehicle stop time or an automatic stop time of the engine. The prohibition unit prohibits the next automatic stop of the engine if the prediction unit predicts that the next automatic stop time of the engine is less than the prescribed time.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: July 29, 2014
    Assignee: Denso Corporation
    Inventors: Takayuki Takeuchi, Kenji Kawahara, Hiroshi Morimoto, Takahiro Naito, Takanori Sasaki
  • Publication number: 20140117541
    Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
    Type: Application
    Filed: January 7, 2014
    Publication date: May 1, 2014
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshiyuki Kado, Takahiro Naito, Toshihiko Sato, Hikaru Ikegami, Takafumi Kikuchi
  • Patent number: D712879
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: September 9, 2014
    Assignee: Sony Corporation
    Inventor: Takahiro Naito
  • Patent number: D809469
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: February 6, 2018
    Assignee: SONY CORPORATION
    Inventors: Kirio Masui, Kenzo Nakajima, Hiroaki Yokota, Takahiro Naito, Hitoshi Takahashi