Patents by Inventor Takahiro Naito

Takahiro Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080199238
    Abstract: An image generating apparatus includes a print portion printing a paper, a platen roller arranged so as to be opposed to the print portion, a heat radiating member mounted on the print portion, radiating heat generated in the print portion, integrally provided with a plate-like support shaft as an axis of rotation and rotatable in a direction for coming into pressure contact with or separating from the platen roller, a regulating member regulating movement of the print portion in a printing direction of the paper, a chassis having a hole-shaped bearing receiving the plate-like support shaft, and a side plate mounted on the chassis.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 21, 2008
    Applicant: Funai Electric Co. Ltd.
    Inventors: Kunio Sawai, Takahiro Naito
  • Publication number: 20080192106
    Abstract: This image generating apparatus includes a chassis and a side plate, a cartridge stop member provided on a first side surface of the chassis integrally has a first shaft stop portion coming into contact with a first end surface of a shaft of a print head pressing member, and a side plate provided on a second side surface of the chassis integrally has a second shaft stop portion coming into contact with a second end surface of the shaft of the print head pressing member.
    Type: Application
    Filed: February 7, 2008
    Publication date: August 14, 2008
    Applicant: Funai Electric Co., Ltd.
    Inventors: Kunio SAWAI, Takahiro Naito
  • Publication number: 20080193185
    Abstract: In this image generating apparatus, a driving gear portion is so formed that the diameter of the outer peripheral surface of a first toothless portion is smaller than the tip diameter of a first toothed portion, and so arranged that the first toothless portion thereof slides on a second toothed portion of a driven gear portion of a print head rotating member in the vicinity of a position where a print head presses a platen roller with a pressing portion.
    Type: Application
    Filed: February 7, 2008
    Publication date: August 14, 2008
    Applicant: Funai Electric Co., Ltd.
    Inventors: Kunio SAWAI, Takahiro Naito
  • Publication number: 20080169600
    Abstract: This paper feed cartridge includes a paper storage member for storing papers supplied to an image generating apparatus and a paper push-up member provided on the bottom of the paper storage member for receiving the papers thereon and pushing up the papers to a position for coming into contact with a paper feed roller provided on a paper supply port of the image generating apparatus, while the paper push-up member integrally includes a notched or hole-shaped relief portion for preventing the paper push-up member from coming into contact with the paper feed roller when rotating in a paper push-up direction.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 17, 2008
    Applicant: Funai Electric Co., Ltd.
    Inventors: Daisuke Shimizu, Takahiro Naito
  • Patent number: 7365426
    Abstract: In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: April 29, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yasuhiro Naka, Naotaka Tanaka, Ikuo Yoshida, Satoshi Imasu, Takahiro Naito
  • Patent number: 7336733
    Abstract: A decoding apparatus includes a radio section, TFCI decoding characteristic feedback section, and dedicated physical data channel correcting section. The radio section receives data on a dedicated physical control channel and data on a dedicated physical data channel, which are coded into a complex code of a single system which is to be transmitted as an uplink signal from a mobile unit to a base station in a 3rd generation cell phone system. The TFCI decoding characteristic feedback section determines the TFCI decoding characteristics of a coded TFCI code on the dedicated physical control channel. The dedicated physical data channel correcting section performs data correction for the dedicated physical data channel on the basis of a determination result on the TFCI decoding characteristics. A decoding method and radio base station apparatus are also disclosed.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: February 26, 2008
    Assignee: NEC Corporation
    Inventor: Takahiro Naito
  • Publication number: 20080006947
    Abstract: A semiconductor device having a microcomputer chip and a plurality of high-speed memory chips and capable of making wiring lines of the memory chips equal in length is disclosed. The semiconductor device comprises a first wiring substrate, a microcomputer chip mounted over the first wiring substrate, a second wiring substrate disposed over the microcomputer chip, a plurality of first solder bumps for connecting the first and second wiring substrates with each other, and a plurality of second solder bumps as external terminals formed over a back surface of the wiring substrate. A first memory chip and a second memory chip, as high-speed memory chips, are stacked within the second wiring substrate, wiring of the first memory chip and that of the second memory chip are made equal in length within the second wiring substrate, and a completed package structure having the second wiring substrate is mounted over a completed package structure having the first wiring substrate.
    Type: Application
    Filed: May 16, 2007
    Publication date: January 10, 2008
    Inventors: Toshihiko Akiba, Takahiro Naito
  • Publication number: 20070290433
    Abstract: A paper feed cassette includes a second press member for pressing the center in a width direction of an upper surface of a paper. The second press member integrally includes a flat portion mounted on the lower surface of the lid member, an inclined portion integrally bonded with the flat portion on a region other than an end in a lower surface of the flat portion, extending in an oblique direction toward an inner bottom surface of the cassette body, and having at least an elastically deformable bonding portion between the inclined portion and the flat portion and a press portion provided on a forward end of the inclined portion, and the press portion is brought into contact with the inner bottom surface of the cassette body when the lid member is arranged on the upper portion of the cassette body.
    Type: Application
    Filed: May 1, 2007
    Publication date: December 20, 2007
    Applicant: Funai Electric Co., Ltd.
    Inventors: Atsushi Mushimoto, Takahiro Naito
  • Patent number: 7298731
    Abstract: A radio base station apparatus capable of improving accuracy of synchronization detection and making stable determination of reception synchronization without erroneous synchronization determination is provided. A TFCI bit error determination section re-encodes a decoded TFCI value, and computes the difference between the re-encoded TFCI symbol and a hard-decided symbol of the received TFCI symbol. A TFCI decoding characteristic determination section computes a characteristic indicator value from a correlation result of Fast Hadamard Transform used in a soft decision TFCI decoder.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: November 20, 2007
    Assignee: NEC Corporation
    Inventor: Takahiro Naito
  • Patent number: 7291929
    Abstract: A connection method is disclosed for a high-performance semiconductor system. The connection method enables high-speed operation with low noise, so as to obtain reliable and excellent connection in a short TAT at low costs. Semiconductor chips and the interposer chips are polished by grinding at their rear surfaces, holes are formed at rear surface positions corresponding to external electrode parts on the device side (front surface side) so that the holes extend to front surface electrodes, and metal plating films are applied to the side walls of the holes and rear surface side. Metal bumps of another semiconductor chip laminated at an upper stage being press-fitted into the holes applied with the metal plating films through deformation and being geometrically calked in the through holes formed in the semiconductor chip so as to electrically connected thereto.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: November 6, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Naotaka Tanaka, Yasuhiro Yoshimura, Takahiro Naito, Takashi Akazawa
  • Publication number: 20060239743
    Abstract: An ink sheet cartridge provided with a bobbin case easy to assemble and disassemble, formed with no protrusion on the outer surface thereof and capable of inhibiting the number of components from increase is obtained. This ink sheet cartridge is provided with a pawl and a receiving portion on upper and lower components respectively. The pawl is provided with a projecting engaging portion, and the receiving portion is provided with a groove engaging with the engaging portion. The groove has a guide for guiding the engaging portion and a stop portion fixing the engaging portion.
    Type: Application
    Filed: March 17, 2006
    Publication date: October 26, 2006
    Applicant: Funai Electric Co., Ltd.
    Inventor: Takahiro Naito
  • Publication number: 20060220230
    Abstract: In order to implement a high-density high-performance semiconductor system small in size, there is provided a method for implementing three-dimensional connection between a plurality of semiconductor chips differing from each other with the shortest metal interconnect length, using penetration electrodes, thereby enabling a fast operation at a low noise level, the method being a three-dimensional connection method very low in cost, and short in TAT in comparison with the known example, capable of bonding at an ordinary temperature, and excellent in connection reliability.
    Type: Application
    Filed: January 27, 2006
    Publication date: October 5, 2006
    Applicant: Renesas Technology Corp.
    Inventors: Naotaka Tanaka, Yasuhiro Yoshimura, Takahiro Naito, Takashi Akazawa
  • Publication number: 20060197204
    Abstract: In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.
    Type: Application
    Filed: April 14, 2006
    Publication date: September 7, 2006
    Applicant: Hitachi,Ltd.
    Inventors: Yasuhiro Naka, Naotaka Tanaka, Ikuo Yoshida, Satoshi Imasu, Takahiro Naito
  • Publication number: 20060189031
    Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
    Type: Application
    Filed: April 7, 2006
    Publication date: August 24, 2006
    Inventors: Yoshiyuki Kado, Takahiro Naito, Toshihiko Sato, Hikaru Ikegami, Takafumi Kikuchi
  • Publication number: 20060170112
    Abstract: A connection method for materializing a high-performance semiconductor system which is small-sized and high dense, is capable to three-dimensionally connecting a plurality of different kinds of semiconductor chips through piercing electrodes with shortest wiring lengths. The connection method enables high-speed operation with low noise, so as to obtain reliable and excellent connection in a short TAT at low costs.
    Type: Application
    Filed: January 10, 2006
    Publication date: August 3, 2006
    Applicant: Renesas Technology Corp.
    Inventors: Naotaka Tanaka, Yasuhiro Yoshimura, Takahiro Naito, Takashi Akazawa
  • Patent number: 7057278
    Abstract: In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: June 6, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Naka, Naotaka Tanaka, Ikuo Yoshida, Satoshi Imasu, Takahiro Naito
  • Patent number: 7042073
    Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: May 9, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Yoshiyuki Kado, Takahiro Naito, Toshihiko Sato, Hikaru Ikegami, Takafumi Kikuchi
  • Publication number: 20060074552
    Abstract: A driver's action at a target intersection in a guided route is predicted based on driving data. When the driver is attempting to go straight ahead at a target intersection where the driver should make a turn, or when the driver is attempting to make a turn at a target intersection where the driver should go straight ahead, the predicted driver's action is determined to disagree with the guided route. In this case, an execution of an audio guidance is performed but re-execution is awaited for a predetermined period. Further, when the driver is attempting to go straight ahead at a target intersection where the driver should make a turn, an audio guidance is executed after a distance to the target intersection is determined to be smaller than a required distance computed from a vehicle speed.
    Type: Application
    Filed: September 23, 2005
    Publication date: April 6, 2006
    Applicant: DENSO CORPORATION
    Inventors: Takahiro Naito, Takafumi Ito
  • Patent number: D515069
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: February 14, 2006
    Assignee: Sony Corporation
    Inventor: Takahiro Naito
  • Patent number: D578112
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: October 7, 2008
    Assignee: Sony Corporation
    Inventor: Takahiro Naito