Patents by Inventor Takahiro Tamura

Takahiro Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10923570
    Abstract: A semiconductor device comprises: an n-type semiconductor substrate; a p-type anode region formed in the semiconductor substrate on its front surface side; an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, wherein a concentration distribution of the donor in the field stop region in its depth direction has a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak, and a carrier lifetime in at least a partial region between the anode region and the cathode region is longer than carrier lifetimes in the anode region.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: February 16, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki Wakimoto, Hiroshi Takishita, Takashi Yoshimura, Takahiro Tamura, Yuichi Onozawa
  • Publication number: 20200381515
    Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.
    Type: Application
    Filed: August 19, 2020
    Publication date: December 3, 2020
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Akio YAMANO
  • Publication number: 20200350170
    Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI
  • Patent number: 10756182
    Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: August 25, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Tamura, Yuichi Onozawa, Takashi Yoshimura, Hiroshi Takishita, Akio Yamano
  • Publication number: 20200245855
    Abstract: A medical observation apparatus includes: a grip configured to be connected to an insertion portion inserted into a subject, the grip being gripped by a user; a transmission cable extending from the grip; a connector provided at an end portion of the transmission cable and configured to be detachably connected to a controller outside the medical observation apparatus; a heat generator provided inside the insertion portion or the grip, and configured to generate heat when driven; a signal transmission path included in the transmission cable, and configured to perform signal transmission between the controller and the grip; and a cooling channel configured to distribute a cooling fluid thermally connected to the heat generating portion, the cooling channel being an annular channel configured to circulate the cooling fluid within the medical observation apparatus.
    Type: Application
    Filed: November 29, 2019
    Publication date: August 6, 2020
    Applicant: Sony Olympus Medical Solutions Inc.
    Inventors: Takahiro TAMURA, Takamasa MIKAMI, Tatsuya NAKANISHI
  • Patent number: 10734230
    Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: August 4, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi
  • Publication number: 20200161479
    Abstract: Provided is a semiconductor apparatus in which the buried region includes an end portion buried region continuously disposed from a region below the contact opening up to a region below the interlayer dielectric film while passing below an end portion of the contact opening in a cross section perpendicular to the upper surface of the semiconductor substrate, and the end portion buried region disposed below the interlayer dielectric film is shorter than the end portion buried region disposed below the contact opening in a first direction in parallel with the upper surface of the semiconductor substrate.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA
  • Publication number: 20200155961
    Abstract: The present invention provides a distillation apparatus for NMP which is capable of regenerating a spent NMP recovered from a process for production of an electrode for lithium ion batteries on-site, in which the NMP can be purified in a simple and safe manner irrespective of variation in concentration of water in the raw material or throughput, and a recovery rate of the NMP can be further enhanced.
    Type: Application
    Filed: March 30, 2017
    Publication date: May 21, 2020
    Applicant: MITSUBISHI CHEMICAL ENGINEERING CORPORATION
    Inventors: Takahiro TAMURA, Hisataka TAKEDA, Kaori KUDOU
  • Publication number: 20200136144
    Abstract: A secondary battery according to one aspect of the present disclosure includes a negative electrode which includes a negative electrode core and a negative electrode active material layer provided on at least one surface of the negative electrode core. In this secondary battery, the negative electrode active material layer includes a negative electrode active material which contains graphite having a crystalline size of 10 nm or more and an interlayer distance d002 of 0.3356 to 0.3360 nm and a rubber-based binding material having an average primary particle diameter of 120 to 250 nm, the negative electrode active material has a pore capacity of 0.5 ml/g or less at a pore diameter of 0.2 to 1 ?m measured by a mercury porosimeter, and the rate of the average primary particle diameter of the rubber-based binding material to the pore capacity of the negative electrode active material is 1.15 to 1.70 g/m2.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 30, 2020
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Takahiro Tamura, Shinichi Yamami, Fumiya Kanetake, Kentaro Takahashi
  • Patent number: 10618052
    Abstract: The media-circulation type pulverizer comprising: an agitating member disposed in a lower region of a pulverization chamber; an annular partition wall disposed to extend upwardly in the pulverization chamber; and a media guide member provided on a lower surface of the end plate of the agitating member, wherein the annular partition wall has a height set to be ? to ? of a height of the pulverization chamber, and the media guide member has a lower end which enters a space of the inner region of the pulverization chamber located inside the annular partition wall, and wherein a vertically-extending flow straightening blade is provided between said lower portion of the media guide member and an upper portion of the annular partition wall, and the media separation member is provided on the lower end of the lower portion of the media guide member.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: April 14, 2020
    Assignee: ASHIZAWA FINETECH LTD
    Inventors: Tsuyoshi Ishikawa, Yasuhiro Mitsuhashi, Takahiro Tamura, Tsubasa Nakajima
  • Publication number: 20200098747
    Abstract: A semiconductor device is provided, including a semiconductor substrate, wherein the semiconductor substrate has: a diode region; a transistor region; and a boundary region that is positioned between the diode region and the transistor region, the boundary region includes a defect region that is provided: at a predetermined depth position on a front surface-side of the semiconductor substrate; and to extend from an end portion of the boundary region adjacent to the diode region toward the transistor region, at least part of the boundary region does not include a first conductivity-type emitter region exposed on a front surface of the semiconductor substrate, and the transistor region does not have the defect region below a mesa portion that is sandwiched by two adjacent trench portions, and closest to the boundary region among the mesa portions having the emitter region.
    Type: Application
    Filed: November 29, 2019
    Publication date: March 26, 2020
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Daisuke OZAKI, Akinori KANETAKE
  • Publication number: 20200051820
    Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.
    Type: Application
    Filed: October 23, 2019
    Publication date: February 13, 2020
    Inventors: Hiroshi TAKISHITA, Takashi YOSHIMURA, Takahiro TAMURA, Yuichi ONOZAWA, Akio YAMANO
  • Publication number: 20200035817
    Abstract: Provided is a semiconductor device including a semiconductor substrate having a drift region; a transistor portion having a collector region; a diode portion having a cathode region; and a boundary portion arranged between the transistor portion and the diode portion at an upper surface of the semiconductor substrate, and having the collector region, wherein the mesa portion of each of the transistor portion and the boundary portion has an emitter region and a base region, the base region has a channel portion, and a density in the upper surface of the mesa portion in the region in which the channel portion is projected onto the upper surface of the mesa portion of the boundary portion may be smaller than the density of the region in which the channel portion is projected onto the upper surface of the mesa portion of the transistor portion.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 30, 2020
    Inventors: Takahiro TAMURA, Michio NEMOTO
  • Publication number: 20200014047
    Abstract: A fuel cell system includes a fuel cell, a fuel gas supply line, an oxidizing agent gas supply line, a fuel gas discharge line, and a reformer provided in the fuel gas supply line. A first circulating line circulates the fuel gas from the fuel gas discharge line to an upstream side of the reformer in the fuel gas supply line as a first circulating gas. The circulation device is provided in the fuel gas supply line, and suctions the first circulating gas by using the flow of the fuel gas flowing through the fuel gas supply line as a driving flow. A second circulating line circulates the fuel gas from a downstream side of the circulation device in the fuel gas supply line or the fuel gas discharge line to the upstream side of the circulation device in the fuel gas supply line as a second circulating gas.
    Type: Application
    Filed: September 17, 2019
    Publication date: January 9, 2020
    Inventors: Yuki MUKOBARA, Takayuki SUGIURA, Yasuhiro OSADA, Yasutoshi DOI, Atsushi HAYASAKA, Takahiro TAMURA
  • Patent number: 10529800
    Abstract: A semiconductor device is provided, including: a semiconductor substrate having an active area and an edge termination region; an upper electrode; an insulating film provided between the semiconductor substrate and the upper electrode and having a contact hole; a first conductivity-type drift region; a second conductivity-type base region; a second conductivity-type well region; and a second conductivity-type extension region formed extending in a direction toward the well region from the base region and separated from the upper electrode by the insulating film, wherein a sum of a first distance from an end portion of the contact hole closer to the well region to an end portion of the extension region closer to the well region and a second distance from the end portion of the extension region closer to the well region to the well region is smaller than a thickness of the semiconductor substrate in the active area.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: January 7, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kaname Mitsuzuka, Yuichi Onozawa, Takahiro Tamura
  • Patent number: 10468254
    Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: November 5, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroshi Takishita, Takashi Yoshimura, Takahiro Tamura, Yuichi Onozawa, Akio Yamano
  • Patent number: 10444317
    Abstract: According to one embodiment, an MRI apparatus includes sequence control circuitry that performs first scanning and second scanning along mutually opposite radial directions in k-space, crossing over a k-space origin, and performs third scanning, and processing circuitry that generates first and second projection images by respectively applying a one-dimensional Fourier transform for the directions to first and second MR signals respectively acquired by the first and second scanning, determines correction coefficients related to transient response characteristics of a readout gradient magnetic field by a calculating process to reduce a difference between the first and second projection images, and generates a corrected image in which the transient response characteristics are corrected using the correction coefficients and MR signals acquired by the third scanning.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: October 15, 2019
    Assignee: Canon Medical Systems Corporation
    Inventors: Daiki Tamada, Takahiro Tamura
  • Publication number: 20190288078
    Abstract: A semiconductor device comprises: an n-type semiconductor substrate; a p-type anode region formed in the semiconductor substrate on its front surface side; an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, wherein a concentration distribution of the donor in the field stop region in its depth direction has a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak, and a carrier lifetime in at least a partial region between the anode region and the cathode region is longer than carrier lifetimes in the anode region.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Inventors: Hiroki WAKIMOTO, Hiroshi TAKISHITA, Takashi YOSHIMURA, Takahiro TAMURA, Yuichi ONOZAWA
  • Patent number: 10388723
    Abstract: To prevent an intermediate region from contacting a cathode electrode even if a cathode region is partially defective. There is provided a semiconductor device with a semiconductor substrate that has a field stop region where first impurities of a first conduction type are implanted, an intermediate region that is formed on a back surface side of the field stop region and where second impurities of a second conduction type are implanted, and a cathode region of the first conduction type that is formed on a back surface side of the intermediate region. In a back surface of the semiconductor substrate, a concentration of the first impurities is higher than a concentration of the second impurities.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: August 20, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki Wakimoto, Yuichi Onozawa, Takahiro Tamura, Eri Ogawa
  • Publication number: 20190214462
    Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 11, 2019
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Akio YAMANO