Patents by Inventor Takeshi Imamura
Takeshi Imamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10797077Abstract: According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N?2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.Type: GrantFiled: December 3, 2019Date of Patent: October 6, 2020Assignee: Toshiba Memory CorporationInventors: Genki Kawaguchi, Masanari Fujita, Hideki Inokuma, Osamu Matsuura, Takeshi Imamura, Hideo Wada, Makoto Watanabe, Hajime Kaneko, Kenichi Fujii, Takanobu Itoh
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Publication number: 20200302487Abstract: A system for generating an advertisement includes: a memory; and a processor coupled to the memory, the processor configured to execute a process including: obtaining an address of a content related to a product to be advertised, the product being determined by referring to at least one of an operation history of a user terminal operated by a user, an attribute of the user, and activity information of the user; obtaining a still image or a moving image related to the product; generating advertisement data by associating the address with the still image or the moving image; and displaying the advertisement data on the user terminal.Type: ApplicationFiled: February 24, 2020Publication date: September 24, 2020Applicant: FUJITSU LIMITEDInventor: Takeshi Imamura
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Patent number: 10730102Abstract: A single roll type apparatus for manufacturing a metal thin strip by injecting a molten metal onto an outer peripheral face of a cooling roll rotating at a high speed and rapidly solidifying it to manufacture a metal thin strip, wherein an airflow blocking device for blocking the airflow along the surface of the cooling roll is provided at an upstream side of a molten metal injection nozzle for injecting the molten metal in a rotation direction of the cooling roll, and a carbon dioxide gas injection nozzle for forming a flow of carbon dioxide gas on an outer peripheral surface of the cooling roll between the airflow blocking device and the molten metal injection nozzle or forming a carbon dioxide atmosphere on the surface of the cooling roll between the airflow blocking device and the molten metal injection nozzle is disposed, and a foreign material removal device for removing foreign material attached to the surface of the cooling roll is disposed at an upstream side of the airflow blocking device in the rotType: GrantFiled: July 20, 2016Date of Patent: August 4, 2020Assignee: JFE STEEL CORPORATIONInventors: Seiji Okabe, Takeshi Imamura, Shigehiro Takajo
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Patent number: 10643770Abstract: When a steel sheet containing Si: 2-5 mass % after cold rolling is subjected to a primary recrystallization annealing and a finishing annealing for secondary recrystallization to form a grain-oriented electrical steel sheet, the primary recrystallization annealing is performed by rapid heating in the heating process and temperature keeping treatment at a certain temperature in the course of the heating to thereby obtain a grain-oriented electrical steel sheet having plural peaks in a distribution of misorientation angle between crystal orientation of secondary recrystallized grains and Goss orientation, wherein misorientation angle of the second smallest peak among the plural peaks is preferably not less than 5° and a grain size of secondary recrystallized grains is not more than 15 mm.Type: GrantFiled: December 11, 2013Date of Patent: May 5, 2020Assignee: JFE STEEL CORPORATIONInventors: Takeshi Imamura, Yukihiro Shingaki, Ryuichi Suehiro, Toshito Takamiya
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Patent number: 10636885Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.Type: GrantFiled: October 31, 2019Date of Patent: April 28, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kazuma Yoshida, Takeshi Imamura, Toshikazu Imai, Ryosuke Okawa, Ryou Kato
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Patent number: 10636906Abstract: A semiconductor device in chip size package includes first and second metal oxide semiconductor transistors both vertical transistors formed in first and second regions obtained by dividing the semiconductor device into halves. The first metal oxide semiconductor transistor includes one or more first gate electrodes and four or more first source electrodes provided in one major surface, each of the first gate electrodes is surrounded, in top view, by the first source electrodes, and for any combination of a first gate electrode and a first source electrode, closest points between the first gate and first source electrodes are on a line inclined to a chip side. The second metal oxide semiconductor transistor includes the same structure as the first metal oxide semiconductor transistor. A conductor that connects the drains of the first and second metal oxide semiconductor transistors is provided in the other major surface of the semiconductor device.Type: GrantFiled: December 26, 2017Date of Patent: April 28, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tomonari Ota, Shigetoshi Sota, Eiji Yasuda, Takeshi Imamura, Toshikazu Imai, Ryosuke Okawa, Kazuma Yoshida, Masaaki Hirako, Dohwan Ahn
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Publication number: 20200111809Abstract: According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N-2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.Type: ApplicationFiled: December 3, 2019Publication date: April 9, 2020Applicant: Toshiba Memory CorporationInventors: Genki KAWAGUCHI, Masanari FUJITA, Hideki INOKUMA, Osamu MATSUURA, Takeshi IMAMURA, Hideo WADA, Makoto WATANABE, Hajime KANEKO, Kenichi FUJII, Takanobu ITOH
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Patent number: 10584406Abstract: An electrical steel sheet has a composition including C: less than 0.010 mass %, Si: 1.5˜10 mass % and the balance being Fe and incidental impurities, wherein a main orientation in a texture of a steel sheet is <111>//ND and an intensity ratio relative to randomly oriented specimen of the main orientation is not less than 5 and, preferably an intensity ratio relative to randomly oriented specimen of {111}<112> orientation is not less than 10, an intensity ratio relative to randomly oriented specimen of {310}<001> orientation is not more than 3 and Si concentration has a gradient that it is high at a side of a surface layer and low at a central portion in the thickness direction and a maximum value of the Si concentration is not less than 5.5 mass % and a difference between maximum and minimum values is not less than 0.5 mass %.Type: GrantFiled: January 22, 2013Date of Patent: March 10, 2020Assignee: JFE Steel CorporationInventors: Takeshi Imamura, Minoru Takashima, Tatsuhiko Hiratani
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Publication number: 20200066852Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.Type: ApplicationFiled: October 31, 2019Publication date: February 27, 2020Inventors: Kazuma YOSHIDA, Takeshi IMAMURA, Toshikazu IMAI, Ryosuke OKAWA, Ryou KATO
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Publication number: 20200040419Abstract: In a grain-oriented electrical steel sheet which is manufactured from a thin slab without using an inhibitor forming component, excellent magnetic properties are stably achieved. In a method for manufacturing a grain-oriented electrical steel sheet, a slab heating and annealing are performed under specific conditions.Type: ApplicationFiled: February 19, 2018Publication date: February 6, 2020Applicant: JFE STEEL CORPORATIONInventors: Masanori TAKENAKA, Takeshi IMAMURA, Yuiko EHASHI, Hiroi YAMAGUCHI
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Patent number: 10541310Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.Type: GrantFiled: May 21, 2019Date of Patent: January 21, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kazuma Yoshida, Takeshi Imamura, Toshikazu Imai, Ryosuke Okawa, Ryou Kato
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Patent number: 10541251Abstract: According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N?2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.Type: GrantFiled: July 23, 2018Date of Patent: January 21, 2020Assignee: Toshiba Memory CorporationInventors: Genki Kawaguchi, Masanari Fujita, Hideki Inokuma, Osamu Matsuura, Takeshi Imamura, Hideo Wada, Makoto Watanabe, Hajime Kaneko, Kenichi Fujii, Takanobu Itoh
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Patent number: 10519534Abstract: A iron-based amorphous alloy thin strip having a chemical composition represented by a chemical formula of FexBySiz (wherein x is 78-83 at %, y is 8-15 at % and z is 6-13 at %), wherein the number of air pockets at a surface contacting with a cooling roll is not more than 8 pockets/mm2 and an average length in a circumferential direction of the roll is not more than 0.5 mm.Type: GrantFiled: July 28, 2014Date of Patent: December 31, 2019Assignee: JFE Steel CorporationInventors: Seiji Okabe, Nobuo Shiga, Takeshi Imamura
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Publication number: 20190348227Abstract: A method for manufacturing a capacitor includes a step of forming a case integrated with a terminal unit designed to be connected with an external terminal, and a step of housing a capacitor element in the case so that the terminal unit is electrically connected to the capacitor element. The step of forming the case includes heating a metal mold to a temperature less than or equal to a glass transition temperature of a thermoplastic resin that is a material for the case. The metal mold internally has a mold part that is a hollow part having a shape of the case. And the step of forming the case further includes, after the heating of the metal mold and inserting the terminal unit into the mold part, injecting the thermoplastic resin in a molten state into the mold part of the metal mold.Type: ApplicationFiled: July 29, 2019Publication date: November 14, 2019Inventors: TAKESHI IMAMURA, TOSHIHISA MIURA
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Publication number: 20190323100Abstract: Excellent magnetic properties can be stably obtained in grain-oriented electrical steel sheets produced from thin slabs without using inhibitor forming components. Provided is a method for producing a grain-oriented electrical steel sheet comprising: subjecting a molten steel to continuous casting to form a slab with 25 to 100 mm in thickness, the molten steel having a chemical composition containing, in mass %, C: 0.002 to 0.100%, Si: 2.00 to 8.00%, Mn: 0.005 to 1.000%, Al: <0.0100%, N: <0.0050%, S: <0.0050% and Se: <0.0050%, and the balance being Fe and inevitable impurities; heating and then hot rolling the slab to form a hot-rolled steel sheet; wherein the step of heating the slab is performed at 1000 to 1300° C. for 10 to 600 seconds.Type: ApplicationFiled: November 1, 2017Publication date: October 24, 2019Applicant: JFE STEEL CORPORATIONInventors: Takeshi IMAMURA, Yuiko EHASHI, Masanori TAKENAKA, Hiroi YAMAGUCHI
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Patent number: 10431359Abstract: In a method for producing a grain-oriented electrical steel sheet by hot rolling a steel slab comprising C: 0.04-0.12 mass %, Si: 1.5-5.0 mass %, Mn: 0.01-1.0 mass %, sol. Al: 0.010-0.040 mass %, N: 0.004-0.02 mass %, one or two of S and Se: 0.005-0.05 mass % in total of S and Se, cold rolling, and subjecting to primary recrystallization annealing and further to final annealing, a content ratio of sol. Al to N in the steel slab (sol. Al/N) and a final thickness d (mm) satisfy an equation of 4d+1.52?sol. Al/N?4d+2.32, and the steel sheet in the heating process of the final annealing is held at a temperature of 775-875° C. for 40-200 hours and then heated in a temperature region of 875-1050° C. at a heating rate of 10-60° C./hr to preform secondary recrystallization and purification treatment, whereby an extremely-thin grain-oriented electrical steel sheet having a low iron loss and a small deviation in coil is produced.Type: GrantFiled: February 27, 2013Date of Patent: October 1, 2019Assignee: JFE Steel CorporationInventors: Masanori Uesaka, Minoru Takashima, Takeshi Imamura
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Publication number: 20190271054Abstract: To provide a grain-oriented electrical steel sheet that has better magnetic property than conventional ones without requiring high-temperature slab heating, in the case of not performing intermediate annealing, the hot rolled steel sheet obtained by a predetermined step is subjected to hot band annealing, and, in a heating process in the hot band annealing, heating is performed at a heating rate of 10° C./s or less for 10 sec or more and 120 sec or less in a temperature range of 700° C. or more and 950° C. or less, and in the case of performing the intermediate annealing, in a heating process in final intermediate annealing, heating is performed at a heating rate of 10° C./s or less for 10 sec or more and 120 sec or less in a temperature range of 700° C. or more and 950° C. or less.Type: ApplicationFiled: March 9, 2017Publication date: September 5, 2019Applicant: JFE STEEL CORPORATIONInventors: Yuiko EHASHI, Masanori TAKENAKA, Yasuyuki HAYAKAWA, Minoru TAKASHIMA, Takeshi IMAMURA
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Publication number: 20190273141Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.Type: ApplicationFiled: May 21, 2019Publication date: September 5, 2019Inventors: Kazuma YOSHIDA, Takeshi IMAMURA, Toshikazu IMAI, Ryosuke OKAWA, Ryou KATO
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Publication number: 20190256938Abstract: Excellent magnetic properties can be stably obtained in grain-oriented electrical steel sheets produced from thin slabs without using inhibitor forming components. Provided is a method for producing a grain-oriented electrical steel sheet comprising: subjecting a molten steel to continuous casting to form a slab with 25-100 mm in thickness, the molten steel having a chemical composition containing, in mass %, C: 0.002-0.100%, Si: 2.00-8.00% and Mn: 0.005-1.000%, Al: <0.0100%, N: <0.0050%, S: <0.0050% and Se: <0.0050%, and the balance being Fe and inevitable impurities; heating and then hot rolling the slab to form a hot-rolled steel sheet; wherein the step of heating the slab is performed at 1000-1300° C. for 10-600 seconds, and the hot rolling is started within 30 seconds after the heating.Type: ApplicationFiled: November 1, 2017Publication date: August 22, 2019Applicant: JFE STEEL CORPORATIONInventors: Masanori TAKENAKA, Takeshi IMAMURA, Yuiko EHASHI, Hiroi YAMAGUCHI
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Publication number: 20190247902Abstract: With a hot-rolled steel sheet for electrical steel sheet production having a scale layer on the surface, where the surface of the steel sheet has a lightness L* as defined in JIS Z 8781-4: 2013 satisfying 30?L*?50, and chromaticities a* and b* as defined in JIS Z 8781-4: 2013 satisfying ?1?a*?2 and ?5?b*?3 respectively, and with one end portion in the longitudinal direction of a coil as a reference, a color difference ?Eab* as defined in JIS Z 8781-4: 2013 at the central portion and at the opposite end portion satisfies ?Eab*?8, it is possible to obtain a grain-oriented electrical steel sheet where the variation of properties in a product coil is small.Type: ApplicationFiled: October 18, 2017Publication date: August 15, 2019Applicant: JFE STEEL CORPORATIONInventors: Yuiko EHASHI, Masanori TAKENAKA, Takeshi IMAMURA, Minoru TAKASHIMA