Patents by Inventor Takeyoshi Masuda

Takeyoshi Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8203151
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a SiC film, forming trenches at a surface of the SiC film, heat-treating the SiC film with silicon supplied to the surface of the SiC film, and obtaining a plurality of macrosteps to constitute channels, at the surface of the SiC film by the step of heat-treating. Taking the length of one cycle of the trenches as L and the height of the trenches as h, a relation L=h(cot ?+cot ?) (where ? and ? are variables that satisfy the relations 0.5??, ??45) holds between the length L and the height h. Consequently, the semiconductor device can be improved in property.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: June 19, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Takeyoshi Masuda
  • Publication number: 20120149175
    Abstract: A method of cleaning a SiC semiconductor includes the steps of forming an oxide film at the surface of a SiC semiconductor, and removing the oxide film. At the step of forming an oxide film, an oxide film is formed using ozone water having a concentration greater than or equal to 30 ppm. The forming step preferably includes the step of heating at least one of the surface of the SiC semiconductor and the ozone water. Thus, there can be obtained a method of cleaning a SiC semiconductor that can exhibit cleaning effect on the SiC semiconductor.
    Type: Application
    Filed: February 25, 2011
    Publication date: June 14, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Wada, Takeyoshi Masuda, Tomihito Miyazaki, Toru Hiyoshi, Satomi Itoh, Hiromu Shiomi
  • Patent number: 8198675
    Abstract: A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. An extended terrace surface is formed at a surface of an initial growth layer on a 4H—SiC substrate by annealing with the initial growth layer covered with an Si film, and then a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion having a polytype stable at a low temperature is grown on the extended terrace surface, and a 4H—SiC portion is grown on the other region. A trench is formed by selectively removing the 3C—SiC portion with the 4H—SiC portion remaining, and a gate electrode of a UMOSFET is formed in the trench. A channel region of the UMOSFET can be controlled to have a low-order surface, and a silicon carbide semiconductor device having high channel mobility and excellent performance characteristics is obtained.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: June 12, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Takeyoshi Masuda
  • Publication number: 20120126251
    Abstract: A method for manufacturing a silicon carbide substrate achieves reduced manufacturing cost. The method includes the steps of: preparing a base substrate and a SiC substrate; fabricating a stacked substrate by stacking the base substrate and the SiC substrate; fabricating a connected substrate by heating the stacked substrate; transferring a void, formed at a connection interface, in a thickness direction of the connected substrate by heating the connected substrate to cause the base substrate to have a temperature higher than that of the SiC substrate; and removing the void by removing a region including a main surface of the base substrate opposite to the SiC substrate.
    Type: Application
    Filed: February 25, 2011
    Publication date: May 24, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Takeyoshi Masuda, Keiji Wada, Hiroki Inoue, Taro Nishiguchi, Kyoko Okita, Yasuo Namikawa, Taku Horii
  • Publication number: 20120097980
    Abstract: A termination configuration of a silicon carbide insulating gate type semiconductor device includes a semiconductor layer of a first conductivity type having a first main face, a gate electrode, and a source interconnection, as well as a circumferential resurf region. The semiconductor layer includes a body region of a second conductivity type, a source region of the first conductivity type, a contact region of the second conductivity type, and a circumferential resurf region of the second conductivity type. A width of a portion of the circumferential resurf region excluding the body region is greater than or equal to ½ the thickness of at least the semiconductor layer. A silicon carbide insulating gate type semiconductor device of high breakdown voltage and high performance can be provided.
    Type: Application
    Filed: February 7, 2011
    Publication date: April 26, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takeyoshi Masuda, Keiji Wada, Misako Honaga
  • Patent number: 8138504
    Abstract: A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. A coating film made of Si is formed on an initial growth layer on a 4H—SiC substrate, and an extended terrace surface is formed in a region covered with the coating film. Next, the coating film is removed, and a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion made of 3C—SiC crystals having a polytype stable at a low temperature is grown on the extended terrace surface of the initial growth layer. A channel region of a MOSFET or the like is provided in the 3C—SiC portion having a narrow band gap. As a result, the channel mobility is improved because of a reduction in an interface state, and a silicon carbide semiconductor device having excellent performance characteristics is obtained.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: March 20, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Takeyoshi Masuda
  • Publication number: 20120056202
    Abstract: A MOSFET, which is a semiconductor device allowing for reduced on-resistance while restraining stacking faults from being produced due to heat treatment in a device manufacturing process, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source contact electrode disposed on the active layer; and a drain electrode formed on the other main surface of the silicon carbide substrate. The silicon carbide substrate includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. Further, the base layer has an impurity concentration greater than 2×1019 cm?3, and the SiC layer has an impurity concentration greater than 5×1018 cm?3 and smaller than 2×1019 cm?3.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 8, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Shin Harada, Takeyoshi Masuda, Misako Honaga, Makoto Sasaki, Taro Nishiguchi, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120056201
    Abstract: An IGBT, which is a vertical type IGBT allowing for reduced on-resistance while restraining defects from being produced, includes: a silicon carbide substrate, a drift layer, a well region, an n+ region, an emitter contact electrode, a gate oxide film, a gate electrode, and a collector electrode. The silicon carbide substrate includes: a base layer made of silicon carbide and having p type conductivity; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The base layer has a p type impurity concentration exceeding 1×1018 cm?3.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 8, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Shin Harada, Takeyoshi Masuda, Misako Honaga, Taro Nishiguchi, Makoto Sasaki, Shinsuke Fujiwara, Yasuo Namikawa
  • Publication number: 20120025208
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; forming a Si film made of silicon on a main surface of the base substrate; fabricating a stacked substrate by placing the SiC substrate on and in contact with the Si film; and connecting the base substrate and the SiC substrate to each other by heating the stacked substrate to convert, into silicon carbide, at least a region making contact with the base substrate and a region making contact with the SiC substrate in the Si film.
    Type: Application
    Filed: September 29, 2010
    Publication date: February 2, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Takeyoshi Masuda, Makoto Sasaki, Shin Harada, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120018743
    Abstract: A MOSFET includes a silicon carbide substrate including a main surface having an off angle of not less than 50° and not more than 65° with respect to a {0001} plane, a buffer layer and a drift layer formed on the main surface, a gate oxide film formed on and in contact with the drift layer, and a p type body region of a p conductivity type formed in the drift layer to include a region in contact with the gate oxide film. The p type body region has a p type impurity density of not less than 5×1016 cm?3.
    Type: Application
    Filed: July 25, 2011
    Publication date: January 26, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Toru Hiyoshi, Keiji Wada, Takeyoshi Masuda, Hiromu Shiomi
  • Publication number: 20120012862
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; and connecting the base substrate and SiC substrate to each other by forming an intermediate layer, which is made of carbon that is a conductor, between the base substrate and the SiC substrate.
    Type: Application
    Filed: September 29, 2010
    Publication date: January 19, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Shinsuke Fujiwara, Yasuo Namikawa, Takeyoshi Masuda
  • Publication number: 20120007104
    Abstract: A semiconductor device employing silicon carbide, and the like are provided. In the semiconductor device, even when an electrode material and an upper electrode material are different, a problem does not take place at an interface at which these different types of metals are in contact with each other, thus obtaining high reliability in long-term use. The semiconductor device includes: a contact electrode 16 in contact with silicon carbides 14, 18; and an upper electrode 19 electrically conductive to the contact electrode. The contact electrode 16 is formed of an alloy including titanium, aluminum, and silicon, the upper electrode 19 is formed of aluminum or an aluminum alloy, and the upper electrode achieves the electric conduction to the contact electrode with the upper electrode making contact with the contact electrode.
    Type: Application
    Filed: April 22, 2010
    Publication date: January 12, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Wada, Hideto Tamaso, Takeyoshi Masuda, Misako Honaga
  • Publication number: 20110309376
    Abstract: A method of cleaning an SiC semiconductor capable of exhibiting an effect of cleaning an SiC semiconductor is provided. An SiC semiconductor and an SiC semiconductor device capable of achieving improved characteristics are provided. The method of cleaning an SiC semiconductor includes the steps of forming an oxide film on a surface of an SiC semiconductor (step S2) and removing the oxide film (step S3). In the forming step (step S2), the oxide film is formed in a dry atmosphere at a temperature not lower than 700° C. that contains O element. The SiC semiconductor is an SiC semiconductor having a surface and the surface has metal surface density not higher than 1×1012 cm?2. The SiC semiconductor device includes an SiC semiconductor and an oxide film formed on a surface of the SiC semiconductor.
    Type: Application
    Filed: May 6, 2011
    Publication date: December 22, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Toru HIYOSHI, Keiji WADA, Takeyoshi MASUDA, Hiromu SHIOMI, Satomi ITOH, Tomihito MIYAZAKI
  • Publication number: 20110287603
    Abstract: First and second supported portions each made of silicon carbide and a supporting portion made of silicon carbide are arranged such that the first and second supported portions and the supporting portion face each other and a gap is provided between the first and second supported portions. By sublimating and recrystallizing silicon carbide of the supporting portion, the supporting portion is connected to each of the first and second single-crystal substrates. On this occasion, a through hole is formed in the supporting portion so as to be connected to the gap. Accordingly, a path is formed which allows a fluid to pass through the gap and the through hole. By closing this path, the fluid can be prevented from being leaked through the silicon carbide substrate.
    Type: Application
    Filed: May 6, 2011
    Publication date: November 24, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Satomi ITOH, Takeyoshi MASUDA, Makoto SASAKI, Shin HARADA
  • Publication number: 20110260175
    Abstract: A silicon carbide layer is provided on a substrate, has a hexagonal single-crystal structure, and has a surface at which a depletion layer is formed. A protective film is insulative and provided on the silicon carbide layer to directly cover the surface. The surface thus directly covered with the protective film includes a portion having an off angle of not more than 10° relative to the {0-33-8} plane of the silicon carbide layer. This results in reduced leakage current flowing in an interface between the protective film and the semiconductor layer.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 27, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Toru HIYOSHI, Keiji WADA, Takeyoshi MASUDA
  • Publication number: 20110241022
    Abstract: A substrate, the presence of which can be detected with a method similar to a conventional method of detecting a Si substrate even if the substrate is transparent, and a method of manufacturing the substrate are provided. Light incident on an end portion of a transparent substrate is not transmitted through the substrate as with the light incident on a central portion of the substrate, but is totally reflected from a total reflection surface in a detection region present in at least a portion of the end portion of the substrate. A photoelectric sensor can recognize that a ratio of transmission of the light at the end portion of the substrate has become smaller, thereby detecting the presence of the substrate.
    Type: Application
    Filed: December 9, 2009
    Publication date: October 6, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takeyoshi Masuda
  • Publication number: 20110233562
    Abstract: A substrate achieving suppressed deterioration of processing accuracy of a semiconductor device due to bending of the substrate, a substrate with a thin film and a semiconductor device formed with the substrate above, and a method of manufacturing the semiconductor device above are obtained. A substrate according to the present invention has a main surface having a diameter of 2 inches or greater, a value for bow at the main surface being not smaller than ?40 ?m and not greater than ?5 ?m, and a value for warp at the main surface being not smaller than 5 ?m and not greater than 40 ?m. Preferably, a value for surface roughness Ra of the main surface of the substrate is not greater than 1 nm and a value for surface roughness Ra of a main surface is not greater than 100 nm.
    Type: Application
    Filed: April 6, 2010
    Publication date: September 29, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES,LTD.
    Inventors: Shin Harada, Makoto Sasaki, Takeyoshi Masuda
  • Publication number: 20110210342
    Abstract: A SiC substrate includes a first orientation flat parallel to the <11-20> direction, and a second orientation flat being in a direction intersecting the first orientation flat and being different from the first orientation flat in length. An alternative SiC substrate has a rectangular plane shape, and a main surface of the substrate includes a first side parallel to the <11-20> direction, a second side in a direction perpendicular to the first side, and a third side connecting the first side to the second side. A length of the third side projected in a direction in which the first side extends is different from a length of the third side projected in a direction in which the second side extends.
    Type: Application
    Filed: February 9, 2010
    Publication date: September 1, 2011
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Makoto Sasaki, Takeyoshi Masuda
  • Publication number: 20110186862
    Abstract: There is provided a silicon carbide semiconductor device having excellent electrical characteristics such as channel mobility, and a method for manufacturing the same. A semiconductor device includes a substrate made of silicon carbide and having an off-angle of greater than or equal to 50° and less than or equal to 65° with respect to a surface orientation of {0001}, a p-type layer serving as a semiconductor layer, and an oxide film serving as an insulating film. The p-type layer is formed on the substrate and is made of silicon carbide. The oxide film is formed to contact with a surface of the p-type layer. A maximum value of the concentration of nitrogen atoms in a region within 10 nm of an interface between the semiconductor layer and the insulating film (interface between a channel region and the oxide film) is greater than or equal to 1×1021 cm?3.
    Type: Application
    Filed: February 3, 2009
    Publication date: August 4, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Takeyoshi Masuda, Keiji Wada, Masato Tsumori
  • Publication number: 20110180812
    Abstract: A MOSFET which is a semiconductor device capable of achieving a stable reverse breakdown voltage and reduced on-resistance includes a SiC wafer of an n conductivity type, a plurality of p bodies of a p conductivity type formed to include a first main surface of the SiC wafer, and n+ source regions of the n conductivity type formed in regions surrounded by the plurality of p bodies, respectively, when viewed two-dimensionally. Each of the p bodies has a circular shape when viewed two-dimensionally, and each of the n+ source regions is arranged concentrically with each of the p bodies and has a circular shape when viewed two-dimensionally. Each of the plurality of p bodies is arranged to be positioned at a vertex of a regular hexagon when viewed two-dimensionally.
    Type: Application
    Filed: May 12, 2010
    Publication date: July 28, 2011
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takeyoshi Masuda, Misako Honaga