Abstract: A measuring device includes: a probe applying a voltage to an electrode of an element; and a supplying member supplying an insulating liquid to a contact portion between the electrode and the probe via a surface of the probe. Accordingly, the insulating liquid can be securely supplied to the contact portion between the electrode and the probe via the surface of the probe positioned relative to the electrode.

Abstract: A trench having a side wall and a bottom portion is formed in a silicon carbide substrate. A trench insulating film is formed to cover the bottom portion and the side wall. A silicon film is formed to fill the trench with the trench insulating film being interposed therebetween. The silicon film is etched so as to leave a portion of the silicon film that is disposed on the bottom portion with the trench insulating film being interposed therebetween. The trench insulating film is removed from the side wall. By oxidizing the silicon film, a bottom insulating film is formed. A side wall insulating film is formed on the side wall.

Abstract: A MOSFET includes a semiconductor substrate having a trench formed in a main surface, a gate oxide film, a gate electrode, and a source interconnection. A semiconductor substrate includes an n-type drift layer and a p-type body layer. The trench is formed to penetrate the body layer and to reach the drift layer. The trench includes an outer peripheral trench arranged to surround an active region when viewed two-dimensionally. On the main surface opposite to the active region when viewed from the outer peripheral trench, a potential fixing region where the body layer is exposed is formed. The source interconnection is arranged to lie over the active region when viewed two-dimensionally. The potential fixing region is electrically connected to the source interconnection.

Abstract: A silicon carbide substrate including a first layer having first conductivity type, a second layer having second conductivity type, and a third layer having the first conductivity type is formed. A trench provided with an inner surface having a side wall surface and a bottom surface is formed, the side wall surface extending through the third layer and the second layer and reaching the first layer, the bottom surface being formed of the first layer. A silicon film is formed to cover the bottom surface. A gate oxide film is formed on the inner surface by oxidation in the trench. The gate oxide film includes a first portion formed by oxidation of the silicon carbide substrate, and a second portion formed by oxidation of the silicon film on the bottom surface. Accordingly, a method for manufacturing a silicon carbide semiconductor device having a high breakdown voltage is provided.

Abstract: A gate insulating film is provided on a trench. The gate insulating film has a trench insulating film and a bottom insulating film. The trench insulating film covers each of a side wall and a bottom portion. The bottom insulating film is provided on the bottom portion with a trench insulating film being interposed therebetween. The bottom insulating film has a carbon atom concentration lower than that of the trench insulating film. The gate electrode is in contact with a portion of the trench insulating film on the side wall. Accordingly, a low threshold voltage and a large breakdown voltage can be attained.

Abstract: A wide gap semiconductor device includes a substrate and a Schottky electrode. The substrate formed of a wide gap semiconductor material has a main face, and includes a first-conductivity-type region and a second-conductivity-type region. The Schottky electrode is arranged adjoining the main face of the substrate. At the substrate, there is foamed a trench having a side face continuous with the main face and a bottom continuous with the side face. The Schottky electrode adjoins the first-conductivity-type region at the side face of the trench and the main face, and adjoins the second-conductivity-type region at the bottom of the trench. The side face of the trench is inclined relative to the main face of the substrate.

Abstract: A silicon carbide substrate is prepared which has a main surface covered with a silicon dioxide layer. In the silicon dioxide layer, an opening is formed by etching. In the opening, a residue resulting from the etching is on the silicon carbide substrate. The residue is removed by plasma etching in which only an inert gas is introduced. After removing the residue, under heating, a reactive gas is supplied to the silicon carbide substrate covered with the silicon dioxide layer having the opening formed therein. In this way, a trench is formed in the main surface of the silicon carbide substrate.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes the following steps. A silicon carbide substrate is prepared. A first heating step of heating the silicon carbide substrate in an atmosphere of oxygen is performed. A second heating step of heating the silicon carbide substrate to a temperature of 1300° C. or more and 1500° C. or less in an atmosphere of gas containing nitrogen atoms or phosphorus atoms is performed after the first heating step. A third heating step of heating the silicon carbide substrate in an atmosphere of a first inert gas is performed after the second heating step. Thus, the silicon carbide semiconductor device in which threshold voltage variation is small, and a method for manufacturing the same can be provided.

Abstract: A silicon carbide substrate has a first surface and a second surface, and includes a first region and a third region each having first conductivity type, as well as a second region and a fourth region each having second conductivity type. The third region surrounds the second region on the second surface. The fourth region has an impurity concentration higher than that of the second region, is in contact with the second region, and surrounds the third region on the second surface. A first main electrode is provided on the first surface. A second main electrode is in contact with each of the third and fourth regions. A gate insulating film is provided on the second region.

Abstract: A MOSFET which is a semiconductor device capable of achieving a stable reverse breakdown voltage and reduced on-resistance includes a SiC wafer of an n conductivity type, a plurality of p bodies of a p conductivity type formed to include a first main surface of the SiC wafer, and n+ source regions of the n conductivity type formed in regions surrounded by the plurality of p bodies, respectively, when viewed two-dimensionally. Each of the p bodies has a circular shape when viewed two-dimensionally, and each of the n+ source regions is arranged concentrically with each of the p bodies and has a circular shape when viewed two-dimensionally. Each of the plurality of p bodies is arranged to be positioned at a vertex of a regular hexagon when viewed two-dimensionally.

Abstract: A drift layer forms a first main surface of a silicon carbide layer and has a first conductivity type. A source region is provided to be spaced apart from the drift layer by a body region, forms a second main surface, and has the first conductivity type. A relaxing region is provided within the drift layer and has a distance Ld from the first main surface. The relaxing region has a second conductivity type and has an impurity dose amount Drx. The drift layer has an impurity concentration Nd between the first main surface and the relaxing region. Relation of Drx>Ld·Nd is satisfied. Thus, a silicon carbide semiconductor device having a high breakdown voltage is provided.

Abstract: A first layer of a first conductivity type made of silicon carbide is formed. A second layer of a second conductivity type different from the first conductivity type positioned on the first layer, and a third layer of the first conductivity type positioned on the second layer are formed. The step of forming second and third layers includes the steps of performing impurity ion implantation, and performing heat treatment for activating impurities implanted by the impurity ion implantation. After the step of performing heat treatment, a trench having a side wall penetrating the third layer and the second layer and having a bottom reaching the first layer is formed. A gate insulating film to cover the side wall of the trench is formed. As a result, a silicon carbide semiconductor device having a low ON resistance is provided.

Abstract: A MOSFET includes a semiconductor substrate having a trench formed in a main surface, a gate oxide film, a gate electrode, and a source interconnection. A semiconductor substrate includes an n-type drift layer and a p-type body layer. The trench is formed to penetrate the body layer and to reach the drift layer. The trench includes an outer peripheral trench arranged to surround an active region when viewed two-dimensionally. On the main surface opposite to the active region when viewed from the outer peripheral trench, a potential fixing region where the body layer is exposed is formed. The source interconnection is arranged to lie over the active region when viewed two-dimensionally. The potential fixing region is electrically connected to the source interconnection.

Abstract: An IGBT includes a groove provided in a silicon carbide semiconductor layer, a body region of a first conductivity type provided in the silicon carbide semiconductor layer, and an insulating film covering at least a sidewall surface of the groove, the sidewall surface of the groove being a surface having an off angle of 50° or more and 65° or less with respect to a {0001} plane, the sidewall surface of the groove including a surface of the body region, the insulating film being in contact with at least the surface of the body region at the sidewall surface of the groove, and a first conductivity type impurity concentration in the body region being 5×1016 cm?3 or more.

Abstract: A silicon carbide substrate having a surface is prepared. An impurity region is formed by implanting ions from the surface into the silicon carbide substrate. Annealing for activating the impurity region is performed. The annealing includes the step of applying first laser light having a first wavelength to the surface of the silicon carbide substrate, and the step of applying second laser light having a second wavelength to the surface of the silicon carbide substrate. The silicon carbide substrate has first and second extinction coefficients at the first and second wavelengths, respectively. A ratio of the first extinction coefficient to the first wavelength is higher than 5×105/m. A ratio of the second extinction coefficient to the second wavelength is lower than 5×105/m. Consequently, damage to the surface of the silicon carbide substrate during laser annealing can be reduced.

Abstract: A silicon carbide substrate has a first conductivity type. The silicon carbide substrate has a first surface provided with a first electrode and a second surface provided with first trenches arranged to be spaced from one another. A gate layer covers an inner surface of each of the first trenches. The gate layer has a second conductivity type different from the first conductivity type. A filling portion fills each of the first trenches covered with the gate layer. A second electrode is separated from the gate layer and provided on the second surface of the silicon carbide substrate. A gate electrode is electrically insulated from the silicon carbide substrate and electrically connected to the gate layer. Thereby, a silicon carbide semiconductor device capable of being easily manufactured can be provided.

Abstract: The substrate is made of a compound semiconductor, and has a recess, which opens at one main surface and has side wall surfaces when viewed in a cross section along a thickness direction. The gate insulating film is disposed on and in contact with each of the side wall surfaces. The substrate includes a source region having first conductivity type and disposed to be exposed at the side wall surface; and a body region having second conductivity type and disposed in contact with the source region at a side opposite to the one main surface so as to be exposed at the side wall surface, when viewed from the source region. The recess has a closed shape when viewed in a plan view. The side wall surfaces provide an outwardly projecting shape in every direction when viewed from an arbitrary location in the recess.

Abstract: A first layer is of a first conductivity type. A second layer is provided on the first layer and is of a second conductivity type. A third layer is provided on the second layer and isolated from the first layer by the second layer, and is of the first conductivity type. A trench is formed through the third layer and the second layer to reach the first layer. The first layer includes a relaxation region sandwiching a gate insulating film between itself and a gate electrode. The relaxation region is doped with a first impurity for providing the first conductivity type. The relaxation region is also doped with a second impurity for providing the second conductivity type in a concentration lower than that of the first impurity. As a result, an electric field relaxation structure for improving the breakdown voltage can be readily formed.

Abstract: The substrate is made of a compound semiconductor and has a plurality of first recesses, each of which opens at one main surface thereof and has a first side wall surface. The gate insulating film is disposed on and in contact with the first side wall surface. The gate electrode is disposed on and in contact with the gate insulating film. The substrate include: a source region having first conductivity type and disposed to face itself with a first recess interposed therebetween, when viewed in a cross section along the thickness direction; and a body region having second conductivity type and disposed to face itself with the first recess interposed therebetween. Portions of the source region facing each other are connected to each other in a region interposed between the first recess and another first recess adjacent to the first recess, when viewed in a plan view.

Abstract: A silicon carbide substrate includes a first layer of a first conductivity type, a second layer of a second conductivity type provided on the first layer, and a third layer provided on the second layer and doped with an impurity for providing the first conductivity type. The silicon carbide substrate has a trench formed through the third layer and the second layer to reach the first layer. The first layer has a concentration peak of the impurity in a position away from the trench in the first layer. As a result, a silicon carbide semiconductor device having an electric field relaxation structure that can be readily formed is provided.