Patents by Inventor Takuya Tsurume

Takuya Tsurume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7666719
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: February 23, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Publication number: 20100035407
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Application
    Filed: October 14, 2009
    Publication date: February 11, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuugo GOTO, Yumiko FUKUMOTO, Toru TAKAYAMA, Junya MARUYAMA, Takuya TSURUME
  • Publication number: 20100015737
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Application
    Filed: September 24, 2009
    Publication date: January 21, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Toru TAKAYAMA, Yuugo GOTO, Yumiko FUKUMOTO, Junya MARUYAMA, Takuya TSURUME
  • Patent number: 7632740
    Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: December 15, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoyuki Aoki, Takuya Tsurume
  • Patent number: 7622361
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: November 24, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Patent number: 7595256
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: September 29, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Yuugo Goto, Yumiko Fukumoto, Junya Maruyama, Takuya Tsurume
  • Patent number: 7591863
    Abstract: The invention provides a laminating system in which one of second and third substrates for sealing a thin film integrated circuit is supplied to a first substrate having the plurality of thin film integrated circuit while being extruded in a heated and melted state, and further rollers are used for supplying the other substrate, receiving IC chips, separating, and sealing. Processes of separating the thin film integrated circuits provided over the first substrate, sealing the separated thin film integrated circuits, and receiving the sealed thin film integrated circuits can be continuously carried out by rotating the rollers. Thus, the production efficiency can be extremely improved.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: September 22, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryosuke Watanabe, Hidekazu Takahashi, Takuya Tsurume, Yasuyuki Arai, Yasuko Watanabe, Miyuki Higuchi
  • Publication number: 20090233006
    Abstract: A first substrate including, on one of surfaces, a light absorption layer having metal nitride and a material layer which is formed so as to be in contact with the light absorption layer is provided; the surface of the first substrate on which the material layer is formed and a deposition target surface of a second substrate are disposed to face each other; and part of the material layer is deposited on the deposition target surface of the second substrate in such a manner that irradiation with laser light having a repetition rate of greater than or equal to 10 MHz and a pulse width of greater than or equal to 100 fs and less than or equal to 10 ns is performed from the other surface side of the first substrate to selectively heat part of the material layer which overlaps with the light absorption layer.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 17, 2009
    Inventors: Shunpei Yamazaki, Tomoya Aoyama, Takuya Tsurume, Takao Hamada
  • Publication number: 20090220706
    Abstract: A film-formation method whereby a minute pattern thin film can be formed on a deposition substrate, without provision of a mask between a material and the deposition substrate. Moreover, a light-emitting element is formed by such a film-formation method, and a high-definition light-emitting device can be manufactured. Through a film-formation substrate in which a reflective layer, a light-absorbing layer and a material layer are formed, the light-absorbing layer is irradiated with light, so that a material contained in the material layer is deposited on a deposition substrate which is disposed to face the film-formation substrate. Since the reflective layer is selectively formed, a film to be deposited on the deposition substrate can be selectively formed with a minute pattern reflecting the pattern of the reflective layer. A wet process can be employed for formation of the material layer.
    Type: Application
    Filed: February 24, 2009
    Publication date: September 3, 2009
    Inventors: Shunpei Yamazaki, Takahiro Ibe, Takuya Tsurume, Koichiro Tanaka, Satoshi Seo
  • Publication number: 20090212297
    Abstract: It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it easier to handle the thin film integrated circuit. The invention provides a laminating system in which rollers are used for supplying a substrate for sealing, receiving IC chips, separating, and sealing. The separation, sealing, and reception of a plurality of thin film integrated circuits can be carried out continuously by rotating the rollers; thus, the production efficiency can be extremely improved. Further, the thin film integrated circuits can be easily sealed since a pair of rollers opposite to each other is used.
    Type: Application
    Filed: March 13, 2009
    Publication date: August 27, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Ryosuke WATANABE, Hidekazu TAKAHASHI, Takuya TSURUME
  • Publication number: 20090166563
    Abstract: An evaporation donor substrate which enables only a desired evaporation material to be evaporated at the time of deposition by an evaporation method, and capable of reduction in manufacturing cost by increase in use efficiency of the evaporation material and deposition with high uniformity. An evaporation donor substrate capable of controlling laser light so that a desired position of an evaporation donor substrate is irradiated with the laser light in accordance with the wavelength of the emitted laser light at the time of evaporation. Specifically, an evaporation donor substrate in which a region which reflects laser light and a region which absorbs laser light at the time of irradiation with laser light having a wavelength of greater than or equal to 400 nm and less than or equal to 600 nm at the time of evaporation are formed.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Inventors: Kohei Yokoyama, Takahiro Ibe, Takuya Tsurume, Koichiro Tanaka
  • Publication number: 20090159998
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, which is flexible and superiority in physical strength. As a method for manufacturing a semiconductor device, an element layer including a plurality of integrated circuits is formed over one surface of a substrate; a hole having curvature is formed in part of one surface side of the substrate; the substrate is thinned (for example, the other surface of the substrate is ground and polished); and the substrate is cut off so that a cross section of the substrate has curvature corresponding to a portion where the hole is formed; whereby a laminated body including an integrated circuit is formed. Further, a thickness of the substrate, which is polished, is 2 ?m or more and 50 ?m or less.
    Type: Application
    Filed: February 17, 2009
    Publication date: June 25, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya TSURUME, Naoto KUSUMOTO
  • Publication number: 20090090940
    Abstract: A semiconductor device is provided, which includes a first insulating layer over a first substrate, a transistor over the first insulating layer, a second insulating layer over the transistor, a first conductive layer connected to a source region or a drain region of the transistor through an opening provided in the second insulating layer, a third insulating layer over the first conductive layer, and a second substrate over the third insulating layer. The transistor comprises a semiconductor layer, a second conductive layer, and a fourth insulating layer provided between the semiconductor layer and the second conductive layer. One or plural layers selected from the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer have a step portion which is provided so as not to overlap with the transistor.
    Type: Application
    Filed: May 25, 2006
    Publication date: April 9, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takuya Tsurume, Nozomi Horikoshi
  • Patent number: 7510950
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, which is flexible and superiority in physical strength. As a method for manufacturing a semiconductor device, an element layer including a plurality of integrated circuits is formed over one surface of a substrate; a hole having curvature is formed in part of one surface side of the substrate; the substrate is thinned (for example, the other surface of the substrate is ground and polished); and the substrate is cut off so that a cross section of the substrate has curvature corresponding to a portion where the hole is formed; whereby a laminated body including an integrated circuit is formed. Further, a thickness of the substrate, which is polished, is 2 ?m or more and 50 ?m or less.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: March 31, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Patent number: 7504317
    Abstract: It is an object to provide a manufacturing method of a semiconductor device with high reliability. A plurality of first semiconductor integrated circuits, a plurality of second semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, a plurality of third semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits and one of the second semiconductor integrated circuits, and a plurality of fourth semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, one of the second semiconductor integrated circuits, and one of the third semiconductor integrated circuits are formed over a first substrate. The first semiconductor integrated circuits are transferred to a second substrate.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: March 17, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoyuki Aoki, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
  • Publication number: 20090065590
    Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 12, 2009
    Inventors: Tomoyuki AOKI, Takuya TSURUME, Hiroki ADACHI, Nozomi HORIKOSHI, Hisashi OHTANI
  • Publication number: 20090057680
    Abstract: To provide a thin film integrated circuit at low cost and with thin thickness, which is applicable to mass production unlike the conventional glass substrate or the single crystalline silicon substrate, and a structure and a process of a thin film integrated circuit device or an IC chip having the thin film integrated circuit. A manufacturing method of a semiconductor device includes the steps of forming a first insulating film over one surface of a silicon substrate, forming a layer having at least two thin film integrated circuits over the first insulating film, forming a resin layer so as to cover the layer having the thin film integrated circuit, forming a film so as to cover the resin layer, grinding a backside of one surface of the silicon substrate which is formed with the layer having the thin film integrated circuit, and polishing the ground surface of the silicon substrate.
    Type: Application
    Filed: October 29, 2008
    Publication date: March 5, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Takuya Tsurume
  • Publication number: 20090057875
    Abstract: A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 ?m. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoyuki Aoki, Takuya Tsurume, Hiroki Adachi, Hisashi Ohtani
  • Publication number: 20090050964
    Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.
    Type: Application
    Filed: October 21, 2008
    Publication date: February 26, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshitaka DOZEN, Tomoko TAMURA, Takuya TSURUME, Koji DAIRIKI
  • Patent number: 7476575
    Abstract: An object of the present invention is to prevent a thin film integrate circuit from peeling off during the process of transferring to a base material. By a manufacturing method of the present invention, a separation layer is formed selectively on a surface of a substrate; thus, a first region where the separation layer is provided and a second region where the separation layer is not provided are formed. A thin film integrated circuit is formed over the separation layer. Then, an opening portion for exposing the separation layer is formed, en etching agent is introduced into the opening portion to remove the separation layer. Thus, a space is generated in the region provided with the separation layer, whereas a space is not generated in the region without the separation layer. Therefore, the thin film integrated circuit can be prevented from peeling off even after the separation layer is removed, by providing the region where the space is not generated after that.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: January 13, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Koji Dairiki