Patents by Inventor Takuya Tsurume

Takuya Tsurume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7883989
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: February 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Publication number: 20110024853
    Abstract: The present invention provides a semiconductor device which is not easily damaged by external local pressure. The present invention further provides a manufacturing method of a highly-reliable semiconductor device, which is not destroyed by external local pressure, with a high yield. A structure body, in which high-strength fiber of an organic compound or an inorganic compound is impregnated with an organic resin, is provided over an element substrate having a semiconductor element formed using a single crystal semiconductor region, and heating and pressure bonding are performed, whereby a semiconductor device is manufactured, to which the element substrate and the structure body in which the high-strength fiber of an organic compound or an inorganic compound is impregnated with the organic resin are fixed together.
    Type: Application
    Filed: September 29, 2010
    Publication date: February 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Eiji SUGIYAMA, Yoshitaka DOZEN, Hisashi OHTANI, Takuya TSURUME
  • Patent number: 7875530
    Abstract: First semiconductor integrated circuits and second semiconductor integrated circuits arranged over a first substrate so that each of the second semiconductor integrated circuits is adjacent to one of the first semiconductor integrated circuits are transferred to additional substrates through multiple transfer operations. After the first semiconductor integrated circuits and the second semiconductor integrated circuits formed over the first substrate are transferred to the additional substrates (a fourth substrate and a fifth substrate) respectively, the circuits are divided into a semiconductor device corresponding to each semiconductor integrated circuit. The first semiconductor integrated circuits are arranged while keeping a distance from each other over the fourth substrate, and the second semiconductor integrated circuits are arranged while keeping a distance from each other over the fifth substrate. Thus, a large division margin of each of the fourth substrate and the fifth substrate can be obtained.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 25, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoko Tamura, Tomoyuki Aoki, Takuya Tsurume, Koji Dairiki
  • Patent number: 7863188
    Abstract: It is an object of the present invention to provide a semiconductor device where, even in a case of stacking a plurality of semiconductor elements provided over a substrate, the stacked semiconductor elements can be electrically connected through the substrate, and a manufacturing method thereof. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of selectively forming a depression in an upper surface of a substrate or forming an opening which penetrates the upper surface through a back surface; forming an element group having a transistor so as to cover the upper surface of the substrate and the depression, or the opening; and exposing the element group formed in the depression or the opening by thinning the substrate from the back surface.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: January 4, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Yoshitaka Dozen
  • Publication number: 20100317156
    Abstract: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transferring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a thin film having a novel structure formed over a substrate via a release layer is separated, the release layer is removed in the state that the thin film integrated circuit is fixated, the thin film integrated circuit is transposed to a supporting substrate having an adhesion surface, and the thin film integrated circuit is transposed to another substrate having an adhesion surface with higher strength of adhesion than that of the supporting substrate.
    Type: Application
    Filed: August 20, 2010
    Publication date: December 16, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takuya TSURUME, Junya MARUYAMA, Yoshitaka DOZEN
  • Patent number: 7820529
    Abstract: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transferring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a thin film having a novel structure formed over a substrate via a release layer is separated, the release layer is removed in the state that the thin film integrated circuit is fixated, the thin film integrated circuit is transposed to a supporting substrate having an adhesion surface, and the thin film integrated circuit is transposed to another substrate having an adhesion surface with higher strength of adhesion than that of the supporting substrate.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: October 26, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Junya Maruyama, Yoshitaka Dozen
  • Patent number: 7820495
    Abstract: An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: October 26, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Naoto Kusumoto, Takuya Tsurume
  • Patent number: 7808098
    Abstract: The present invention provides a semiconductor device which is not easily damaged by external local pressure. The present invention further provides a manufacturing method of a highly-reliable semiconductor device, which is not destroyed by external local pressure, with a high yield. A structure body, in which high-strength fiber of an organic compound or an inorganic compound is impregnated with an organic resin, is provided over an element substrate having a semiconductor element formed using a single crystal semiconductor region, and heating and pressure bonding are performed, whereby a semiconductor device is manufactured, to which the element substrate and the structure body in which the high-strength fiber of an organic compound or an inorganic compound is impregnated with the organic resin are fixed together.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: October 5, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Eiji Sugiyama, Yoshitaka Dozen, Hisashi Ohtani, Takuya Tsurume
  • Publication number: 20100248403
    Abstract: In a manufacturing method of a light-emitting device, a separation layer is formed over a substrate; a semiconductor circuit element layer and first electrodes are formed over the separation layer; a partition wall overlapping with end portions of the first electrodes is formed; and organic material layers are formed over the first electrodes. Organic material layers emitting light of the same color are arranged adjacent to each other in a line and extend in a first direction. A second electrode is formed using a material having high adhesiveness to the partition wall over the organic material layers to be in contact with the partition wall. A stack structure including the semiconductor circuit element layer, the first electrodes, the partition wall, the organic material layers, and the second electrode is separated from the substrate using the separation layer in a second direction perpendicular to the first direction.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 30, 2010
    Inventors: Kaoru Hatano, Takaaki Nagata, Takuya Tsurume
  • Patent number: 7791153
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, which is flexible and superiority in physical strength. As a method for manufacturing a semiconductor device, an element layer including a plurality of integrated circuits is formed over one surface of a substrate; a hole having curvature is formed in part of one surface side of the substrate; the substrate is thinned (for example, the other surface of the substrate is ground and polished); and the substrate is cut off so that a cross section of the substrate has curvature corresponding to a portion where the hole is formed; whereby a laminated body including an integrated circuit is formed. Further, a thickness of the substrate, which is polished, is 2 ?m or more and 50 ?m or less.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: September 7, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Patent number: 7785933
    Abstract: To provide a method for manufacturing a highly-reliable semiconductor device, which is not damaged by external local pressure, with a high yield, a semiconductor device is manufactured by forming an element substrate having a semiconductor element formed using a single-crystal semiconductor substrate or an SOI substrate, providing the element substrate with a fibrous body formed from an organic compound or an inorganic compound, applying a composition containing an organic resin to the element substrate and the fibrous body so that the fibrous body is impregnated with the organic resin, and heating to provide the element substrate with a sealing layer in which the fibrous body formed from an organic compound or an inorganic compound is contained.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: August 31, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Eiji Sugiyama, Hisashi Ohtani, Takuya Tsurume
  • Publication number: 20100200663
    Abstract: In the present application, is disclosed a method of manufacturing a flexible semiconductor device having an excellent reliability and tolerance to the loading of external pressure. The method includes the steps of: forming a separation layer over a substrate having an insulating surface; forming an element layer including a semiconductor element comprising a non-single crystal semiconductor layer, over the separation layer; forming an organic resin layer over the element layer; providing a fibrous body formed of an organic compound or an inorganic compound on the organic resin layer; heating the organic resin layer; and separating the element layer from the separation layer. This method allows the formation of a flexible semiconductor device having a sealing layer in which the fibrous body is impregnated with the organic resin.
    Type: Application
    Filed: April 27, 2010
    Publication date: August 12, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshitaka DOZEN, Eiji SUGIYAMA, Hisashi OHTANI, Takuya TSURUME
  • Publication number: 20100197113
    Abstract: To provide a thin semiconductor device having flexibility. A groove is formed in one surface of a substrate; an element layer including an element is formed, the element being disposed within the groove; the substrate is thinned from the other surface of the substrate until one surface of the element layer is exposed, to form a layer which is to be transposed, having the element; and the layer to be transposed is transposed onto the film.
    Type: Application
    Filed: April 7, 2010
    Publication date: August 5, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Takuya TSURUME
  • Patent number: 7759788
    Abstract: A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 ?m. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: July 20, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Tomoyuki Aoki, Takuya Tsurume, Hiroki Adachi, Hisashi Ohtani
  • Patent number: 7736958
    Abstract: In the present application, is disclosed a method of manufacturing a flexible semiconductor device having an excellent reliability and tolerance to the loading of external pressure. The method includes the steps of: forming a separation layer over a substrate having an insulating surface; forming an element layer including a semiconductor element comprising a non-single crystal semiconductor layer, over the separation layer; forming an organic resin layer over the element layer; providing a fibrous body formed of an organic compound or an inorganic compound on the organic resin layer; heating the organic resin layer; and separating the element layer from the separation layer. This method allows the formation of a flexible semiconductor device having a sealing layer in which the fibrous body is impregnated with the organic resin.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: June 15, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Eiji Sugiyama, Hisashi Ohtani, Takuya Tsurume
  • Patent number: 7727857
    Abstract: To provide a thin semiconductor device having flexibility. A groove is formed in one surface of a substrate; an element layer including an element is formed, the element being disposed within the groove; the substrate is thinned from the other surface of the substrate until one surface of the element layer is exposed, to form a layer which is to be transposed, having the element; and the layer to be transposed is transposed onto the film.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: June 1, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Takuya Tsurume
  • Patent number: 7728383
    Abstract: To provide a thin film integrated circuit at low cost and with thin thickness, which is applicable to mass production unlike the conventional glass substrate or the single crystalline silicon substrate, and a structure and a process of a thin film integrated circuit device or an IC chip having the thin film integrated circuit. A manufacturing method of a semiconductor device includes the steps of forming a first insulating film over one surface of a silicon substrate, forming a layer having at least two thin film integrated circuits over the first insulating film, forming a resin layer so as to cover the layer having the thin film integrated circuit, forming a film so as to cover the resin layer, grinding a backside of one surface of the silicon substrate which is formed with the layer having the thin film integrated circuit, and polishing the ground surface of the silicon substrate.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: June 1, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Takuya Tsurume
  • Patent number: 7723842
    Abstract: To solve the problems caused by accumulation of heat generated from an integrated circuit. The integrated circuit device of the invention includes a substrate over one surface of which an integrated circuit is formed. The other surface of the substrate (a surface over which the integrated circuit is not formed) includes a depressed portion and has a larger surface area than the one surface. The depressed portion formed on the other surface of the substrate is filled with a heat sink material, or a film containing a heat sink material is formed at least over the surface of the depressed portion. Such integrated circuit devices may be provided in a multilayer structure.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Patent number: 7713836
    Abstract: A separation layer is formed over a substrate having a depressed portion, using a silane coupling agent; a conductive layer and an insulating layer that covers the conductive layer are formed in the depressed portion over the separation layer; and a sticky member is attached to the insulating layer, then the conductive layer and the insulating layer are separated from the substrate. Alternatively, after these steps, a flexible substrate is attached to the conductive layer and the insulating layer.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: May 11, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoyuki Aoki, Takuya Tsurume, Daiki Yamada
  • Publication number: 20100062569
    Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.
    Type: Application
    Filed: November 16, 2009
    Publication date: March 11, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tomoyuki Aoki, Takuya Tsurume