Patents by Inventor Takuya Tsurume

Takuya Tsurume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7268487
    Abstract: The present invention is to solve the problems of heat release and a metal material corrosion due to fluorine that are arisen in the case of using a film containing fluoroplastics (Teflon®) as a protective film for a light-emitting device. In the present invention, an inorganic film is formed after forming a light-emitting device, and a film containing fluoroplastics is formed thereon for avoiding contact with a metal material for forming the light-emitting device, as a result, a metal material corrosion due to fluorine in the film containing fluoroplastics can be prevented. In addition, the inorganic insulating film has a function of preventing fluorine in the film containing fluoroplastics from reacting to the metal material (barrier property), in addition, the inorganic insulating film is formed of a material having high heat conductivity for releasing heat generated in a light-emitting device.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: September 11, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Takuya Tsurume, Yuugo Goto
  • Publication number: 20070196999
    Abstract: A release layer formed over a substrate; at least one of thin film integrated circuits is formed over the release layer; a film is formed over each of the at least one of thin film integrated circuits; and the release layer is removed by using an etchant; thus, the at least one of thin film integrated circuits is peeled from the substrate. A semiconductor device is formed by sealing the peeled thin film integrated circuit by lamination or the like.
    Type: Application
    Filed: July 28, 2005
    Publication date: August 23, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tomoko Tamura, Eiji Sugiyama, Yoshitaka Dozen, Koji Dairiki, Takuya Tsurume
  • Publication number: 20070173034
    Abstract: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transfer-ring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a thin film having a novel structure formed over a substrate via a release layer is separated, the release layer is removed in the state that the thin film integrated circuit is fixated, the thin film integrated circuit is transposed to a supporting substrate having an adhesion surface, and the thin film integrated circuit is transposed to another substrate having an adhesion surface with higher strength of adhesion than that of the supporting substrate.
    Type: Application
    Filed: March 15, 2005
    Publication date: July 26, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Junya Maruyama, Yoshitaka Dozen
  • Patent number: 7241666
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: July 10, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Patent number: 7229900
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: June 12, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Yuugo Goto, Yumiko Fukumoto, Junya Maruyama, Takuya Tsurume
  • Publication number: 20070128833
    Abstract: It is an object to provide a manufacturing method of a semiconductor device with high reliability. A plurality of first semiconductor integrated circuits, a plurality of second semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, a plurality of third semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits and one of the second semiconductor integrated circuits, and a plurality of fourth semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, one of the second semiconductor integrated circuits, and one of the third semiconductor integrated circuits are formed over a first substrate. The first semiconductor integrated circuits are transferred to a second substrate.
    Type: Application
    Filed: November 16, 2006
    Publication date: June 7, 2007
    Inventors: Tomoyuki Aoki, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
  • Publication number: 20070128747
    Abstract: First semiconductor integrated circuits and second semiconductor integrated circuits arranged over a first substrate so that each of the second semiconductor integrated circuits is adjacent to one of the first semiconductor integrated circuits are transferred to additional substrates through multiple transfer operations. After the first semiconductor integrated circuits and the second semiconductor integrated circuits formed over the first substrate are transferred to the additional substrates (a fourth substrate and a fifth substrate) respectively, the circuits are divided into a semiconductor device corresponding to each semiconductor integrated circuit. The first semiconductor integrated circuits are arranged while keeping a distance from each other over the fourth substrate, and the second semiconductor integrated circuits are arranged while keeping a distance from each other over the fifth substrate. Thus, a large division margin of each of the fourth substrate and the fifth substrate can be obtained.
    Type: Application
    Filed: November 21, 2006
    Publication date: June 7, 2007
    Inventors: Tomoko Tamura, Tomoyuki Aoki, Takuya Tsurume, Koji Dairiki
  • Publication number: 20070111391
    Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.
    Type: Application
    Filed: November 3, 2006
    Publication date: May 17, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoyuki Aoki, Takuya Tsurume
  • Publication number: 20070105264
    Abstract: To provide a thin semiconductor device having flexibility. A groove is formed in one surface of a substrate; an element layer including an element is formed, the element being disposed within the groove; the substrate is thinned from the other surface of the substrate until one surface of the element layer is exposed, to form a layer which is to be transposed, having the element; and the layer to be transposed is transposed onto the film.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 10, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takuya Tsurume
  • Publication number: 20070052088
    Abstract: To solve the problems caused by accumulation of heat generated from an integrated circuit. The integrated circuit device of the invention includes a substrate over one surface of which an integrated circuit is formed. The other surface of the substrate (a surface over which the integrated circuit is not formed) includes a depressed portion and has a larger surface area than the one surface. The depressed portion formed on the other surface of the substrate is filled with a heat sink material, or a film containing a heat sink material is formed at least over the surface of the depressed portion. Such integrated circuit devices may be provided in a multilayer structure.
    Type: Application
    Filed: August 16, 2006
    Publication date: March 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Publication number: 20070032042
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Application
    Filed: October 4, 2006
    Publication date: February 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Publication number: 20070023758
    Abstract: It is an object of the present invention to provide a semiconductor device where, even in a case of stacking a plurality of semiconductor elements provided over a substrate, the stacked semiconductor elements can be electrically connected through the substrate, and a manufacturing method thereof. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of selectively forming a depression in an upper surface of a substrate or forming an opening which penetrates the upper surface through a back surface; forming an element group having a transistor so as to cover the upper surface of the substrate and the depression, or the opening; and exposing the element group formed in the depression or the opening by thinning the substrate from the back surface.
    Type: Application
    Filed: July 14, 2006
    Publication date: February 1, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Yoshitaka Dozen
  • Publication number: 20070004102
    Abstract: An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.
    Type: Application
    Filed: June 7, 2006
    Publication date: January 4, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Naoto Kusumoto, Takuya Tsurume
  • Publication number: 20070004082
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, which is flexible and superiority in physical strength. As a method for manufacturing a semiconductor device, an element layer including a plurality of integrated circuits is formed over one surface of a substrate; a hole having curvature is formed in part of one surface side of the substrate; the substrate is thinned (for example, the other surface of the substrate is ground and polished); and the substrate is cut off so that a cross section of the substrate has curvature corresponding to a portion where the hole is formed; whereby a laminated body including an integrated circuit is formed. Further, a thickness of the substrate, which is polished, is 2 ?m or more and 50 ?m or less.
    Type: Application
    Filed: June 19, 2006
    Publication date: January 4, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Publication number: 20070004178
    Abstract: To provide a semiconductor device including a thinned substrate with high yield. After forming a protective layer in a predetermined portion (at least a portion covering a side surface of a substrate) of the substrate, grinding and polishing of the substrate are performed. In other words, an element layer including a plurality of integrated circuits is formed over one surface of the substrate, the protective layer is formed in contact with at least the side surface of the substrate, and the substrate is thinned (for example, the other surface of the substrate is ground and polished), the protective layer is removed, and the polished substrate and the element layer is divided so as to form stack bodies including a layer provided with at least one of the plurality of integrated circuits.
    Type: Application
    Filed: June 19, 2006
    Publication date: January 4, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Publication number: 20060273319
    Abstract: It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.
    Type: Application
    Filed: May 30, 2006
    Publication date: December 7, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Naoto Kusumoto, Takuya Tsurume
  • Publication number: 20060270236
    Abstract: To provide a thin film integrated circuit at low cost and with thin thickness, which is applicable to mass production unlike the conventional glass substrate or the single crystalline silicon substrate, and a structure and a process of a thin film integrated circuit device or an IC chip having the thin film integrated circuit. A manufacturing method of a semiconductor device includes the steps of forming a first insulating film over one surface of a silicon substrate, forming a layer having at least two thin film integrated circuits over the first insulating film, forming a resin layer so as to cover the layer having the thin film integrated circuit, forming a film so as to cover the resin layer, grinding a backside of one surface of the silicon substrate which is formed with the layer having the thin film integrated circuit, and polishing the ground surface of the silicon substrate.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 30, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Takuya Tsurume
  • Patent number: 7122445
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: October 17, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Publication number: 20060055014
    Abstract: The present invention provides a new type wireless chip that can be used without being fixed on a product. Specifically, a wireless chip can have a new function by a sealing step. One feature of a wireless chip according to the present invention is to have a structure in which an integrated circuit is sealed by films. In particular, the films sealing the integrated circuit have a hollow structure; therefore the wireless chip can have a new function.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 16, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Koji Dairiki, Naoto Kusumoto
  • Publication number: 20060011288
    Abstract: The invention provides a laminating system in which one of second and third substrates for sealing a thin film integrated circuit is supplied to a first substrate having the plurality of thin film integrated circuit while being extruded in a heated and melted state, and further rollers are used for supplying the other substrate, receiving IC chips, separating, and sealing. Processes of separating the thin film integrated circuits provided over the first substrate, sealing the separated thin film integrated circuits, and receiving the sealed thin film integrated circuits can be continuously carried out by rotating the rollers. Thus, the production efficiency can be extremely improved.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 19, 2006
    Applicant: Semiconductor Energy
    Inventors: Ryosuke Watanabe, Hidekazu Takahashi, Takuya Tsurume, Yasuyuki Arai, Yasuko Watanabe, Miyuki Higuchi